From patchwork Mon Oct 28 13:39:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xuelei Zhang X-Patchwork-Id: 1185421 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-106387-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="UO70+Kmc"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 471wmz2df4z9sPL for ; Tue, 29 Oct 2019 00:39:31 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:mime-version :content-type; q=dns; s=default; b=i1AqZjqz8knLoAoKXcKc2gyMZV2fP yrRyVIQecU0u2f4ntViogErl9uJxRkyKbLePTEcRIHmGkGCU8hqZY5UZBvjbqM1n TMVFpY7YZGo8glGiFQSpGlYsdYyPsYKrjX/nbpLMH0xOOCGAF4LeO0SVqAurjb5S 76yJOuYb2u7qY4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:mime-version :content-type; s=default; bh=JWoXnIXUwrlKCETzTxu+GmqMt6M=; b=UO7 0+Kmcak9940VFZN5+T4PdFyMhwYM5bHyB0aQe+2Lx/UyGPCH06wxE3vBMWthb1bb yzuA6uN2YzzEg1xRtOAQ9ga6MLotdeJNLvxhgwgfi/m/mW9+KVXawTeXTdrStFPn GijfjRiE8BScDXGPyrAItWcF7IfbH+8TMVyQqMGI= Received: (qmail 80029 invoked by alias); 28 Oct 2019 13:39:25 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 80016 invoked by uid 89); 28 Oct 2019 13:39:24 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-19.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_MANYTO, KAM_SHORT, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.1 spammy=intense, bus, cbz, UD:lt X-HELO: huawei.com From: Xuelei Zhang To: , , , , , Subject: [PATCH] aarch64: Optimized implementation of pthread_spin_lock and unlock Date: Mon, 28 Oct 2019 21:39:11 +0800 Message-ID: <20191028133911.8612-1-zhangxuelei4@huawei.com> MIME-Version: 1.0 An optimized algorithm of spin_lock is implemented to wait for random time in the case that multi-threads want to store spinlock at the same time. This way can make the operation of different threads asynchronous, thereby reducing bus conflicts, and futherly improving the overall performance, which benefits more on aarch64 for its multi-core features. In addition, the assembly version of spin_unlock is also implemented. --- sysdeps/aarch64/nptl/pthread_spin_lock.S | 103 +++++++++++++++++++++++++++++ sysdeps/aarch64/nptl/pthread_spin_unlock.S | 34 ++++++++++ 2 files changed, 137 insertions(+) create mode 100644 sysdeps/aarch64/nptl/pthread_spin_lock.S create mode 100644 sysdeps/aarch64/nptl/pthread_spin_unlock.S diff --git a/sysdeps/aarch64/nptl/pthread_spin_lock.S b/sysdeps/aarch64/nptl/pthread_spin_lock.S new file mode 100644 index 00000000000..662410c5fa3 --- /dev/null +++ b/sysdeps/aarch64/nptl/pthread_spin_lock.S @@ -0,0 +1,103 @@ +/* pthread_spin_lock -- lock a spin lock. Generic version. + Copyright (C) 2012-2019 Free Software Foundation, Inc. + This file is part of the GNU C Library. + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#include + +/* Assumptions: + * + * ARMv8-a, AArch64 + */ + +ENTRY (pthread_spin_lock) + DELOUSE (0) + + mov w1, #0x1 + +L(spin): + prfm pldl1strm, [x0] + /* A count to distinguish wating time. + The larger the value, the more intense the current lock + conflicts, and the longer the waiting time. */ + add w3, w3, #0x1 + ldaxr w2, [x0] + cbnz w2, L(spin) + stxr w2, w1, [x0] + cbnz w2, 1f + b L(end) + +L(end): + mov w0, #0x0 + ret + + /* Set the loop times of L(wait) from 1000 to 7000 cycles, + equals waiting 1~2us per 1000 cycles. */ + .p2align 4 +7: + mov w6, #0x1b58 + b L(wait_init) +6: + mov w6, #0x1770 + b L(wait_init) +5: + mov w6, #0x1388 + b L(wait_init) +4: + mov w6, #0x0fa0 + b L(wait_init) +3: + mov w6, #0x0bb8 + b L(wait_init) +2: + mov w6, #0x07d0 + b L(wait_init) +1: + mov w6, #0x03e8 + b L(wait_init) + +L(wait_init): + mov w5, #0x0 +L(wait): + add w5, w5, #0x1 + cmp w5, w6 + b.lt L(wait) /* Wait ends when w5 equals w6. */ + +L(stxr_try): + ldr w2, [x0] + cbz w2, L(spin) + and w3, w3, #0x07 + /* 8 kinds of distinguish wating time + based on the lower three bits of w3. */ + cmp w3, #0x01 + beq 1b + cmp w3, #0x02 + beq 2b + cmp w3, #0x03 + beq 3b + cmp w3, #0x04 + beq 4b + cmp w3, #0x05 + beq 5b + cmp w3, #0x06 + beq 6b + cmp w3, #0x07 + beq 7b + + wfe /* w3=0x000: the most intense situation so to wait 50 us */ + b L(stxr_try) + + +END (pthread_spin_lock) +libc_hidden_builtin_def (pthread_spin_lock) +weak_alias (pthread_spin_lock, index) diff --git a/sysdeps/aarch64/nptl/pthread_spin_unlock.S b/sysdeps/aarch64/nptl/pthread_spin_unlock.S new file mode 100644 index 00000000000..57a6bca86fe --- /dev/null +++ b/sysdeps/aarch64/nptl/pthread_spin_unlock.S @@ -0,0 +1,34 @@ +/* pthread_spin_unlock -- unlock a spin lock. Generic version. + Copyright (C) 2012-2019 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#include + +/* Assumptions: + * + * ARMv8-a, AArch64 + */ + +ENTRY (pthread_spin_unlock) + DELOUSE (0) + stlr wzr, [x0] + mov w0, #0x0 + ret + +END (pthread_spin_unlock) +libc_hidden_builtin_def (pthread_spin_unlock) +weak_alias (pthread_spin_unlock, index)