From patchwork Mon Sep 4 13:44:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cupertino Miranda X-Patchwork-Id: 809682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-461418-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="C+UWsnPI"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xmB1K5v6Cz9t16 for ; Mon, 4 Sep 2017 23:45:08 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type:mime-version; q=dns; s=default; b=ExHGIO1ADzptyzI/+eQKMLWR1+5wXw7W6P9v3jb0ZINrEBEA2r cdJUt/BWEtpt09olnCrl65vCCIKqpA1ORRx8IIHEvQAhbNXLUqRLil+2wKsrPHDF E9e6H3wRZlSe9jrf2lcWzpVx9WccPzpdeCg3UqlzqO3mfsfHuuZTe4bPw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type:mime-version; s= default; bh=0bv0gwBf2fz0G5h62kCZyQnc79s=; b=C+UWsnPI/zaBo0Rddh5v IHm3irHx9vjvFLbRXiRV5FeReASjw2gmKd5okU157AfwE9l3JYekL7Ouu4oG3eY7 ZE1AYaOJVeqtS5RcRriVVnbJgJ+/autM62HFPb7fy+j1U6Sq5SP7Z2z/oYUyZ2Ox 9Ho23CK2Upd7iKPdiHXnNVw= Received: (qmail 56130 invoked by alias); 4 Sep 2017 13:44:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 48849 invoked by uid 89); 4 Sep 2017 13:44:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=swi, blink, H*c:HHH X-HELO: smtprelay.synopsys.com Received: from smtprelay2.synopsys.com (HELO smtprelay.synopsys.com) (198.182.60.111) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 04 Sep 2017 13:44:49 +0000 Received: from mailhost.synopsys.com (mailhost1.synopsys.com [10.12.238.239]) by smtprelay.synopsys.com (Postfix) with ESMTP id A5AAC10C14B4; Mon, 4 Sep 2017 06:44:47 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 3B08E835; Mon, 4 Sep 2017 06:44:47 -0700 (PDT) Received: from US01WXQAHTC1.internal.synopsys.com (us01wxqahtc1.internal.synopsys.com [10.12.238.230]) by mailhost.synopsys.com (Postfix) with ESMTP id 1516B832; Mon, 4 Sep 2017 06:44:46 -0700 (PDT) Received: from DE02WEHTCB.internal.synopsys.com (10.225.19.94) by US01WXQAHTC1.internal.synopsys.com (10.12.238.230) with Microsoft SMTP Server (TLS) id 14.3.266.1; Mon, 4 Sep 2017 06:44:46 -0700 Received: from DE02WEMBXB.internal.synopsys.com ([fe80::95ce:118a:8321:a099]) by DE02WEHTCB.internal.synopsys.com ([::1]) with mapi id 14.03.0266.001; Mon, 4 Sep 2017 15:44:43 +0200 From: Cupertino Miranda To: "gcc-patches@gcc.gnu.org" CC: Claudiu Zissulescu , Andrew Burgess , Francois Bedard Subject: [ARC] Fix stack unwinding for ARC Date: Mon, 4 Sep 2017 13:44:42 +0000 Message-ID: MIME-Version: 1.0 Hi everyone, Here is patch to stack unwinding for ARC. - Fix to unwinding. Now is is possible to unwind from syscall wrappers, signals and functions with dynamic stack allocation. - Patch also fixes millicode. Although millicode save and restore functions would change blink, the calls to those functions were not clobbering blink. Looking forward to your reviews. Best regards, Cupertino From 213a0f115b2c7459b2a65728f4c5a74d2ed89c9d Mon Sep 17 00:00:00 2001 From: Cupertino Miranda Date: Mon, 4 Sep 2017 14:24:51 +0200 Subject: [PATCH] Fix to unwinding. Now is is possible to unwind from syscall wrappers, signals and functions with dynamic stack allocation. Patch also fixes millicode. Although millicode save and restore functions would change blink, the calls to those functions were not clobbering blink. gcc/ChangeLog: 2017-09-04 Cupertino Miranda * config/arc/arc.c (arc_save_restore): Corrected CFA note. (arc_expand_prologue): Restore blink for millicode. * config/arc/linux.h (LINK_EH_SPEC): Defined. libgcc/ChangeLog: 2017-09-04 Cupertino Miranda * config/arc/linux-unwind-reg.def: Created with register indexes info. * config/arc/linux-unwind-reg.h (registers_stack_order): Defined. (register_position): Likewise. (register_id_for_index): Likewise. (arc_fallback_frame_state): New function to define frame where frame information is missing and it refers to a syscall wrapper. (+arc_frob_update_context): New function to correct context information in case unwinding happens through fp register. --- gcc/config/arc/arc.c | 36 ++++++-- gcc/config/arc/linux.h | 8 ++ libgcc/config.host | 1 + libgcc/config/arc/linux-unwind-reg.def | 23 +++++ libgcc/config/arc/linux-unwind.h | 154 +++++++++++++++++++++++++++++++++ 5 files changed, 216 insertions(+), 6 deletions(-) create mode 100644 libgcc/config/arc/linux-unwind-reg.def create mode 100644 libgcc/config/arc/linux-unwind.h diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index d519063..ff2f8ae 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -2849,12 +2849,23 @@ arc_save_restore (rtx base_reg, else { insn = frame_insn (insn); - if (epilogue_p) - for (r = start_call; r <= end_call; r++) - { - rtx reg = gen_rtx_REG (SImode, r); - add_reg_note (insn, REG_CFA_RESTORE, reg); - } + for (r = start_call, off = 0; + r <= end_call; + r++, off += UNITS_PER_WORD) + { + rtx reg = gen_rtx_REG (SImode, r); + if (epilogue_p) + add_reg_note (insn, REG_CFA_RESTORE, reg); + else + { + rtx mem = gen_rtx_MEM (SImode, plus_constant (Pmode, + base_reg, + off)); + + add_reg_note (insn, REG_CFA_OFFSET, + gen_rtx_SET (mem, reg)); + } + } } offset += off; } @@ -3092,6 +3103,19 @@ arc_expand_prologue (void) frame_size_to_allocate -= cfun->machine->frame_info.reg_size; } + /* In the case of millicode thunk, we need to restore the clobbered + blink register. */ + if (cfun->machine->frame_info.millicode_end_reg > 0 + && arc_must_save_return_addr (cfun)) + { + HOST_WIDE_INT tmp = cfun->machine->frame_info.reg_size; + emit_insn (gen_rtx_SET (gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM), + gen_rtx_MEM (Pmode, + plus_constant (Pmode, + stack_pointer_rtx, + tmp)))); + } + /* Save frame pointer if needed. First save the FP on stack, if not autosaved. */ if (arc_frame_pointer_needed () diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h index d8e0063..7073471 100644 --- a/gcc/config/arc/linux.h +++ b/gcc/config/arc/linux.h @@ -91,3 +91,11 @@ along with GCC; see the file COPYING3. If not see /* Pre/post modify with register displacement are default off. */ #undef TARGET_AUTO_MODIFY_REG_DEFAULT #define TARGET_AUTO_MODIFY_REG_DEFAULT 0 + +#if DEFAULT_LIBC == LIBC_GLIBC +/* Override linux.h LINK_EH_SPEC definition. + Signalize that because we have fde-glibc, we don't need all C shared libs + linked against -lgcc_s. */ +#undef LINK_EH_SPEC +#define LINK_EH_SPEC "--eh-frame-hdr" +#endif diff --git a/libgcc/config.host b/libgcc/config.host index 2686d59..d05ed45 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -385,6 +385,7 @@ arc*-*-elf*) tmake_file="arc/t-arc" extra_parts="crti.o crtn.o crtend.o crtbegin.o crtendS.o crtbeginS.o" extra_parts="$extra_parts crttls.o" + md_unwind_header=arc/linux-unwind.h ;; arc*-*-linux*) tmake_file="${tmake_file} t-slibgcc-libgcc t-slibgcc-nolc-override arc/t-arc-uClibc arc/t-arc" diff --git a/libgcc/config/arc/linux-unwind-reg.def b/libgcc/config/arc/linux-unwind-reg.def new file mode 100644 index 0000000..763a32f --- /dev/null +++ b/libgcc/config/arc/linux-unwind-reg.def @@ -0,0 +1,23 @@ +REGISTER_IN_STACK(bta, -1) +REGISTER_IN_STACK(lp_start, -1) +REGISTER_IN_STACK(lp_end, -1) +REGISTER_IN_STACK(lp_count, -1) +REGISTER_IN_STACK(status32, -1) +REGISTER_IN_STACK(ret, -1) +REGISTER_IN_STACK(blink, 31) +REGISTER_IN_STACK(fp, 27) +REGISTER_IN_STACK(gp, 26) +REGISTER_IN_STACK(r12, 12) +REGISTER_IN_STACK(r11, 11) +REGISTER_IN_STACK(r10, 10) +REGISTER_IN_STACK(r9, 9) +REGISTER_IN_STACK(r8, 8) +REGISTER_IN_STACK(r7, 7) +REGISTER_IN_STACK(r6, 6) +REGISTER_IN_STACK(r5, 5) +REGISTER_IN_STACK(r4, 4) +REGISTER_IN_STACK(r3, 3) +REGISTER_IN_STACK(r2, 2) +REGISTER_IN_STACK(r1, 1) +REGISTER_IN_STACK(r0, 0) +REGISTER_IN_STACK(sp, 28) diff --git a/libgcc/config/arc/linux-unwind.h b/libgcc/config/arc/linux-unwind.h new file mode 100644 index 0000000..7b97149 --- /dev/null +++ b/libgcc/config/arc/linux-unwind.h @@ -0,0 +1,154 @@ +/* DWARF2 EH unwinding support for ARC Linux. + Copyright (C) 2004-2016 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +. */ + +/* This order is defined by a structure in the kernel, + in file arch/arc/kernel/signal.c. */ + +#define REGISTER_IN_STACK(REG_NAME, ID) \ + REG_NAME, +enum registers_stack_order { + REGISTER_STACK_ORDER_START = -1, + #include "config/arc/linux-unwind-reg.def" + REGISTER_STACK_ORDER_SIZE, +}; + +struct register_position { + int reg_id; + int offset_in_stack; +}; +#undef REGISTER_IN_STACK + +#define REGISTER_SIZE_IN_WORDS 4 +#define REGISTER_IN_STACK(REG_NAME, ID) (int) ID, +int +register_id_for_index[REGISTER_STACK_ORDER_SIZE] = { + #include "config/arc/linux-unwind-reg.def" +}; +#undef REGISTER_IN_STACK + +#ifndef inhibit_libc +/* Do code reading to identify a signal frame, and set the frame + state data appropriately. See unwind-dw2.c for the structs. */ + +#include +#include + +/* +00010edc <__default_rt_sa_restorer>: + 10edc: 208a 12c2 mov r8,139 + 10ee0: 781e trap_s 0 + 10ee2: 7ee0 j_s [blink] +*/ + +#if __BIG_ENDIAN__ +#define MOV_R8_139 0x8a20c212 +#define TRAP_S_J_S_BLINK 0x1e78e07e +#define SWI 0x6f223f00 +#elif __LITTLE_ENDIAN__ +#define MOV_R8_139 0x12c2208a +#define TRAP_S_J_S_BLINK 0x7ee0781e +#define SWI 0x003f226f +#endif + +#define MD_FALLBACK_FRAME_STATE_FOR arc_fallback_frame_state + +static __attribute__((noinline)) _Unwind_Reason_Code +arc_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + struct rt_sigframe { + siginfo_t info; + struct ucontext uc; + unsigned int sigret_magic; + }; + + struct rt_sigframe *rt_; + u_int32_t *pc = (u_int32_t *) context->ra; + struct sigcontext *sc; + _Unwind_Ptr new_cfa; + int i; + +#ifdef __ARC700__ + if (pc[1] != SWI) + return _URC_END_OF_STACK; +#else + if (pc[1] != TRAP_S_J_S_BLINK) + return _URC_END_OF_STACK; +#endif + + if (pc[0] == MOV_R8_139) + { + rt_ = context->cfa; + sc = &rt_->uc.uc_mcontext; + } + else + return _URC_END_OF_STACK; + + new_cfa = (_Unwind_Ptr) sc; + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = __LIBGCC_STACK_POINTER_REGNUM__; + fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; + + unsigned long *regs = &sc->regs.scratch.bta; + for (i = 0; i < REGISTER_STACK_ORDER_SIZE; i++) + { + if (register_id_for_index[i] == -1) + continue; + fs->regs.reg[register_id_for_index[i]].how = REG_SAVED_OFFSET; + fs->regs.reg[register_id_for_index[i]].loc.offset + = ((_Unwind_Ptr) &(regs[i])) - new_cfa; + } + + fs->regs.reg[31].how = REG_SAVED_VAL_OFFSET; + fs->regs.reg[31].loc.offset = ((_Unwind_Ptr) (regs[ret])) - new_cfa; + + fs->retaddr_column = 31; + + return _URC_NO_REASON; +} +#endif + +#define MD_FROB_UPDATE_CONTEXT arc_frob_update_context +/* Save fp register for unwinding to work. */ + +static void +arc_frob_update_context (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + //register _Unwind_Word fp_val asm ("fp"); + _Unwind_Word fp_val; + asm ("mov %0,fp" : "=r" (fp_val)); + + switch (fs->regs.reg[27].how) + { + case REG_UNSAVED: + case REG_UNDEFINED: + if (context->reg[27] == NULL) + _Unwind_SetGRValue (context, 27, fp_val); + break; + + default: + break; + } +} -- 2.9.0