From patchwork Fri Oct 18 15:34:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179464 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="PwrYcDff"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqnN6hGnz9sPZ for ; Sat, 19 Oct 2019 02:33:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410596AbfJRPcG (ORCPT ); Fri, 18 Oct 2019 11:32:06 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37070 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410589AbfJRPcF (ORCPT ); Fri, 18 Oct 2019 11:32:05 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW30J064225; Fri, 18 Oct 2019 10:32:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412724; bh=j99x0LUGCJ69WgqO6pLApz0kcnPMoOP7gpKZ5+4Wc4s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PwrYcDffNRGqHy/KOEkoUP4W1d7im000TzLudCw09ioujSpSBiOyj4S0hkjVuhEOJ PtjfBkOwWAxjslmbJJmR1sRus/o2DYrbDh/VcxysCEjTTuv595wHJ2hW1eoEb7hMyy s2Vx2U4aIon7Med1lBM5XDVQoShPFYlIwG1q0gUg= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9IFW3et084570 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Oct 2019 10:32:03 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:31:55 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:32:03 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15F080266; Fri, 18 Oct 2019 10:32:03 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot Subject: [Patch 01/19] dt-bindings: media: cal: update binding to use syscon Date: Fri, 18 Oct 2019 10:34:19 -0500 Message-ID: <20191018153437.20614-2-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update Device Tree bindings for the CAL driver to use syscon to access the phy config register instead of trying to map it directly. Signed-off-by: Benoit Parrot --- Documentation/devicetree/bindings/media/ti-cal.txt | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt index ae9b52f37576..782f801b12a9 100644 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ b/Documentation/devicetree/bindings/media/ti-cal.txt @@ -10,9 +10,14 @@ Required properties: - compatible: must be "ti,dra72-cal" - reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX control address space -- reg-names: cal_top, cal_rx_core0, cal_rx_core1, and camerrx_control +- reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control registers - interrupts: should contain IRQ line for the CAL; +- syscon-camerrx: phandle to the device control module and offset to the + control_camerarx_core register + This node is meant to replace the "camerrx_control" reg + entry above but "camerrx_control" is still handled + for backward compatibility. CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes should contain a 'port' child node with child 'endpoint' node. Please @@ -25,13 +30,12 @@ Example: ti,hwmods = "cal"; reg = <0x4845B000 0x400>, <0x4845B800 0x40>, - <0x4845B900 0x40>, - <0x4A002e94 0x4>; + <0x4845B900 0x40>; reg-names = "cal_top", "cal_rx_core0", - "cal_rx_core1", - "camerrx_control"; + "cal_rx_core1"; interrupts = ; + syscon-camerrx = <&scm_conf 0xE94>; #address-cells = <1>; #size-cells = <0>; From patchwork Fri Oct 18 15:34:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179463 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="IWGYNEUX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqnM3d7Nz9sNx for ; Sat, 19 Oct 2019 02:33:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410605AbfJRPcH (ORCPT ); Fri, 18 Oct 2019 11:32:07 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:47644 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410487AbfJRPcH (ORCPT ); Fri, 18 Oct 2019 11:32:07 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW4EV013333; Fri, 18 Oct 2019 10:32:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412724; bh=1IFsv4aHfGxY2ANuXmzhcs4OdarMkTUyT1n5qDGGa7c=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IWGYNEUXK5dFD9FbMBRxPOvPH0apkpXxglU1ibA+7opOVY81RZOx7obpCSb89cLnJ TNngqVsE6H46nHYQvx6uKSswGA12Ui+HHUa8G1aHS9fXKyLfru6uBisFLBV69gKFa3 qZb3HVR41CjT7nWf1ow6XjIyvT9NlFJXkHX6xCV8= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW4DD105555; Fri, 18 Oct 2019 10:32:04 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:31:56 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:31:56 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15G080266; Fri, 18 Oct 2019 10:32:04 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot Subject: [Patch 02/19] dt-bindings: media: cal: update binding example Date: Fri, 18 Oct 2019 10:34:20 -0500 Message-ID: <20191018153437.20614-3-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update binding example to show proper endpoint properties and linkage. Signed-off-by: Benoit Parrot --- .../devicetree/bindings/media/ti-cal.txt | 32 ++++++++++--------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt index 782f801b12a9..6b56fddcfc4a 100644 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ b/Documentation/devicetree/bindings/media/ti-cal.txt @@ -27,7 +27,6 @@ Documentation/devicetree/bindings/media/video-interfaces.txt. Example: cal: cal@4845b000 { compatible = "ti,dra72-cal"; - ti,hwmods = "cal"; reg = <0x4845B000 0x400>, <0x4845B800 0x40>, <0x4845B900 0x40>; @@ -45,9 +44,10 @@ Example: csi2_0: port@0 { reg = <0>; - endpoint { - slave-mode; - remote-endpoint = <&ar0330_1>; + csi2_phy0: endpoint@0 { + remote-endpoint = <&csi2_cam0>; + clock-lanes = <0>; + data-lanes = <1 2>; }; }; csi2_1: port@1 { @@ -57,19 +57,21 @@ Example: }; i2c5: i2c@4807c000 { - ar0330@10 { - compatible = "ti,ar0330"; - reg = <0x10>; + status = "okay"; + clock-frequency = <400000>; - port { - #address-cells = <1>; - #size-cells = <0>; + ov5640@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clk_ov5640_fixed>; + clock-names = "xclk"; - ar0330_1: endpoint { - reg = <0>; - clock-lanes = <1>; - data-lanes = <0 2 3 4>; - remote-endpoint = <&csi2_0>; + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2_phy0>; + clock-lanes = <0>; + data-lanes = <1 2>; }; }; }; From patchwork Fri Oct 18 15:34:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179459 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="jHsdcfLY"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqlg3Kr8z9sPc for ; Sat, 19 Oct 2019 02:32:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410616AbfJRPcN (ORCPT ); Fri, 18 Oct 2019 11:32:13 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:47674 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2633278AbfJRPcL (ORCPT ); Fri, 18 Oct 2019 11:32:11 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW9N4013374; Fri, 18 Oct 2019 10:32:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412729; bh=uq1i+tWOuS4mskWSGZzRgqiAOAAKC9B8IF3qNOEobQw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jHsdcfLYcaRgy8ddrm1EwQL5JkP4OaF5gX/2vvnnbuFsz9Eix8zJkt25Cf7i4s+Jv BHUlmSrN/lZj1uzg9bPo93yLmuuoWjeHod82exjEopN+Tped7xrVzo8uxLfFigNQRD IbovdgaOiv8DUJf4yW/oN5Twn2X2cHADjmDVrYXE= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9IFW99c080454 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Oct 2019 10:32:09 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:32:01 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:32:01 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15K080266; Fri, 18 Oct 2019 10:32:09 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot , Jyri Sarha Subject: [Patch 06/19] dt-bindings: media: cal: update binding to add PHY LDO errata support Date: Fri, 18 Oct 2019 10:34:24 -0500 Message-ID: <20191018153437.20614-7-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update Device Tree bindings for the CAL driver to add support for the CSI2 PHY LDO errata workaround for pre-es2 devices. Signed-off-by: Benoit Parrot Signed-off-by: Jyri Sarha Acked-by: Rob Herring --- Documentation/devicetree/bindings/media/ti-cal.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt index 6b56fddcfc4a..d43870a2324b 100644 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ b/Documentation/devicetree/bindings/media/ti-cal.txt @@ -7,7 +7,9 @@ processing capability to connect CSI2 image-sensor modules to the DRA72x device. Required properties: -- compatible: must be "ti,dra72-cal" +- compatible: + Should be "ti,dra72-cal", for DRA72 controllers + Should be "ti,dra72-pre-es2-cal", for DRA72 controllers pre ES2.0 - reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX control address space - reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control From patchwork Fri Oct 18 15:34:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179461 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="nWU0iafn"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqmS6YTnz9sPJ for ; Sat, 19 Oct 2019 02:32:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410662AbfJRPcU (ORCPT ); Fri, 18 Oct 2019 11:32:20 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37106 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410644AbfJRPcR (ORCPT ); Fri, 18 Oct 2019 11:32:17 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFWGd2064264; Fri, 18 Oct 2019 10:32:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412736; bh=XaY2J1yWS1REEbEhThMHL6thB9OqgQLRfS7zT7RuWRk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nWU0iafnszNOgSJXKSDYx8xpzKhJk89BU42riD0hocQevm+/bMqL0SQ+1oWX/pJ28 jF2RW5d7Zn4HIZzndFMDrHbp46fSQv6/3MuoqMrGHwyy1uAUJBMeoVSQyB3gN4E1x1 /e+17jwlxIy3BHybjJRImuTwh+Xa7FVQ1xBm0y5I= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9IFWGjZ085121 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Oct 2019 10:32:16 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:32:15 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:32:07 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15P080266; Fri, 18 Oct 2019 10:32:15 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot Subject: [Patch 11/19] dt-bindings: media: cal: update binding to add DRA76x support Date: Fri, 18 Oct 2019 10:34:29 -0500 Message-ID: <20191018153437.20614-12-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update Device Tree bindings for the CAL driver to add DRA76x support. Signed-off-by: Benoit Parrot Acked-by: Rob Herring --- Documentation/devicetree/bindings/media/ti-cal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt index d43870a2324b..29fbbfb8be0d 100644 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ b/Documentation/devicetree/bindings/media/ti-cal.txt @@ -10,6 +10,7 @@ Required properties: - compatible: Should be "ti,dra72-cal", for DRA72 controllers Should be "ti,dra72-pre-es2-cal", for DRA72 controllers pre ES2.0 + Should be "ti,dra76-cal", for DRA76 controllers - reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX control address space - reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control From patchwork Fri Oct 18 15:34:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179462 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="YfN3c+9r"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqmV1hvSz9sPc for ; Sat, 19 Oct 2019 02:32:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2501960AbfJRPc5 (ORCPT ); Fri, 18 Oct 2019 11:32:57 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:47696 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410656AbfJRPcU (ORCPT ); Fri, 18 Oct 2019 11:32:20 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFWIjn013401; Fri, 18 Oct 2019 10:32:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412738; bh=ocDig6m7hMxk+9WkuMz+XpgOO+fIPZp9QBn6JbkNoi4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YfN3c+9rI0baegP+xudYb332XR5vyrO3mx/gaFpsSz8T05Jaqr4TkRkmK4OmgGBv3 bC0bDJtXc7baRJINnUdmssnOAuf95kxu1UqR8znZeoPrCtGjJw2X+GQRBJqAXll1i6 YSGx//VAqx6ZTe3ZXggo2tyT1QkUE4WMFbNI1srU= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9IFWIxH080798 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Oct 2019 10:32:18 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:32:10 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:32:10 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15R080266; Fri, 18 Oct 2019 10:32:18 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot Subject: [Patch 13/19] dt-bindings: media: cal: update binding to add AM654 support Date: Fri, 18 Oct 2019 10:34:31 -0500 Message-ID: <20191018153437.20614-14-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update Device Tree bindings for the CAL driver to add AM654 support. Signed-off-by: Benoit Parrot Acked-by: Rob Herring --- Documentation/devicetree/bindings/media/ti-cal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt index 29fbbfb8be0d..b7bf8492dc2a 100644 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ b/Documentation/devicetree/bindings/media/ti-cal.txt @@ -11,6 +11,7 @@ Required properties: Should be "ti,dra72-cal", for DRA72 controllers Should be "ti,dra72-pre-es2-cal", for DRA72 controllers pre ES2.0 Should be "ti,dra76-cal", for DRA76 controllers + Should be "ti,am654-cal", for AM654 controllers - reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX control address space - reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control From patchwork Fri Oct 18 15:34:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 1179460 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="jLqp5H1E"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46vqm50hQTz9sPc for ; Sat, 19 Oct 2019 02:32:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410715AbfJRPca (ORCPT ); Fri, 18 Oct 2019 11:32:30 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:40728 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410707AbfJRPc2 (ORCPT ); Fri, 18 Oct 2019 11:32:28 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9IFWRnv002721; Fri, 18 Oct 2019 10:32:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571412747; bh=WCW45BFjyaYF9dFU+6TLiqhLXA6kwWxcmbGkdoJoeto=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jLqp5H1E4cR8HOR3dLLt7E/aX5o+dSiMXk0tXgLGjqkAfXIRAnDivXZWJxbAsrD2M ghv8l2opGiDIGJZLMQbhQB4vOYTDa7GjYN3SHOr9ohFjn0Bglpf/rEb2HWVGZ99nhg zNHj6wbLdbxPwsY9QAMWDOjYjv0U60azXkW7zkDA= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9IFWRKd081245 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Oct 2019 10:32:27 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 10:32:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 10:32:18 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9IFW15X080266; Fri, 18 Oct 2019 10:32:27 -0500 From: Benoit Parrot To: Hans Verkuil , Rob Herring CC: , , , Benoit Parrot Subject: [Patch 19/19] dt-bindings: media: cal: convert binding to yaml Date: Fri, 18 Oct 2019 10:34:37 -0500 Message-ID: <20191018153437.20614-20-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018153437.20614-1-bparrot@ti.com> References: <20191018153437.20614-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert ti-cal.txt to ti,cal.yaml. Signed-off-by: Benoit Parrot --- .../devicetree/bindings/media/ti,cal.yaml | 186 ++++++++++++++++++ .../devicetree/bindings/media/ti-cal.txt | 82 -------- 2 files changed, 186 insertions(+), 82 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/ti,cal.yaml delete mode 100644 Documentation/devicetree/bindings/media/ti-cal.txt diff --git a/Documentation/devicetree/bindings/media/ti,cal.yaml b/Documentation/devicetree/bindings/media/ti,cal.yaml new file mode 100644 index 000000000000..c3fbb22b4571 --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,cal.yaml @@ -0,0 +1,186 @@ +# SPDX-License-Identifier: (GPL-2.0) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,cal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) Device Tree Bindings + +maintainers: + - Benoit Parrot + +description: |- + The Camera Adaptation Layer (CAL) is a key component for image capture + applications. The capture module provides the system interface and the + processing capability to connect CSI2 image-sensor modules to the + DRA72x device. + + CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes + should contain a 'port' child node with child 'endpoint' node. Please + refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + + compatible should be + "ti,dra72-cal", for DRA72 controllers + "ti,dra72-pre-es2-cal", for DRA72 controllers pre ES2.0 + "ti,dra76-cal", for DRA76 controllers + "ti,am654-cal", for AM654 controllers + +properties: + compatible: + items: + - enum: + - ti,dra72-cal + - ti,dra72-pre-es2-cal + - ti,dra76-cal + - ti,am654-cal + + reg: + minItems: 2 + items: + - description: The CAL main register region + - description: The RX Core0 (DPHY0) register region + - description: The RX Core1 (DPHY1) register region + + reg-names: + minItems: 2 + items: + - const: cal_top + - const: cal_rx_core0 + - const: cal_rx_core1 + + interrupts: + maxItems: 1 + + syscon-camerrx: + maxItems: 1 + items: + - description: + phandle to the device control module and offset to the + control_camerarx_core register + + clocks: + maxItems: 1 + description: functional clock + + clock-names: + items: + - const: fck + + power-domains: + description: + List of phandle and PM domain specifier as documented in + Documentation/devicetree/bindings/power/power_domain.txt + maxItems: 1 + + # See ./video-interfaces.txt for details + ports: + maxItems: 1 + type: object + additionalProperties: false + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + '^port@[0-9a-fA-F]+$': + minItems: 1 + maxItems: 2 + type: object + additionalProperties: false + + properties: + reg: + minItems: 1 + items: + - description: The port id + + patternProperties: + '^endpoint@[0-9a-fA-F]+$': + minItems: 1 + type: object + additionalProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + remote-endpoint: true + + required: + - remote-endpoint + + required: + - reg + +required: + - compatible + - reg + - reg-names + - interrupts + - syscon-camerrx + +additionalProperties: false + +examples: + - | + #include + + cal: cal@4845b000 { + compatible = "ti,dra72-cal"; + reg = <0x4845B000 0x400>, + <0x4845B800 0x40>, + <0x4845B900 0x40>; + reg-names = "cal_top", + "cal_rx_core0", + "cal_rx_core1"; + interrupts = ; + syscon-camerrx = <&scm_conf 0xE94>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi2_0: port@0 { + reg = <0>; + csi2_phy0: endpoint@0 { + remote-endpoint = <&csi2_cam0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; + + i2c5: i2c@4807c000 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + ov5640@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clk_ov5640_fixed>; + clock-names = "xclk"; + + port { + csi2_cam0: endpoint@0 { + remote-endpoint = <&csi2_phy0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/ti-cal.txt b/Documentation/devicetree/bindings/media/ti-cal.txt deleted file mode 100644 index b7bf8492dc2a..000000000000 --- a/Documentation/devicetree/bindings/media/ti-cal.txt +++ /dev/null @@ -1,82 +0,0 @@ -Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) ------------------------------------------------------- - -The Camera Adaptation Layer (CAL) is a key component for image capture -applications. The capture module provides the system interface and the -processing capability to connect CSI2 image-sensor modules to the -DRA72x device. - -Required properties: -- compatible: - Should be "ti,dra72-cal", for DRA72 controllers - Should be "ti,dra72-pre-es2-cal", for DRA72 controllers pre ES2.0 - Should be "ti,dra76-cal", for DRA76 controllers - Should be "ti,am654-cal", for AM654 controllers -- reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX - control address space -- reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control - registers -- interrupts: should contain IRQ line for the CAL; -- syscon-camerrx: phandle to the device control module and offset to the - control_camerarx_core register - This node is meant to replace the "camerrx_control" reg - entry above but "camerrx_control" is still handled - for backward compatibility. - -CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes -should contain a 'port' child node with child 'endpoint' node. Please -refer to the bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - cal: cal@4845b000 { - compatible = "ti,dra72-cal"; - reg = <0x4845B000 0x400>, - <0x4845B800 0x40>, - <0x4845B900 0x40>; - reg-names = "cal_top", - "cal_rx_core0", - "cal_rx_core1"; - interrupts = ; - syscon-camerrx = <&scm_conf 0xE94>; - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - csi2_0: port@0 { - reg = <0>; - csi2_phy0: endpoint@0 { - remote-endpoint = <&csi2_cam0>; - clock-lanes = <0>; - data-lanes = <1 2>; - }; - }; - csi2_1: port@1 { - reg = <1>; - }; - }; - }; - - i2c5: i2c@4807c000 { - status = "okay"; - clock-frequency = <400000>; - - ov5640@3c { - compatible = "ovti,ov5640"; - reg = <0x3c>; - - clocks = <&clk_ov5640_fixed>; - clock-names = "xclk"; - - port { - csi2_cam0: endpoint { - remote-endpoint = <&csi2_phy0>; - clock-lanes = <0>; - data-lanes = <1 2>; - }; - }; - }; - };