From patchwork Mon Nov 13 19:27:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 837513 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ybLKH4XvDz9sBd for ; Tue, 14 Nov 2017 06:28:34 +1100 (AEDT) Received: from localhost ([::1]:56013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKPH-0006d9-MN for incoming@patchwork.ozlabs.org; Mon, 13 Nov 2017 14:28:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43286) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKOo-0006ce-9V for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eEKOn-0000xm-DG for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:02 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47304) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eEKOn-0000xT-7S for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:01 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 43F186A7DF; Mon, 13 Nov 2017 19:28:00 +0000 (UTC) Received: from localhost (unknown [10.36.112.13]) by smtp.corp.redhat.com (Postfix) with ESMTP id B3F5587CBB; Mon, 13 Nov 2017 19:27:59 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Mon, 13 Nov 2017 20:27:46 +0100 Message-Id: <20171113192750.6505-2-marcandre.lureau@redhat.com> In-Reply-To: <20171113192750.6505-1-marcandre.lureau@redhat.com> References: <20171113192750.6505-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 13 Nov 2017 19:28:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v6 1/5] fw_cfg: fix the command line module name X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , somlo@cmu.edu, qemu-devel@nongnu.org, mst@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Marc-André Lureau Acked-by: Gabriel Somlo --- drivers/firmware/qemu_fw_cfg.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index 0e2011636fbb..5cfe39f7a45f 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -10,9 +10,9 @@ * and select subsets of aarch64), a Device Tree node (on arm), or using * a kernel module (or command line) parameter with the following syntax: * - * [fw_cfg.]ioport=@[::] + * [qemu_fw_cfg.]ioport=@[::] * or - * [fw_cfg.]mmio=@[::] + * [qemu_fw_cfg.]mmio=@[::] * * where: * := size of ioport or mmio range @@ -21,9 +21,9 @@ * := (optional) offset of data register * * e.g.: - * fw_cfg.ioport=2@0x510:0:1 (the default on x86) + * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86) * or - * fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm) + * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm) */ #include From patchwork Mon Nov 13 19:27:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 837514 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ybLMQ6hM7z9sBZ for ; Tue, 14 Nov 2017 06:30:26 +1100 (AEDT) Received: from localhost ([::1]:56022 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKR6-0007zA-VG for incoming@patchwork.ozlabs.org; Mon, 13 Nov 2017 14:30:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43348) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKOy-0006hq-0c for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eEKOw-00010f-Ev for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:12 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53648) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eEKOw-00010A-5x for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:10 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 522EF356E6; Mon, 13 Nov 2017 19:28:09 +0000 (UTC) Received: from localhost (unknown [10.36.112.13]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0DCEF98E72; Mon, 13 Nov 2017 19:28:01 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Mon, 13 Nov 2017 20:27:47 +0100 Message-Id: <20171113192750.6505-3-marcandre.lureau@redhat.com> In-Reply-To: <20171113192750.6505-1-marcandre.lureau@redhat.com> References: <20171113192750.6505-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 13 Nov 2017 19:28:09 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v6 2/5] fw_cfg: add DMA register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , somlo@cmu.edu, qemu-devel@nongnu.org, mst@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add an optional kernel module (or command line) parameter using the following syntax: [qemu_fw_cfg.]ioport=@[::[:]] or [qemu_fw_cfg.]mmio=@[::[:]] and initializes the register address using given or default offset. Signed-off-by: Marc-André Lureau Reviewed-by: Gabriel Somlo --- drivers/firmware/qemu_fw_cfg.c | 53 ++++++++++++++++++++++++++++++++---------- 1 file changed, 41 insertions(+), 12 deletions(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index 5cfe39f7a45f..1f3e8545dab7 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -10,20 +10,21 @@ * and select subsets of aarch64), a Device Tree node (on arm), or using * a kernel module (or command line) parameter with the following syntax: * - * [qemu_fw_cfg.]ioport=@[::] + * [qemu_fw_cfg.]ioport=@[::[:]] * or - * [qemu_fw_cfg.]mmio=@[::] + * [qemu_fw_cfg.]mmio=@[::[:]] * * where: * := size of ioport or mmio range * := physical base address of ioport or mmio range * := (optional) offset of control register * := (optional) offset of data register + * := (optional) offset of dma register * * e.g.: - * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86) + * qemu_fw_cfg.ioport=12@0x510:0:1:4 (the default on x86) * or - * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm) + * qemu_fw_cfg.mmio=16@0x9020000:8:0:16 (the default on arm) */ #include @@ -63,6 +64,7 @@ static resource_size_t fw_cfg_p_size; static void __iomem *fw_cfg_dev_base; static void __iomem *fw_cfg_reg_ctrl; static void __iomem *fw_cfg_reg_data; +static void __iomem *fw_cfg_reg_dma; /* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */ static DEFINE_MUTEX(fw_cfg_dev_lock); @@ -118,12 +120,14 @@ static void fw_cfg_io_cleanup(void) # if (defined(CONFIG_ARM) || defined(CONFIG_ARM64)) # define FW_CFG_CTRL_OFF 0x08 # define FW_CFG_DATA_OFF 0x00 +# define FW_CFG_DMA_OFF 0x10 # elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */ # define FW_CFG_CTRL_OFF 0x00 # define FW_CFG_DATA_OFF 0x02 # elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */ # define FW_CFG_CTRL_OFF 0x00 # define FW_CFG_DATA_OFF 0x01 +# define FW_CFG_DMA_OFF 0x04 # else # error "QEMU FW_CFG not available on this architecture!" # endif @@ -133,7 +137,7 @@ static void fw_cfg_io_cleanup(void) static int fw_cfg_do_platform_probe(struct platform_device *pdev) { char sig[FW_CFG_SIG_SIZE]; - struct resource *range, *ctrl, *data; + struct resource *range, *ctrl, *data, *dma; /* acquire i/o range details */ fw_cfg_is_mmio = false; @@ -170,6 +174,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) /* were custom register offsets provided (e.g. on the command line)? */ ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl"); data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data"); + dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma"); if (ctrl && data) { fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start; fw_cfg_reg_data = fw_cfg_dev_base + data->start; @@ -179,6 +184,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF; } + if (dma) + fw_cfg_reg_dma = fw_cfg_dev_base + dma->start; +#ifdef FW_CFG_DMA_OFF + else + fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF; +#endif + /* verify fw_cfg device signature */ fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE); if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) { @@ -628,6 +640,7 @@ static struct platform_device *fw_cfg_cmdline_dev; /* use special scanf/printf modifier for phys_addr_t, resource_size_t */ #define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \ ":%" __PHYS_ADDR_PREFIX "i" \ + ":%" __PHYS_ADDR_PREFIX "i%n" \ ":%" __PHYS_ADDR_PREFIX "i%n" #define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \ @@ -637,12 +650,15 @@ static struct platform_device *fw_cfg_cmdline_dev; ":%" __PHYS_ADDR_PREFIX "u" \ ":%" __PHYS_ADDR_PREFIX "u" +#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \ + ":%" __PHYS_ADDR_PREFIX "u" + static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) { - struct resource res[3] = {}; + struct resource res[4] = {}; char *str; phys_addr_t base; - resource_size_t size, ctrl_off, data_off; + resource_size_t size, ctrl_off, data_off, dma_off; int processed, consumed = 0; /* only one fw_cfg device can exist system-wide, so if one @@ -658,19 +674,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) /* consume "" portion of command line argument */ size = memparse(arg, &str); - /* get "@[::]" chunks */ + /* get "@[::[:]]" chunks */ processed = sscanf(str, PH_ADDR_SCAN_FMT, &base, &consumed, - &ctrl_off, &data_off, &consumed); + &ctrl_off, &data_off, &consumed, + &dma_off, &consumed); - /* sscanf() must process precisely 1 or 3 chunks: + /* sscanf() must process precisely 1, 3 or 4 chunks: * is mandatory, optionally followed by - * and ; + * and , and ; * there must be no extra characters after the last chunk, * so str[consumed] must be '\0'. */ if (str[consumed] || - (processed != 1 && processed != 3)) + (processed != 1 && processed != 3 && processed != 4)) return -EINVAL; res[0].start = base; @@ -687,6 +704,11 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) res[2].start = data_off; res[2].flags = IORESOURCE_REG; } + if (processed > 3) { + res[3].name = "dma"; + res[3].start = dma_off; + res[3].flags = IORESOURCE_REG; + } /* "processed" happens to nicely match the number of resources * we need to pass in to this platform device. @@ -721,6 +743,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp) fw_cfg_cmdline_dev->resource[0].start, fw_cfg_cmdline_dev->resource[1].start, fw_cfg_cmdline_dev->resource[2].start); + case 4: + return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT, + resource_size(&fw_cfg_cmdline_dev->resource[0]), + fw_cfg_cmdline_dev->resource[0].start, + fw_cfg_cmdline_dev->resource[1].start, + fw_cfg_cmdline_dev->resource[2].start, + fw_cfg_cmdline_dev->resource[3].start); } /* Should never get here */ From patchwork Mon Nov 13 19:27:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 837518 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ybLQc3dykz9sBd for ; Tue, 14 Nov 2017 06:33:12 +1100 (AEDT) Received: from localhost ([::1]:56043 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKTm-0002EL-BR for incoming@patchwork.ozlabs.org; Mon, 13 Nov 2017 14:33:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eEKP6-0006nH-Kt for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eEKP3-00012s-G9 for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:20 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37622) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eEKP3-00012k-6o for qemu-devel@nongnu.org; Mon, 13 Nov 2017 14:28:17 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5EE7DC0587FA; Mon, 13 Nov 2017 19:28:16 +0000 (UTC) Received: from localhost (unknown [10.36.112.13]) by smtp.corp.redhat.com (Postfix) with ESMTP id D5AB687C8B; Mon, 13 Nov 2017 19:28:11 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Mon, 13 Nov 2017 20:27:48 +0100 Message-Id: <20171113192750.6505-4-marcandre.lureau@redhat.com> In-Reply-To: <20171113192750.6505-1-marcandre.lureau@redhat.com> References: <20171113192750.6505-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Nov 2017 19:28:16 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v6 3/5] fw_cfg: do DMA read operation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , somlo@cmu.edu, qemu-devel@nongnu.org, mst@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Modify fw_cfg_read_blob() to use DMA if the device supports it. Return errors, because the operation may fail. To avoid polling with unbound amount of time, the DMA operation is expected to complete within 200ms, or will return ETIME error. We may want to switch all the *buf addresses to use only kmalloc'ed buffers (instead of using stack/image addresses with dma=false). Signed-off-by: Marc-André Lureau Reviewed-by: Gabriel Somlo --- drivers/firmware/qemu_fw_cfg.c | 154 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 137 insertions(+), 17 deletions(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index 1f3e8545dab7..2ac4cd869fe6 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include MODULE_AUTHOR("Gabriel L. Somlo "); MODULE_DESCRIPTION("QEMU fw_cfg sysfs support"); @@ -43,12 +45,26 @@ MODULE_LICENSE("GPL"); #define FW_CFG_ID 0x01 #define FW_CFG_FILE_DIR 0x19 +#define FW_CFG_VERSION_DMA 0x02 +#define FW_CFG_DMA_CTL_ERROR 0x01 +#define FW_CFG_DMA_CTL_READ 0x02 +#define FW_CFG_DMA_CTL_SKIP 0x04 +#define FW_CFG_DMA_CTL_SELECT 0x08 +#define FW_CFG_DMA_CTL_WRITE 0x10 +#define FW_CFG_DMA_TIMEOUT 200 /* ms */ + /* size in bytes of fw_cfg signature */ #define FW_CFG_SIG_SIZE 4 /* fw_cfg "file name" is up to 56 characters (including terminating nul) */ #define FW_CFG_MAX_FILE_PATH 56 +/* platform device for dma mapping */ +static struct device *dev; + +/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */ +static u32 fw_cfg_rev; + /* fw_cfg file directory entry type */ struct fw_cfg_file { u32 size; @@ -57,6 +73,12 @@ struct fw_cfg_file { char name[FW_CFG_MAX_FILE_PATH]; }; +struct fw_cfg_dma { + u32 control; + u32 length; + u64 address; +} __packed; + /* fw_cfg device i/o register addresses */ static bool fw_cfg_is_mmio; static phys_addr_t fw_cfg_p_base; @@ -75,12 +97,93 @@ static inline u16 fw_cfg_sel_endianness(u16 key) return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key); } +static inline bool fw_cfg_dma_enabled(void) +{ + return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma; +} + +static bool fw_cfg_wait_for_control(struct fw_cfg_dma *d, unsigned long timeout) +{ + ktime_t start; + ktime_t stop; + + start = ktime_get(); + stop = ktime_add(start, ms_to_ktime(timeout)); + + do { + if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0) + return true; + + usleep_range(50, 100); + } while (ktime_before(ktime_get(), stop)); + + return false; +} + +static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control) +{ + dma_addr_t dma_addr = 0; + struct fw_cfg_dma *d; + dma_addr_t dma; + ssize_t ret = length; + enum dma_data_direction dir = + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0); + + if (address && length) { + dma_addr = dma_map_single(dev, address, length, dir); + if (dma_mapping_error(NULL, dma_addr)) { + WARN(1, "%s: failed to map address\n", __func__); + return -EFAULT; + } + } + + d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA); + if (!d) { + ret = -ENOMEM; + goto end; + } + + dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL); + if (dma_mapping_error(NULL, dma)) { + WARN(1, "%s: failed to map fw_cfg_dma\n", __func__); + ret = -EFAULT; + goto end; + } + + *d = (struct fw_cfg_dma) { + .address = cpu_to_be64(dma_addr), + .length = cpu_to_be32(length), + .control = cpu_to_be32(control) + }; + + iowrite32be((u64)dma >> 32, fw_cfg_reg_dma); + iowrite32be(dma, fw_cfg_reg_dma + 4); + + if (!fw_cfg_wait_for_control(d, FW_CFG_DMA_TIMEOUT)) { + WARN(1, "%s: timeout", __func__); + ret = -ETIME; + } else if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) { + ret = -EIO; + } + + dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL); + +end: + kfree(d); + if (dma_addr) + dma_unmap_single(dev, dma_addr, length, dir); + + return ret; +} + /* read chunk of given fw_cfg blob (caller responsible for sanity-check) */ -static inline void fw_cfg_read_blob(u16 key, - void *buf, loff_t pos, size_t count) +static ssize_t fw_cfg_read_blob(u16 key, + void *buf, loff_t pos, size_t count, + bool dma) { u32 glk = -1U; acpi_status status; + ssize_t ret = count; /* If we have ACPI, ensure mutual exclusion against any potential * device access by the firmware, e.g. via AML methods: @@ -90,17 +193,36 @@ static inline void fw_cfg_read_blob(u16 key, /* Should never get here */ WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n"); memset(buf, 0, count); - return; + return -EINVAL; } mutex_lock(&fw_cfg_dev_lock); - iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); - while (pos-- > 0) - ioread8(fw_cfg_reg_data); - ioread8_rep(fw_cfg_reg_data, buf, count); + if (dma && fw_cfg_dma_enabled()) { + if (pos == 0) { + ret = fw_cfg_dma_transfer(buf, count, key << 16 + | FW_CFG_DMA_CTL_SELECT + | FW_CFG_DMA_CTL_READ); + } else { + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); + ret = fw_cfg_dma_transfer(NULL, pos, FW_CFG_DMA_CTL_SKIP); + if (ret < 0) + goto end; + ret = fw_cfg_dma_transfer(buf, count, + FW_CFG_DMA_CTL_READ); + } + } else { + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); + while (pos-- > 0) + ioread8(fw_cfg_reg_data); + ioread8_rep(fw_cfg_reg_data, buf, count); + } + +end: mutex_unlock(&fw_cfg_dev_lock); acpi_release_global_lock(glk); + + return ret; } /* clean up fw_cfg device i/o */ @@ -192,7 +314,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) #endif /* verify fw_cfg device signature */ - fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE); + fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false); if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) { fw_cfg_io_cleanup(); return -ENODEV; @@ -201,9 +323,6 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) return 0; } -/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */ -static u32 fw_cfg_rev; - static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf) { return sprintf(buf, "%u\n", fw_cfg_rev); @@ -351,8 +470,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj, if (count > entry->f.size - pos) count = entry->f.size - pos; - fw_cfg_read_blob(entry->f.select, buf, pos, count); - return count; + return fw_cfg_read_blob(entry->f.select, buf, pos, count, true); } static struct bin_attribute fw_cfg_sysfs_attr_raw = { @@ -505,7 +623,7 @@ static int fw_cfg_register_dir_entries(void) struct fw_cfg_file *dir; size_t dir_size; - fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count)); + fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false); count = be32_to_cpu(count); dir_size = count * sizeof(struct fw_cfg_file); @@ -513,7 +631,7 @@ static int fw_cfg_register_dir_entries(void) if (!dir) return -ENOMEM; - fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size); + fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true); for (i = 0; i < count; i++) { dir[i].size = be32_to_cpu(dir[i].size); @@ -544,9 +662,10 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev) * one fw_cfg device exist system-wide, so if one was already found * earlier, we might as well stop here. */ - if (fw_cfg_sel_ko) + if (dev) return -EBUSY; + dev = &pdev->dev; /* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */ err = -ENOMEM; fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko); @@ -562,7 +681,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev) goto err_probe; /* get revision number, add matching top-level attribute */ - fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev)); + fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false); fw_cfg_rev = le32_to_cpu(fw_cfg_rev); err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr); if (err) @@ -587,6 +706,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev) err_name: fw_cfg_kobj_cleanup(fw_cfg_sel_ko); err_sel: + dev = NULL; return err; }