From patchwork Sun Sep 29 07:42:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1168961 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="P5w8n9Yv"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46gyGs3DZtz9sDB for ; Sun, 29 Sep 2019 17:44:37 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1E881C21E3A; Sun, 29 Sep 2019 07:43:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C76FEC21F9F; Sun, 29 Sep 2019 07:43:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 50434C21FDB; Sun, 29 Sep 2019 07:43:02 +0000 (UTC) Received: from mail-pl1-f193.google.com (mail-pl1-f193.google.com [209.85.214.193]) by lists.denx.de (Postfix) with ESMTPS id 44549C21F63 for ; Sun, 29 Sep 2019 07:43:00 +0000 (UTC) Received: by mail-pl1-f193.google.com with SMTP id k7so2652506pll.1 for ; Sun, 29 Sep 2019 00:43:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YsO2582kdCb52XVETayMm5uVUzw5aBQ4czYK++c5xVI=; b=P5w8n9YvCQV8nS96S9GdUgXxH0kJ8a55GDDMsmhnRguKwJnxO97E1EqeB7m4Jy/qMK N31QgflYung3JK+BANwZrbprs2wnzwtbr2LSRGk9xfTFf45GNOtGU4E80d7T1RODQzra mAgu6cXw8Pjxd02W5lT1/2y2lZNjOGVN9c1d4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YsO2582kdCb52XVETayMm5uVUzw5aBQ4czYK++c5xVI=; b=NhSV3V2YEIKlyloDilhBF53tPq3u2h0yHB6ts9T73897a4/hjIlVuedfG0ATWMs74M WwYDOoycEwjKrFU8mSfveFuqc5tk7bobbH/DNpj0bfwL9V8q837PBTcONwWiHX7bj61V yTQH79CjXrytDxKetmLaBLOs2AbNYzncjf284Mzm7hbDTGj0DDiVOY7V4Isvc+7VvMfh RSZu9wFooK3bDEUWvsSPILIrErriWsjf/VsipjGhCD+G+MPlWRq28Ul7+cfHfgeispiU ZUW47/RKPyswbSSJ+YLsaDGHV9jBIq3eHB/0TqJyaXi3RnEfH8qVMktmkW7aphguXogh GxkQ== X-Gm-Message-State: APjAAAWzgH+zGAAiToKMgVNUPT/5fumAvl+kCz0TwdqCVZ95lkANqveY 0Ps49QTPLhUdCXiUzj9QI5j1kQ== X-Google-Smtp-Source: APXvYqzS+MbY/KYfVjhkNbXIPGMkpSX2hNbLUirmsi986UiAQhaejTHEiWFfk+XXfGILaG8CQyM6FQ== X-Received: by 2002:a17:902:fe86:: with SMTP id x6mr14219224plm.28.1569742978434; Sun, 29 Sep 2019 00:42:58 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id x9sm29548432pje.27.2019.09.29.00.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 00:42:57 -0700 (PDT) From: Jagan Teki To: Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Bin Meng Date: Sun, 29 Sep 2019 13:12:35 +0530 Message-Id: <20190929074239.11575-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190929074239.11575-1-jagan@amarulasolutions.com> References: <20190929074239.11575-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com Subject: [U-Boot] [PATCH 1/5] riscv: dts: Add hifive-unleashed-a00 dts from Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Sync the hifive-unleashed-a00 dts from Linux with below commit details: commit 11ae2d892139a1086f257188d457ddcb71ab5257 Author: Paul Walmsley Date: Thu Jul 25 13:41:31 2019 -0700 riscv: dts: fu540-c000: drop "timebase-frequency" Idea is to periodically sync the dts from Linux instead of tweeking internal changes one after another, so better not add any intermediate changes in between. This would help to maintain the dts files easy and meaningful since we are reusing devicetree files from Linux. Signed-off-by: Jagan Teki --- arch/riscv/dts/Makefile | 1 + arch/riscv/dts/fu540-c000.dtsi | 235 ++++++++++++++++++++++++ arch/riscv/dts/hifive-unleashed-a00.dts | 88 +++++++++ 3 files changed, 324 insertions(+) create mode 100644 arch/riscv/dts/fu540-c000.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00.dts diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index f9cd606a9a..4f30e6936f 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb +dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb targets += $(dtb-y) diff --git a/arch/riscv/dts/fu540-c000.dtsi b/arch/riscv/dts/fu540-c000.dtsi new file mode 100644 index 0000000000..42b5ec2231 --- /dev/null +++ b/arch/riscv/dts/fu540-c000.dtsi @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2018-2019 SiFive, Inc */ + +/dts-v1/; + +#include + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "sifive,fu540-c000", "sifive,fu540"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu0: cpu@0 { + compatible = "sifive,e51", "sifive,rocket0", "riscv"; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <16384>; + reg = <0>; + riscv,isa = "rv64imac"; + status = "disabled"; + cpu0_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + cpu1: cpu@1 { + compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv39"; + reg = <1>; + riscv,isa = "rv64imafdc"; + tlb-split; + cpu1_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + cpu2: cpu@2 { + clock-frequency = <0>; + compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv39"; + reg = <2>; + riscv,isa = "rv64imafdc"; + tlb-split; + cpu2_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + cpu3: cpu@3 { + clock-frequency = <0>; + compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv39"; + reg = <3>; + riscv,isa = "rv64imafdc"; + tlb-split; + cpu3_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + cpu4: cpu@4 { + clock-frequency = <0>; + compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv39"; + reg = <4>; + riscv,isa = "rv64imafdc"; + tlb-split; + cpu4_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + }; + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "sifive,fu540-c000", "sifive,fu540", "simple-bus"; + ranges; + plic0: interrupt-controller@c000000 { + #interrupt-cells = <1>; + compatible = "sifive,plic-1.0.0"; + reg = <0x0 0xc000000 0x0 0x4000000>; + riscv,ndev = <53>; + interrupt-controller; + interrupts-extended = < + &cpu0_intc 0xffffffff + &cpu1_intc 0xffffffff &cpu1_intc 9 + &cpu2_intc 0xffffffff &cpu2_intc 9 + &cpu3_intc 0xffffffff &cpu3_intc 9 + &cpu4_intc 0xffffffff &cpu4_intc 9>; + }; + prci: clock-controller@10000000 { + compatible = "sifive,fu540-c000-prci"; + reg = <0x0 0x10000000 0x0 0x1000>; + clocks = <&hfclk>, <&rtcclk>; + #clock-cells = <1>; + }; + uart0: serial@10010000 { + compatible = "sifive,fu540-c000-uart", "sifive,uart0"; + reg = <0x0 0x10010000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <4>; + clocks = <&prci PRCI_CLK_TLCLK>; + status = "disabled"; + }; + uart1: serial@10011000 { + compatible = "sifive,fu540-c000-uart", "sifive,uart0"; + reg = <0x0 0x10011000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <5>; + clocks = <&prci PRCI_CLK_TLCLK>; + status = "disabled"; + }; + i2c0: i2c@10030000 { + compatible = "sifive,fu540-c000-i2c", "sifive,i2c0"; + reg = <0x0 0x10030000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <50>; + clocks = <&prci PRCI_CLK_TLCLK>; + reg-shift = <2>; + reg-io-width = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + qspi0: spi@10040000 { + compatible = "sifive,fu540-c000-spi", "sifive,spi0"; + reg = <0x0 0x10040000 0x0 0x1000 + 0x0 0x20000000 0x0 0x10000000>; + interrupt-parent = <&plic0>; + interrupts = <51>; + clocks = <&prci PRCI_CLK_TLCLK>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + qspi1: spi@10041000 { + compatible = "sifive,fu540-c000-spi", "sifive,spi0"; + reg = <0x0 0x10041000 0x0 0x1000 + 0x0 0x30000000 0x0 0x10000000>; + interrupt-parent = <&plic0>; + interrupts = <52>; + clocks = <&prci PRCI_CLK_TLCLK>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + qspi2: spi@10050000 { + compatible = "sifive,fu540-c000-spi", "sifive,spi0"; + reg = <0x0 0x10050000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <6>; + clocks = <&prci PRCI_CLK_TLCLK>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + eth0: ethernet@10090000 { + compatible = "sifive,fu540-c000-gem"; + interrupt-parent = <&plic0>; + interrupts = <53>; + reg = <0x0 0x10090000 0x0 0x2000 + 0x0 0x100a0000 0x0 0x1000>; + local-mac-address = [00 00 00 00 00 00]; + clock-names = "pclk", "hclk"; + clocks = <&prci PRCI_CLK_GEMGXLPLL>, + <&prci PRCI_CLK_GEMGXLPLL>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + }; +}; diff --git a/arch/riscv/dts/hifive-unleashed-a00.dts b/arch/riscv/dts/hifive-unleashed-a00.dts new file mode 100644 index 0000000000..7397b740b4 --- /dev/null +++ b/arch/riscv/dts/hifive-unleashed-a00.dts @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2018-2019 SiFive, Inc */ + +#include "fu540-c000.dtsi" + +/* Clock frequency (in Hz) of the PCB crystal for rtcclk */ +#define RTCCLK_FREQ 1000000 + +/ { + #address-cells = <2>; + #size-cells = <2>; + model = "SiFive HiFive Unleashed A00"; + compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000"; + + chosen { + stdout-path = "/soc/serial@10010000:115200"; + }; + + cpus { + timebase-frequency = ; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x2 0x00000000>; + }; + + soc { + }; + + hfclk: hfclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333333>; + clock-output-names = "hfclk"; + }; + + rtcclk: rtcclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = ; + clock-output-names = "rtcclk"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&qspi0 { + status = "okay"; + flash@0 { + compatible = "issi,is25wp256", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&qspi2 { + status = "okay"; + mmc@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <20000000>; + voltage-ranges = <3300 3300>; + disable-wp; + }; +}; + +ð0 { + status = "okay"; + phy-mode = "gmii"; + phy-handle = <&phy0>; + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; From patchwork Sun Sep 29 07:42:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1168962 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Wz4m62vF"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46gyGx083tz9sDB for ; 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Sun, 29 Sep 2019 00:43:02 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id x9sm29548432pje.27.2019.09.29.00.42.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 00:43:01 -0700 (PDT) From: Jagan Teki To: Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Bin Meng Date: Sun, 29 Sep 2019 13:12:36 +0530 Message-Id: <20190929074239.11575-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190929074239.11575-1-jagan@amarulasolutions.com> References: <20190929074239.11575-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com Subject: [U-Boot] [PATCH 2/5] sifive: fu540: Enable OF_SEPARATE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use dts support from U-Boot via OF_SEPARATE instead of depending from opensbi. This would help to make the necessary changes in drivers and devicetrees in uboot tree itself. this feature would also be helpful to not pass dtb during opensbi builds. Signed-off-by: Jagan Teki --- configs/sifive_fu540_defconfig | 3 ++- doc/board/sifive/fu540.rst | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 48865e5f11..979d0a0418 100644 --- a/configs/sifive_fu540_defconfig +++ b/configs/sifive_fu540_defconfig @@ -6,6 +6,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_MISC_INIT_R=y +CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_SEPARATE=y diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 7807f5b2c1..91b94ee06f 100644 --- a/doc/board/sifive/fu540.rst +++ b/doc/board/sifive/fu540.rst @@ -58,7 +58,7 @@ firmware. We need to compile OpenSBI with below command: .. code-block:: none - make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH= FW_PAYLOAD_FDT_PATH= + make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH= (Note: Prefer hifive-unleashed-a00.dtb from Linux-5.3 or higher) (Note: Linux-5.2 is also fine but it does not have ethernet DT node) From patchwork Sun Sep 29 07:42:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1168963 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fDb7vYqJ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46gyH11xTBz9sDB for ; Sun, 29 Sep 2019 17:44:45 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id F1314C21F6A; Sun, 29 Sep 2019 07:43:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 1A040C21F7E; Sun, 29 Sep 2019 07:43:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BBBC6C21F91; Sun, 29 Sep 2019 07:43:08 +0000 (UTC) Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) by lists.denx.de (Postfix) with ESMTPS id 95080C21F91 for ; Sun, 29 Sep 2019 07:43:07 +0000 (UTC) Received: by mail-pf1-f194.google.com with SMTP id y5so3773652pfo.4 for ; Sun, 29 Sep 2019 00:43:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uUM1zMOvIPRV+Js79P2StINIB83dtbDevSTpSsBcWGA=; b=fDb7vYqJrExOYrGO29PTe6ShfxJ0Jf8haAhRNJs/qP8y2IuTarJniy0Yjev7VNL/hj BGvuiRy8tA6Gos3NQUme7ent87zqcGNqeRlTdKmkaGE8O+JywEkAj5m1ZqjBaMdkP9k0 MzajNILQYupGoxjQuxiO4+FPD200RO4sRP/LQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uUM1zMOvIPRV+Js79P2StINIB83dtbDevSTpSsBcWGA=; b=OMMYgrSffFPanQT6ZsLRT6ZcNaguOGYRhqkSey9n6BYXx6Wpa6iFVjqMAf5Ytl5DRA YzXMPoNrNtbWHI0E7fR4+RB/hXeV4h3F3/msZcPb2B2XgedZfk5dJu2tbYcV/ot9WA5n ad6QT1AYEymHuBJQXt+1xF2Z6rBRs4lQpLnZbB8t5x04iracQs/3PkELkccIfcB1mv+D NS5BZhe0I2IzW8H7pb4h52PQrWefsms6ynURJZljX0oWrcY9U8h1TBw+f3yCgqcXSBg3 iQB/dsMnsdLy4IJPLiOAHf4vfmSo24FBNUEKhD9TS0g+yRUfnSJwQU//s/GyGainTXMR olHg== X-Gm-Message-State: APjAAAWEW5mioS7np5C4+NgfStdfMiLFmfhrT3L3ghvQS2LOGxJInX7S VcFUrjNpWOySXWxyVS7hnmV0gA== X-Google-Smtp-Source: APXvYqwoIITj+Qp3RKroBEwMkx76pyj2P/MSd8ZR4NJSi1Olc6K99mITPe7Y8cCffYSr8au/h1sJ0Q== X-Received: by 2002:a62:5cc3:: with SMTP id q186mr14492351pfb.15.1569742986080; Sun, 29 Sep 2019 00:43:06 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id x9sm29548432pje.27.2019.09.29.00.43.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 00:43:05 -0700 (PDT) From: Jagan Teki To: Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Bin Meng Date: Sun, 29 Sep 2019 13:12:37 +0530 Message-Id: <20190929074239.11575-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190929074239.11575-1-jagan@amarulasolutions.com> References: <20190929074239.11575-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com Subject: [U-Boot] [PATCH 3/5] mtd: spi-nor: ids: Add is25wp256 chip X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add is25wp256, chip to spi-nor id table. Tested on Sifive fuse540 board. Signed-off-by: Jagan Teki Reviewed-by: Bin Meng Tested-by: Bin Meng --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 6996c0a286..04db986561 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -128,6 +128,8 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("is25wp128", 0x9d7018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wp256", 0x9d7019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ /* Macronix */ From patchwork Sun Sep 29 07:42:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1168964 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="V3H1jv8B"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46gyHH3b3yz9sN1 for ; Sun, 29 Sep 2019 17:44:59 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 2EB15C21F58; Sun, 29 Sep 2019 07:43:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DDD9FC21F7E; Sun, 29 Sep 2019 07:43:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 35553C21F74; Sun, 29 Sep 2019 07:43:11 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.denx.de (Postfix) with ESMTPS id 21FE5C21FC7 for ; Sun, 29 Sep 2019 07:43:11 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id w8so2188020plq.5 for ; Sun, 29 Sep 2019 00:43:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WCrSXHULd2WrBjIQ3nvzpUExJcEaw9mMZr11Mt1cgm0=; b=V3H1jv8BTfisZ+cLHlxm4PBctbe4BweXMBY8ADeDV7yytDLjO/ywfxdH6un7FhQPX8 Sp36fkXYLHTMpHONlHSNWbsZyK9NQmcdkvwW7CzP8Ikd7CtP0eG68ajg2xThLksINQy6 Vju2k3DMS+y1pd5+gUkKqzFnGDvyVkvIoIrT8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WCrSXHULd2WrBjIQ3nvzpUExJcEaw9mMZr11Mt1cgm0=; b=Rh2JJnAWR6kZ4kc0tFkFXrdDECT3XcmJO0TfeyfT6JkWw4eHnKGH2Yf0iHs0iOeCzf Fbhs0wJ2i/tpHOAgMUGq2jQbiKF+p9FDp9SvSGHtBQ7b1nm9i6QBMAVWVrRAlotkfm9n dMqmtg38DJcIOjLsKIYZE6HH0Zb1qVW1hZLyaidz8GI8PHg1wuh015DkecS/uJM1g6cq gANPEdEKMe+xm/I5SUikrETJPHDCRkdyb+heeoLAIjcnxYEnuVwcvJ4dEh2QIf/q6qkE dGxqdBywl7eqh93S/VTqpP+o5ngmBlt2zUk9FCl4uwVYQNWGrovlqIz66/TAo+gWvyGl /2dA== X-Gm-Message-State: APjAAAX8CE9Dtx1qdNWlSYAtuhvhFH59uGVMVlIVHiKtVMNU+0CkPJ2g 7pMo13KFVT+LSmg84Zcs7WrMPQ== X-Google-Smtp-Source: APXvYqwKtVqGyDRKlAKSaiyzGYhLcBaGDam7CUhbOcMMaTDOfqq7k4sfQ0Xpc2Xi2P2UH6Nt8COQYA== X-Received: by 2002:a17:902:a504:: with SMTP id s4mr14069631plq.221.1569742989626; Sun, 29 Sep 2019 00:43:09 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id x9sm29548432pje.27.2019.09.29.00.43.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 00:43:09 -0700 (PDT) From: Jagan Teki To: Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Bin Meng Date: Sun, 29 Sep 2019 13:12:38 +0530 Message-Id: <20190929074239.11575-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190929074239.11575-1-jagan@amarulasolutions.com> References: <20190929074239.11575-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com Subject: [U-Boot] [PATCH 4/5] riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add u-boot specific dts file for hifive-unleashed-a00, this would help to add u-boot specific properties and other node changes without touching the base dts(i) files which are easy to sync from Linux. Added spi2 alias for qspi2 as an initial u-boot specific property change. spi probing in current dm model is very much rely on aliases numbering. even though the qspi2 can't comes under any associated spi nor flash it would require to specify the same to make proper binding happen for other spi slaves. Signed-off-by: Jagan Teki --- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi new file mode 100644 index 0000000000..25ec8265a5 --- /dev/null +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +/ { + aliases { + spi2 = &qspi2; + }; +}; From patchwork Sun Sep 29 07:42:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1168965 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="USg1i1vl"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46gyJN1hHQz9sDB for ; Sun, 29 Sep 2019 17:45:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id CDA14C21F9F; Sun, 29 Sep 2019 07:44:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C4E5FC21E1D; Sun, 29 Sep 2019 07:44:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 82D1BC21C51; Sun, 29 Sep 2019 07:43:17 +0000 (UTC) Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by lists.denx.de (Postfix) with ESMTPS id C1542C21F58 for ; Sun, 29 Sep 2019 07:43:14 +0000 (UTC) Received: by mail-pf1-f193.google.com with SMTP id q5so3748096pfg.13 for ; Sun, 29 Sep 2019 00:43:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VAanRpCooQgBl0B4V+aklX/MJVMCbkOY2knjzJuYFZI=; b=USg1i1vlK1LY56OxZOR7xGH+23Ast/pJthQnv8dxnqbaPbw6qFI68z9OJvVusWhBNW 8Y7MozxuHdLN2U/InNNCbtc1YKfB4K3vgEkq7jTKF74b9YOFOqBJ/LVDw/sLLxxdNKVP UOMTgFx0Oa4t9+ufIhJ30IVB1Q7ZYX/p5VXow= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VAanRpCooQgBl0B4V+aklX/MJVMCbkOY2knjzJuYFZI=; b=jlFyx3flR7i+xfmYeV+/zcbi+Vj6X1iBahltkBV7wOCsYNtRfhQmpcXMLGu7TiEsTy G2d7z8cnkBNeV//K0q3WvD7lnHWU5axYKnNM3BBIFiXy+6PnPOZn0i65QnAyW7lS4rU1 xz7h3q7lHaEjRXcade9VC8+cMFzNXG3HYMGfoE8L93RLh1u76ZIHI3JFr0qvHnNwIz1G UTC9mlwJo22aPaoZPpqxr/Uta+Z04T6eYZdGQ8VM5xw5+Z20BWC34Ix7OcEO9yokrvEZ rm/rtau3vrTpQvQSDiGz6XO7KP+AZO54p36V5xunhqBWLvzZZok0xX7u5UwzrIvHL4GI g0og== X-Gm-Message-State: APjAAAV2uiUfRFZTablIjjXhACeCPsZC1Q89CkH85B6BMHJAp5HsckXz gVqBzQlBNKyZ3ttjsTtqFeBV6A== X-Google-Smtp-Source: APXvYqxNjo5ciMuu5YksdsfXRU8P54DdAA2jo6Ow2hEfNJ7NNJzXkHX3wU9QS4r0kyl9OY0rFAJL5Q== X-Received: by 2002:a17:90a:322c:: with SMTP id k41mr20154698pjb.32.1569742993301; Sun, 29 Sep 2019 00:43:13 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id x9sm29548432pje.27.2019.09.29.00.43.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 00:43:12 -0700 (PDT) From: Jagan Teki To: Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Bin Meng Date: Sun, 29 Sep 2019 13:12:39 +0530 Message-Id: <20190929074239.11575-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190929074239.11575-1-jagan@amarulasolutions.com> References: <20190929074239.11575-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com Subject: [U-Boot] [PATCH 5/5] sifive: fu540: Enable spi-nor flash support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" HiFive Unleashed A00 has internal is25wp256 spi-nor flash, so enable the same. added test result log for future reference. Tested on Sifive fuse540 board. Signed-off-by: Jagan Teki Reviewed-by: Bin Meng Tested-by: Bin Meng --- .../dts/hifive-unleashed-a00-u-boot.dtsi | 1 + board/sifive/fu540/Kconfig | 3 +++ doc/board/sifive/fu540.rst | 19 +++++++++++++++++++ 3 files changed, 23 insertions(+) diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 25ec8265a5..d7a64134db 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -5,6 +5,7 @@ / { aliases { + spi0 = &qspi0; spi2 = &qspi2; }; }; diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index 5d65080429..c5a1bca03c 100644 --- a/board/sifive/fu540/Kconfig +++ b/board/sifive/fu540/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply CMD_FS_GENERIC imply CMD_NET imply CMD_PING + imply CMD_SF imply CLK_SIFIVE imply CLK_SIFIVE_FU540_PRCI imply DOS_PARTITION @@ -40,6 +41,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply SIFIVE_SERIAL imply SPI imply SPI_SIFIVE + imply SPI_FLASH + imply SPI_FLASH_ISSI imply MMC imply MMC_SPI imply MMC_BROKEN_CD diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 91b94ee06f..2e70cad02e 100644 --- a/doc/board/sifive/fu540.rst +++ b/doc/board/sifive/fu540.rst @@ -366,3 +366,22 @@ load uImage. Please press Enter to activate this console. / # + +Sample spi nor flash test +------------------------- + +.. code-block:: none + + => sf probe 0:2 + SF: Detected is25wp256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB + => sf erase 0x1000000 0x100000 + SF: 1048576 bytes @ 0x1000000 Erased: OK + => mw.b 0xc0000000 0xaa 0x100000 + => sf write 0xc0000000 0x1000000 0x100000 + device 0 offset 0x1000000, size 0x100000 + SF: 1048576 bytes @ 0x1000000 Written: OK + => sf read 0xf0000000 0x1000000 0x100000 + device 0 offset 0x1000000, size 0x100000 + SF: 1048576 bytes @ 0x1000000 Read: OK + => cmp.b 0xf0000000 0xc0000000 0x100000 + Total of 1048576 byte(s) were the same