From patchwork Fri Sep 27 07:36:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1168315 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fkCz3wlKz9sPK for ; Fri, 27 Sep 2019 17:37:51 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46fkCz2x6GzDqw1 for ; Fri, 27 Sep 2019 17:37:51 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=haren@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46fkCs3w7kzDqvY for ; Fri, 27 Sep 2019 17:37:39 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x8R7awko068228; Fri, 27 Sep 2019 03:37:30 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com with ESMTP id 2v9ctwtm3s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Sep 2019 03:37:30 -0400 Received: from m0098414.ppops.net (m0098414.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.27/8.16.0.27) with SMTP id x8R7bT0m070239; Fri, 27 Sep 2019 03:37:29 -0400 Received: from ppma05wdc.us.ibm.com (1b.90.2fa9.ip4.static.sl-reverse.com [169.47.144.27]) by mx0b-001b2d01.pphosted.com with ESMTP id 2v9ctwtm3c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Sep 2019 03:37:29 -0400 Received: from pps.filterd (ppma05wdc.us.ibm.com [127.0.0.1]) by ppma05wdc.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x8R7YwrR020022; Fri, 27 Sep 2019 07:37:29 GMT Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by ppma05wdc.us.ibm.com with ESMTP id 2v5bg7x7c1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Sep 2019 07:37:29 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x8R7bR7e52560306 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 27 Sep 2019 07:37:27 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7ED3F112065; Fri, 27 Sep 2019 07:37:27 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E585E112062; Fri, 27 Sep 2019 07:37:26 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 27 Sep 2019 07:37:26 +0000 (GMT) From: Haren Myneni To: oohall@gmail.com, mpe@ellerman.id.au, hegdevasant@linux.vnet.ibm.com, skiboot@lists.ozlabs.org Date: Fri, 27 Sep 2019 00:36:54 -0700 Message-ID: <1569569814.4351.20.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-09-27_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1909270071 Subject: [Skiboot] VAS: Alloc IRQ and port address for each VAS instance X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hbabu@us.ibm.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Setup IRQ and trigger port for each VAS instance and export these values through device-tree. Kernel setup IRQ mapping and register port address for each send window depends on VAS instance. When NX gets page fault on the request buffer, sends an interrupt to the kernel and the fault will be handled for the corresponding send window. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni diff --git a/doc/device-tree/vas.rst b/doc/device-tree/vas.rst index 438e45f..d27470d 100644 --- a/doc/device-tree/vas.rst +++ b/doc/device-tree/vas.rst @@ -18,6 +18,10 @@ Each VAS node contains: :: ibm,vas-id: unique identifier for each instance of VAS in the system. + ibm,vas-irq: IRQ entry for this VAS instance. + + ibm,vas-port: Port address for the IRQ. + reg: contains 8 64-bit fields. Fields [0] and [1] represent the Hypervisor window context BAR diff --git a/hw/vas.c b/hw/vas.c index 212da0e..6096d1c 100644 --- a/hw/vas.c +++ b/hw/vas.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #define vas_err(__fmt,...) prlog(PR_ERR,"VAS: " __fmt, ##__VA_ARGS__) @@ -24,6 +25,7 @@ struct vas { uint64_t xscom_base; uint64_t wcbs; uint32_t vas_irq; + uint64_t vas_port; }; static inline void get_hvwc_mmio_bar(int chipid, uint64_t *start, uint64_t *len) @@ -402,6 +404,8 @@ static void create_mm_dt_node(struct proc_chip *chip) dt_add_property(dn, "ibm,vas-id", &vas->vas_id, sizeof(vas->vas_id)); dt_add_property(dn, "ibm,chip-id", &gcid, sizeof(gcid)); + dt_add_property(dn, "ibm,vas-irq", &vas->vas_irq, sizeof(vas->vas_irq)); + dt_add_property_u64(dn, "ibm,vas-port", vas->vas_port); } /* @@ -423,6 +427,25 @@ static void disable_vas_inst(struct dt_node *np) reset_north_ctl(chip); } +static int vas_setup_irq(struct proc_chip *chip) +{ + uint32_t irq; + uint64_t port; + + irq = xive_alloc_ipi_irqs(chip->id, 1, 64); + if (irq == XIVE_IRQ_ERROR) + return -1; + + vas_vdbg("trigger port: 0x%p\n", xive_get_trigger_port(irq)); + + port = (uint64_t)xive_get_trigger_port(irq); + + chip->vas->vas_irq = irq; + chip->vas->vas_port = port; + + return 0; +} + /* * Initialize one VAS instance and enable it if @enable is true. */ @@ -452,6 +475,9 @@ static int init_vas_inst(struct dt_node *np, bool enable) init_rma(chip)) return -1; + if (vas_setup_irq(chip)) + return -1; + create_mm_dt_node(chip); prlog(PR_INFO, "VAS: Initialized chip %d\n", chip->id);