From patchwork Thu Sep 26 17:34:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168015 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uu/CHPKK"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fMYm6VH5z9sNf for ; Fri, 27 Sep 2019 03:37:00 +1000 (AEST) Received: from localhost ([::1]:41744 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXhI-0004Ft-Dz for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 13:36:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58715) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXg5-0004Ee-3K for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:35:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDXg3-0002i2-OW for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:35:40 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:38978) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDXfz-0002dh-VS; Thu, 26 Sep 2019 13:35:39 -0400 Received: by mail-wr1-f68.google.com with SMTP id r3so3712987wrj.6; Thu, 26 Sep 2019 10:35:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=voiG7DWCSdFTStaEL19HrjsIseLBzBfq9/zOs+pAh+4=; b=uu/CHPKKHr5AgZc+QvoM46VVMKRFdKrFQYddb7i+3Ff/325da3M2zOhOOypeXbLKcs zo1M0UojOM6gk/UkIfLNoifogrWd10rlDHYeJXOVVi29NshhibQjImApnHj2B/u9kxzh oJDFyEYbSdD/XBGbsK3Ixq9dAlPBmMjiIsqz4C4StLd4DWOdkI2HAIGeXKcdyBzhW47z 83v9xrGxuNAg9vkF1PTvih2fumZXmjB4qDPaWv17347MjpmYt3ztNnd8oASnosazSYr8 51JmXrUwojq2l9AbdLQY1L7pElnKk7iw7huyVthKcwNZKXXOlAbiqrqtFN6hIc4XqCzM Vfjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=voiG7DWCSdFTStaEL19HrjsIseLBzBfq9/zOs+pAh+4=; b=cLe093rgP1LfkTBE3uQRMsxqz0EklHM6hWRyXgKRJXIWf4d4X+qDk6h/hP1IbmJs3c jOnUTT7M6p7sC/AU020mK/L/3ywtNB+41gixBI/QhYVOkTQUsIaHJTrQemXePJOSEs7J Qe1pPCTSDZmnynawwdaKJQW+IMvMpMK6oc64fvwnQlrPGwCsf33EydIq9SIAzpdKZBHh Fmveh+NuYXZGG3i1Uc/EXXm0vgr/wroVaqkQO7eu/0ab0VKOLi6kFuqhx9CWYVooRMej DzqxrMYzLh1pB1r2agIi0C3/bL0OdZUCGAm3w8uliRfJZLhQZnqnVdubsub2t31zHFja jIJQ== X-Gm-Message-State: APjAAAUoxvBicI6w5CVLfY0X4oFjIU7pmcbGImRwDtN4mqGYZRwHq+3h mBZatpesaI1hTd3RYaNe6ZuP6g/FZWg= X-Google-Smtp-Source: APXvYqxw43EJJW3k6tDZQEtl/syOr4bzsuF/Swg0aA+DzdvvUQcoeNKvKADOavyhR/cItlQXqbjynw== X-Received: by 2002:adf:904f:: with SMTP id h73mr3943294wrh.128.1569519273793; Thu, 26 Sep 2019 10:34:33 -0700 (PDT) Received: from x1w.redhat.com (240.red-88-21-68.staticip.rima-tde.net. [88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Date: Thu, 26 Sep 2019 19:34:09 +0200 Message-Id: <20190926173428.10713-2-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.68 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Alex Bennée Reviewed-by: Cleber Rosa --- hw/arm/raspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 74c062d05e..615d755879 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -230,7 +230,7 @@ static void raspi2_machine_init(MachineClass *mc) mc->max_cpus = BCM283X_NCPUS; mc->min_cpus = BCM283X_NCPUS; mc->default_cpus = BCM283X_NCPUS; - mc->default_ram_size = 1024 * 1024 * 1024; + mc->default_ram_size = 1 * GiB; mc->ignore_memory_transaction_failures = true; }; DEFINE_MACHINE("raspi2", raspi2_machine_init) @@ -252,7 +252,7 @@ static void raspi3_machine_init(MachineClass *mc) mc->max_cpus = BCM283X_NCPUS; mc->min_cpus = BCM283X_NCPUS; mc->default_cpus = BCM283X_NCPUS; - mc->default_ram_size = 1024 * 1024 * 1024; + mc->default_ram_size = 1 * GiB; } DEFINE_MACHINE("raspi3", raspi3_machine_init) #endif From patchwork Thu Sep 26 17:34:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168021 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DuIsagik"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fMg23MyVz9sNx for ; Fri, 27 Sep 2019 03:41:34 +1000 (AEST) Received: from localhost ([::1]:41794 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXli-0008T7-VN for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 13:41:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58754) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXg7-0004G2-IV for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:35:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDXg5-0002m4-Vv for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:35:43 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:53375) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDXg5-0002gx-On; Thu, 26 Sep 2019 13:35:41 -0400 Received: by mail-wm1-f68.google.com with SMTP id i16so3715114wmd.3; Thu, 26 Sep 2019 10:35:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GPn4B4lGlzDo8+m39RCSSgR0Dtxp3NBa/HDn4lW4Yr8=; b=DuIsagikFO3dSsqiNBQ/N+7bHy9sf3Hk13jtq/1UVc9/+lwXRvPlvoHhWcfvEXvfI3 sMvbbRxgukR96EvL3LKxE2vmgeYGkJjepnSLKzcuRNLZsmg+Q2C0gnEgWfOsyUvfiu4+ SaLdoH4e1o1SNZHPpMRM9hyyQfKqhrJQm9gDcT7rnTTipc4tjmVZDKQj7SZvSNpuLRxK tv301U3u1xTiuvapgaokgWlfYHZKcVkq01diVsL4kj2xcod4e/iuxf7GfT77cf3rz9yu vvCKYvwtIKWkLSGwSD6k0JpTTBhiN+/8z7teVKQMkeTijRzJfeh8W93Qtfu0cFR1+sQ9 gVWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=GPn4B4lGlzDo8+m39RCSSgR0Dtxp3NBa/HDn4lW4Yr8=; b=TVKq64zkhrTAjhJvPAt/qLmXycG8OvECqOhZY/L6N8vFhtaS0HibswTr6qaPoO1+EM C6ldDwF6RNIPF/3tBEJmj0ha8VShEUCVFl12sHkoiG4s715Ac+k/jcCUhexra7Gn8pb6 I5oSIZNL/cFCU9Jgb2Aq1Q+fN6ipEMOWhN9Xq4gcFZWMCdlL/o91WtZWCLrxE6fERlv3 arXMhqGJ2Kyv+Szk3shckyoFD8lkGfGTuYSFEyKo3GhcVwUoWkLDePvSguZVJV+1sFeC niG632Y2dvSLJ7C7WfPkCA3k+9SKkQZIYMlo/L1gQPbI8s5Wmj7yxNIldNfacjiHuW15 hysw== X-Gm-Message-State: APjAAAWazhsrIojf+wM+IRha3c2dozbsfJDvkDhI1GWUFPQ0JZTKfWbA jM81qb70zKT9lTCzaY/p2hQ75d5eCJY= X-Google-Smtp-Source: APXvYqwGkU70ZorAwk4HdldBXSnGw3Jam5gpGGlXQfVd9N+sFSv2EKYHXNl9hxeX8VY5mj72taq4qQ== X-Received: by 2002:a7b:c84f:: with SMTP id c15mr4147070wml.52.1569519277807; Thu, 26 Sep 2019 10:34:37 -0700 (PDT) Received: from x1w.redhat.com (240.red-88-21-68.staticip.rima-tde.net. [88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Date: Thu, 26 Sep 2019 19:34:10 +0200 Message-Id: <20190926173428.10713-3-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.68 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Various logging improvements as once: - Use 0x prefix for hex numbers - Display value written during write accesses - Move some logs from GUEST_ERROR to UNIMP Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Alex Bennée Reviewed-by: Cleber Rosa --- v2: Use PRIx64 format (pm215) --- hw/char/bcm2835_aux.c | 5 +++-- hw/dma/bcm2835_dma.c | 8 ++++---- hw/intc/bcm2836_control.c | 7 ++++--- hw/misc/bcm2835_mbox.c | 7 ++++--- hw/misc/bcm2835_property.c | 16 ++++++++++------ 5 files changed, 25 insertions(+), 18 deletions(-) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index 3f855196e3..a6fc1bf152 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value, switch (offset) { case AUX_ENABLES: if (value != 1) { - qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI " - "or disable UART\n", __func__); + qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI" + " or disable UART: 0x%"PRIx64"\n", + __func__, value); } break; diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c index 192bd377a0..6acc2b644e 100644 --- a/hw/dma/bcm2835_dma.c +++ b/hw/dma/bcm2835_dma.c @@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset, res = ch->debug; break; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, offset); break; } @@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset, ch->debug = value; break; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, offset); break; } @@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size) case BCM2708_DMA_ENABLE: return s->enable; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, offset); return 0; } @@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value, s->enable = (value & 0xffff); break; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, offset); } } diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c index 04229b8a17..61f884ff9e 100644 --- a/hw/intc/bcm2836_control.c +++ b/hw/intc/bcm2836_control.c @@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size) } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) { return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2]; } else { - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n", __func__, offset); return 0; } @@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset, } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) { s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val; } else { - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", - __func__, offset); + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx + " value 0x%"PRIx64"\n", + __func__, offset, val); return; } diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c index 79bad11631..7690b9afaf 100644 --- a/hw/misc/bcm2835_mbox.c +++ b/hw/misc/bcm2835_mbox.c @@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size) break; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n", __func__, offset); return 0; } @@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset, break; default: - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", - __func__, offset); + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx + " value 0x%"PRIx64"\n", + __func__, offset, value); return; } diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index d86d510572..0a1a3eb5d9 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) break; case 0x00010001: /* Get board model */ qemu_log_mask(LOG_UNIMP, - "bcm2835_property: %x get board model NYI\n", tag); + "bcm2835_property: 0x%08x get board model NYI\n", + tag); resplen = 4; break; case 0x00010002: /* Get board revision */ @@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) break; case 0x00010004: /* Get board serial */ qemu_log_mask(LOG_UNIMP, - "bcm2835_property: %x get board serial NYI\n", tag); + "bcm2835_property: 0x%08x get board serial NYI\n", + tag); resplen = 8; break; case 0x00010005: /* Get ARM memory */ @@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) case 0x00038001: /* Set clock state */ qemu_log_mask(LOG_UNIMP, - "bcm2835_property: %x set clock state NYI\n", tag); + "bcm2835_property: 0x%08x set clock state NYI\n", + tag); resplen = 8; break; @@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) case 0x00038004: /* Set max clock rate */ case 0x00038007: /* Set min clock rate */ qemu_log_mask(LOG_UNIMP, - "bcm2835_property: %x set clock rates NYI\n", tag); + "bcm2835_property: 0x%08x set clock rate NYI\n", + tag); resplen = 8; break; @@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) break; default: - qemu_log_mask(LOG_GUEST_ERROR, - "bcm2835_property: unhandled tag %08x\n", tag); + qemu_log_mask(LOG_UNIMP, + "bcm2835_property: unhandled tag 0x%08x\n", tag); break; } From patchwork Thu Sep 26 17:34:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168016 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Date: Thu, 26 Sep 2019 19:34:11 +0200 Message-Id: <20190926173428.10713-4-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Various address spaces from the BCM2835 are reported as 'anonymous' in memory tree: (qemu) info mtree address-space: anonymous 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property address-space: anonymous 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff [...] Since the address_space_init() function takes a 'name' argument, set it to correctly describe each address space: (qemu) info mtree address-space: bcm2835-mbox-memory 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property address-space: bcm2835-fb-memory 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff address-space: bcm2835-property-memory 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff address-space: bcm2835-dma-memory 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Alex Bennée Reviewed-by: Cleber Rosa --- hw/display/bcm2835_fb.c | 2 +- hw/dma/bcm2835_dma.c | 2 +- hw/misc/bcm2835_mbox.c | 2 +- hw/misc/bcm2835_property.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 8f856878cd..85aaa54330 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -425,7 +425,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp) s->initial_config.base = s->vcram_base + BCM2835_FB_OFFSET; s->dma_mr = MEMORY_REGION(obj); - address_space_init(&s->dma_as, s->dma_mr, NULL); + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_FB "-memory"); bcm2835_fb_reset(dev); diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c index 6acc2b644e..1e458d7fba 100644 --- a/hw/dma/bcm2835_dma.c +++ b/hw/dma/bcm2835_dma.c @@ -383,7 +383,7 @@ static void bcm2835_dma_realize(DeviceState *dev, Error **errp) } s->dma_mr = MEMORY_REGION(obj); - address_space_init(&s->dma_as, s->dma_mr, NULL); + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_DMA "-memory"); bcm2835_dma_reset(dev); } diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c index 7690b9afaf..77285624c9 100644 --- a/hw/misc/bcm2835_mbox.c +++ b/hw/misc/bcm2835_mbox.c @@ -311,7 +311,7 @@ static void bcm2835_mbox_realize(DeviceState *dev, Error **errp) } s->mbox_mr = MEMORY_REGION(obj); - address_space_init(&s->mbox_as, s->mbox_mr, NULL); + address_space_init(&s->mbox_as, s->mbox_mr, TYPE_BCM2835_MBOX "-memory"); bcm2835_mbox_reset(dev); } diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 0a1a3eb5d9..43a5465c5d 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -407,7 +407,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp) } s->dma_mr = MEMORY_REGION(obj); - address_space_init(&s->dma_as, s->dma_mr, NULL); + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory"); /* TODO: connect to MAC address of USB NIC device, once we emulate it */ qemu_macaddr_default_if_unset(&s->macaddr); From patchwork Thu Sep 26 17:34:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168020 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QmupJf/2"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Date: Thu, 26 Sep 2019 19:34:12 +0200 Message-Id: <20190926173428.10713-5-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The UART1 is part of the AUX peripheral, the PCM_CLOCK (yet unimplemented) is part of the CPRMAN. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Alex Bennée --- I dunno if this is OK to do that since the header has: * These definitions are derived from those in Raspbian Linux at * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h * where they carry the following notice: * * Copyright (C) 2010 Broadcom --- hw/arm/bcm2835_peripherals.c | 7 ++++--- hw/arm/bcm2836.c | 2 +- include/hw/arm/raspi_platform.h | 16 +++++++--------- 3 files changed, 12 insertions(+), 13 deletions(-) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 8984e2e91f..1bd2ff41d5 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -165,7 +165,8 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, - INTERRUPT_UART)); + INTERRUPT_UART0)); + /* AUX / UART1 */ qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); @@ -175,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) return; } - memory_region_add_subregion(&s->peri_mr, UART1_OFFSET, + memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, @@ -268,7 +269,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) return; } - memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET, + memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 493a913f89..723aef6bf5 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -126,7 +126,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) /* set periphbase/CBAR value for CPU-local registers */ object_property_set_int(OBJECT(&s->cpus[n]), - BCM2836_PERI_BASE + MCORE_OFFSET, + BCM2836_PERI_BASE + MSYNC_OFFSET, "reset-cbar", &err); if (err) { error_propagate(errp, err); diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index 10083d33df..66969fac5d 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -25,8 +25,7 @@ #ifndef HW_ARM_RASPI_PLATFORM_H #define HW_ARM_RASPI_PLATFORM_H -#define MCORE_OFFSET 0x0000 /* Fake frame buffer device - * (the multicore sync block) */ +#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */ #define IC0_OFFSET 0x2000 #define ST_OFFSET 0x3000 /* System Timer */ #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */ @@ -37,9 +36,8 @@ #define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */ #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores * Doorbells & Mailboxes */ -#define PM_OFFSET 0x100000 /* Power Management, Reset controller - * and Watchdog registers */ -#define PCM_CLOCK_OFFSET 0x101098 +#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */ +#define CM_OFFSET 0x101000 /* Clock Management */ #define RNG_OFFSET 0x104000 #define GPIO_OFFSET 0x200000 #define UART0_OFFSET 0x201000 @@ -47,11 +45,11 @@ #define I2S_OFFSET 0x203000 #define SPI0_OFFSET 0x204000 #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ -#define UART1_OFFSET 0x215000 -#define EMMC_OFFSET 0x300000 +#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ +#define EMMC1_OFFSET 0x300000 #define SMI_OFFSET 0x600000 #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ -#define USB_OFFSET 0x980000 /* DTC_OTG USB controller */ +#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */ /* GPU interrupts */ @@ -112,7 +110,7 @@ #define INTERRUPT_SPI 54 #define INTERRUPT_I2SPCM 55 #define INTERRUPT_SDIO 56 -#define INTERRUPT_UART 57 +#define INTERRUPT_UART0 57 #define INTERRUPT_SLIMBUS 58 #define INTERRUPT_VEC 59 #define INTERRUPT_CPG 60 From patchwork Thu Sep 26 17:34:13 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Date: Thu, 26 Sep 2019 19:34:13 +0200 Message-Id: <20190926173428.10713-6-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Base addresses and sizes taken from the "BCM2835 ARM Peripherals" datasheet from February 06 2012: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Alistair Francis --- hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++ include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++ include/hw/arm/raspi_platform.h | 8 +++++++ 3 files changed, 54 insertions(+) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 1bd2ff41d5..fdcf616c56 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -22,6 +22,20 @@ /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ #define BCM2835_SDHC_CAPAREG 0x52134b4 +static void create_unimp(BCM2835PeripheralState *ps, + UnimplementedDeviceState *uds, + const char *name, hwaddr ofs, hwaddr size) +{ + sysbus_init_child_obj(OBJECT(ps), name, uds, + sizeof(UnimplementedDeviceState), + TYPE_UNIMPLEMENTED_DEVICE); + qdev_prop_set_string(DEVICE(uds), "name", name); + qdev_prop_set_uint64(DEVICE(uds), "size", size); + object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); + memory_region_add_subregion_overlap(&ps->peri_mr, ofs, + sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); +} + static void bcm2835_peripherals_init(Object *obj) { BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); @@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } + + create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); + create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20); + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); + create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000); + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); + create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20); + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000); + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); } static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 6b17f6a382..62a4c7b559 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -23,6 +23,7 @@ #include "hw/sd/sdhci.h" #include "hw/sd/bcm2835_sdhost.h" #include "hw/gpio/bcm2835_gpio.h" +#include "hw/misc/unimp.h" #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" #define BCM2835_PERIPHERALS(obj) \ @@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState { MemoryRegion ram_alias[4]; qemu_irq irq, fiq; + UnimplementedDeviceState systmr; + UnimplementedDeviceState armtmr; + UnimplementedDeviceState cprman; + UnimplementedDeviceState a2w; PL011State uart0; BCM2835AuxState aux; BCM2835FBState fb; @@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState { SDHCIState sdhci; BCM2835SDHostState sdhost; BCM2835GpioState gpio; + UnimplementedDeviceState i2s; + UnimplementedDeviceState spi[1]; + UnimplementedDeviceState i2c[3]; + UnimplementedDeviceState otp; + UnimplementedDeviceState dbus; + UnimplementedDeviceState ave0; + UnimplementedDeviceState bscsl; + UnimplementedDeviceState smi; + UnimplementedDeviceState dwc2; + UnimplementedDeviceState sdramc; } BCM2835PeripheralState; #endif /* BCM2835_PERIPHERALS_H */ diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index 66969fac5d..cdcbca943f 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -38,6 +38,8 @@ * Doorbells & Mailboxes */ #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */ #define CM_OFFSET 0x101000 /* Clock Management */ +#define A2W_OFFSET 0x102000 /* Reset controller */ +#define AVS_OFFSET 0x103000 /* Audio Video Standard */ #define RNG_OFFSET 0x104000 #define GPIO_OFFSET 0x200000 #define UART0_OFFSET 0x201000 @@ -45,11 +47,17 @@ #define I2S_OFFSET 0x203000 #define SPI0_OFFSET 0x204000 #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ +#define OTP_OFFSET 0x20f000 +#define BSC_SL_OFFSET 0x214000 /* SPI slave */ #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ #define EMMC1_OFFSET 0x300000 #define SMI_OFFSET 0x600000 #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */ +#define DBUS_OFFSET 0x900000 +#define AVE0_OFFSET 0x910000 #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ +#define SDRAMC_OFFSET 0xe00000 #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */ /* GPU interrupts */ From patchwork Thu Sep 26 17:34:14 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Date: Thu, 26 Sep 2019 19:34:14 +0200 Message-Id: <20190926173428.10713-7-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The BCM2835 AUX UART is compatible with the 16650 model, when the registers belong the the 16650 block, use its trace events, else use bcm2835_aux_read/write. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/char/bcm2835_aux.c | 55 +++++++++++++++++++++++++++++++------------ hw/char/trace-events | 4 ++++ 2 files changed, 44 insertions(+), 15 deletions(-) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index a6fc1bf152..b26a255630 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -27,6 +27,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "trace.h" #define AUX_IRQ 0x0 #define AUX_ENABLES 0x4 @@ -62,17 +63,24 @@ static void bcm2835_aux_update(BCM2835AuxState *s) qemu_set_irq(s->irq, s->iir != 0); } +static bool is_16650(hwaddr offset) +{ + return offset >= AUX_MU_IO_REG && offset < AUX_MU_CNTL_REG; +} + static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size) { BCM2835AuxState *s = opaque; - uint32_t c, res; + uint32_t c, res = 0; switch (offset) { case AUX_IRQ: - return s->iir != 0; + res = s->iir != 0; + break; case AUX_ENABLES: - return 1; /* mini UART permanently enabled */ + res = 1; /* mini UART permanently enabled */ + break; case AUX_MU_IO_REG: /* "DLAB bit set means access baudrate register" is NYI */ @@ -85,11 +93,13 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size) } qemu_chr_fe_accept_input(&s->chr); bcm2835_aux_update(s); - return c; + res = c; + break; case AUX_MU_IER_REG: /* "DLAB bit set means access baudrate register" is NYI */ - return 0xc0 | s->ier; /* FIFO enables always read 1 */ + res = 0xc0 | s->ier; /* FIFO enables always read 1 */ + break; case AUX_MU_IIR_REG: res = 0xc0; /* FIFO enables */ @@ -105,33 +115,34 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size) if (s->iir == 0) { res |= 0x1; } - return res; + break; case AUX_MU_LCR_REG: qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_LCR_REG unsupported\n", __func__); - return 0; + break; case AUX_MU_MCR_REG: qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MCR_REG unsupported\n", __func__); - return 0; + break; case AUX_MU_LSR_REG: res = 0x60; /* tx idle, empty */ if (s->read_count != 0) { res |= 0x1; } - return res; + break; case AUX_MU_MSR_REG: qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MSR_REG unsupported\n", __func__); - return 0; + break; case AUX_MU_SCRATCH: qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_SCRATCH unsupported\n", __func__); - return 0; + break; case AUX_MU_CNTL_REG: - return 0x3; /* tx, rx enabled */ + res = 0x3; /* tx, rx enabled */ + break; case AUX_MU_STAT_REG: res = 0x30e; /* space in the output buffer, empty tx fifo, idle tx/rx */ @@ -140,17 +151,25 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size) assert(s->read_count < BCM2835_AUX_RX_FIFO_LEN); res |= ((uint32_t)s->read_count) << 16; /* rx fifo fill level */ } - return res; + break; case AUX_MU_BAUD_REG: qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_BAUD_REG unsupported\n", __func__); - return 0; + break; default: qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", __func__, offset); - return 0; + break; } + + if (is_16650(offset)) { + trace_serial_ioport_read((offset & 0x1f) >> 2, res); + } else { + trace_bcm2835_aux_read(offset, res); + } + + return res; } static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value, @@ -159,6 +178,12 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value, BCM2835AuxState *s = opaque; unsigned char ch; + if (is_16650(offset)) { + trace_serial_ioport_write((offset & 0x1f) >> 2, value); + } else { + trace_bcm2835_aux_write(offset, value); + } + switch (offset) { case AUX_ENABLES: if (value != 1) { diff --git a/hw/char/trace-events b/hw/char/trace-events index 2ce7f2f998..a7d477ab1e 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -1,5 +1,9 @@ # See docs/devel/tracing.txt for syntax documentation. +# bcm2835_aux.c +bcm2835_aux_read(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x" +bcm2835_aux_write(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x" + # parallel.c parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x" parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x" From patchwork Thu Sep 26 17:34:15 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 07/19] hw/misc/bcm2835_mbox: Add trace events Date: Thu, 26 Sep 2019 19:34:15 +0200 Message-Id: <20190926173428.10713-8-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.65 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add trace events for read/write accesses and IRQ. Properties are structures used for the ARM particular MBOX. Since one call in bcm2835_property.c concerns the mbox block, name this trace event in the same bcm2835_mbox* namespace. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/misc/bcm2835_mbox.c | 5 +++++ hw/misc/bcm2835_property.c | 2 ++ hw/misc/trace-events | 6 ++++++ 3 files changed, 13 insertions(+) diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c index 77285624c9..77d2d80706 100644 --- a/hw/misc/bcm2835_mbox.c +++ b/hw/misc/bcm2835_mbox.c @@ -15,6 +15,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "trace.h" #define MAIL0_PEEK 0x90 #define MAIL0_SENDER 0x94 @@ -123,6 +124,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s) set = true; } } + trace_bcm2835_mbox_irq(set); qemu_set_irq(s->arm_irq, set); } @@ -178,8 +180,10 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size) default: qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n", __func__, offset); + trace_bcm2835_mbox_read(size, offset, res); return 0; } + trace_bcm2835_mbox_read(size, offset, res); bcm2835_mbox_update(s); @@ -195,6 +199,7 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset, offset &= 0xff; + trace_bcm2835_mbox_write(size, offset, value); switch (offset) { case MAIL0_SENDER: break; diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 43a5465c5d..0eea2e20f7 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -13,6 +13,7 @@ #include "sysemu/dma.h" #include "qemu/log.h" #include "qemu/module.h" +#include "trace.h" /* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */ @@ -283,6 +284,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) break; } + trace_bcm2835_mbox_property(tag, bufsize, resplen); if (tag == 0) { break; } diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 74276225f8..1deb1d08c1 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -143,3 +143,9 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri # aspeed_xdma.c aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64 + +# bcm2835_mbox.c +bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 +bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 +bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" +bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" From patchwork Thu Sep 26 17:34:16 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Date: Thu, 26 Sep 2019 19:34:16 +0200 Message-Id: <20190926173428.10713-9-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We will soon implement the SYS_timer. This timer is used by Linux in the thermal subsystem, so once available, the subsystem will be enabled and poll the temperature sensors. We need to provide the minimum required to keep Linux booting. Add a dummy thermal sensor returning ~25°C based on: https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- checkpatch warning: WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? This is OK because the regex are: F: hw/*/bcm283* F: include/hw/*/bcm283* --- hw/misc/Makefile.objs | 1 + hw/misc/bcm2835_thermal.c | 109 ++++++++++++++++++++++++++++++ include/hw/misc/bcm2835_thermal.h | 27 ++++++++ 3 files changed, 137 insertions(+) create mode 100644 hw/misc/bcm2835_thermal.c create mode 100644 include/hw/misc/bcm2835_thermal.h diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index a150680966..c89f3816a5 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o common-obj-$(CONFIG_RASPI) += bcm2835_property.o common-obj-$(CONFIG_RASPI) += bcm2835_rng.o +common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o common-obj-$(CONFIG_SLAVIO) += slavio_misc.o common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o common-obj-$(CONFIG_ZYNQ) += zynq-xadc.o diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c new file mode 100644 index 0000000000..bac23f21ea --- /dev/null +++ b/hw/misc/bcm2835_thermal.c @@ -0,0 +1,109 @@ +/* + * BCM2835 dummy thermal sensor + * + * Copyright (C) 2019 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/misc/bcm2835_thermal.h" +#include "qemu/log.h" +#include "qapi/error.h" +#include "hw/registerfields.h" + +REG32(CTL, 0) +FIELD(CTL, POWER_DOWN, 0, 1) +FIELD(CTL, RESET, 1, 1) +FIELD(CTL, BANDGAP_CTRL, 2, 3) +FIELD(CTL, INTERRUPT_ENABLE, 5, 1) +FIELD(CTL, DIRECT, 6, 1) +FIELD(CTL, INTERRUPT_CLEAR, 7, 1) +FIELD(CTL, HOLD, 8, 10) +FIELD(CTL, RESET_DELAY, 18, 8) +FIELD(CTL, REGULATOR_ENABLE, 26, 1) + +REG32(STAT, 4) +FIELD(STAT, DATA, 0, 10) +FIELD(STAT, VALID, 10, 1) +FIELD(STAT, INTERRUPT, 11, 1) + +#define THERMAL_OFFSET_C 412 +#define THERMAL_COEFF (-0.538f) + +static uint16_t bcm2835_thermal_temp2adc(int temp_C) +{ + return (temp_C - THERMAL_OFFSET_C) / THERMAL_COEFF; +} + +static uint64_t bcm2835_thermal_read(void *opaque, hwaddr addr, unsigned size) +{ + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque); + uint32_t val = 0; + + switch (addr) { + case A_CTL: + val = s->ctl; + break; + case A_STAT: + val = FIELD_DP32(bcm2835_thermal_temp2adc(25), STAT, VALID, true); + break; + default: + g_assert_not_reached(); + } + return val; +} + +static void bcm2835_thermal_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque); + + switch (addr) { + case A_CTL: + s->ctl = value; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "%s: write 0x%" PRIx64 + " to 0x%" HWADDR_PRIx "\n", + __func__, value, addr); + } +} + +static const MemoryRegionOps bcm2835_thermal_ops = { + .read = bcm2835_thermal_read, + .write = bcm2835_thermal_write, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static void bcm2835_thermal_realize(DeviceState *dev, Error **errp) +{ + Bcm2835ThermalState *s = BCM2835_THERMAL(dev); + + memory_region_init_io(&s->iomem, OBJECT(s), &bcm2835_thermal_ops, + s, TYPE_BCM2835_THERMAL, 8); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); +} + +static void bcm2835_thermal_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = bcm2835_thermal_realize; +} + +static const TypeInfo bcm2835_thermal_info = { + .name = TYPE_BCM2835_THERMAL, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(Bcm2835ThermalState), + .class_init = bcm2835_thermal_class_init, +}; + +static void bcm2835_thermal_register_types(void) +{ + type_register_static(&bcm2835_thermal_info); +} + +type_init(bcm2835_thermal_register_types) diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h new file mode 100644 index 0000000000..f85cce7214 --- /dev/null +++ b/include/hw/misc/bcm2835_thermal.h @@ -0,0 +1,27 @@ +/* + * BCM2835 dummy thermal sensor + * + * Copyright (C) 2019 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_MISC_BCM2835_THERMAL_H +#define HW_MISC_BCM2835_THERMAL_H + +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" + +#define TYPE_BCM2835_THERMAL "bcm2835-thermal" + +#define BCM2835_THERMAL(obj) \ + OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL) + +typedef struct { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + MemoryRegion iomem; + uint32_t ctl; +} Bcm2835ThermalState; + +#endif From patchwork Thu Sep 26 17:34:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168023 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Jmzr0cep"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fMjD6jXdz9sNf for ; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block Date: Thu, 26 Sep 2019 19:34:17 +0200 Message-Id: <20190926173428.10713-10-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Map the thermal sensor in the BCM2835 block. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/arm/bcm2835_peripherals.c | 13 +++++++++++++ include/hw/arm/bcm2835_peripherals.h | 2 ++ include/hw/arm/raspi_platform.h | 1 + 3 files changed, 16 insertions(+) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index fdcf616c56..70bf927a02 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -111,6 +111,10 @@ static void bcm2835_peripherals_init(Object *obj) object_property_add_const_link(OBJECT(&s->dma), "dma-mr", OBJECT(&s->gpu_bus_mr), &error_abort); + /* Thermal */ + sysbus_init_child_obj(obj, "thermal", &s->thermal, sizeof(s->thermal), + TYPE_BCM2835_THERMAL); + /* GPIO */ sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), TYPE_BCM2835_GPIO); @@ -321,6 +325,15 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) INTERRUPT_DMA0 + n)); } + /* THERMAL */ + object_property_set_bool(OBJECT(&s->thermal), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); + /* GPIO */ object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); if (err) { diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 62a4c7b559..be7ad9b499 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -20,6 +20,7 @@ #include "hw/misc/bcm2835_property.h" #include "hw/misc/bcm2835_rng.h" #include "hw/misc/bcm2835_mbox.h" +#include "hw/misc/bcm2835_thermal.h" #include "hw/sd/sdhci.h" #include "hw/sd/bcm2835_sdhost.h" #include "hw/gpio/bcm2835_gpio.h" @@ -53,6 +54,7 @@ typedef struct BCM2835PeripheralState { SDHCIState sdhci; BCM2835SDHostState sdhost; BCM2835GpioState gpio; + Bcm2835ThermalState thermal; UnimplementedDeviceState i2s; UnimplementedDeviceState spi[1]; UnimplementedDeviceState i2c[3]; diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index cdcbca943f..61b04a1bd4 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -48,6 +48,7 @@ #define SPI0_OFFSET 0x204000 #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ #define OTP_OFFSET 0x20f000 +#define THERMAL_OFFSET 0x212000 #define BSC_SL_OFFSET 0x214000 /* SPI slave */ #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ #define EMMC1_OFFSET 0x300000 From patchwork Thu Sep 26 17:34:18 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer Date: Thu, 26 Sep 2019 19:34:18 +0200 Message-Id: <20190926173428.10713-11-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add the 64-bit free running timer. Do not model the COMPARE register (no IRQ generated). This timer is used by U-Boot and recent Linux kernels: https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19 Datasheet used: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Signed-off-by: Philippe Mathieu-Daudé --- Since which kernels? 4.19 seems to use it. checkpatch warning: WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? This is OK because the regex are: F: hw/*/bcm283* F: include/hw/*/bcm283* --- hw/timer/Makefile.objs | 1 + hw/timer/bcm2835_systmr.c | 100 ++++++++++++++++++++++++++++++ hw/timer/trace-events | 4 ++ include/hw/timer/bcm2835_systmr.h | 30 +++++++++ 4 files changed, 135 insertions(+) create mode 100644 hw/timer/bcm2835_systmr.c create mode 100644 include/hw/timer/bcm2835_systmr.h diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs index 123d92c969..696cda5905 100644 --- a/hw/timer/Makefile.objs +++ b/hw/timer/Makefile.objs @@ -47,3 +47,4 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o common-obj-$(CONFIG_MSF2) += mss-timer.o +common-obj-$(CONFIG_RASPI) += bcm2835_systmr.o diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c new file mode 100644 index 0000000000..c4d2b488bd --- /dev/null +++ b/hw/timer/bcm2835_systmr.c @@ -0,0 +1,100 @@ +/* + * BCM2835 SYS timer emulation + * + * Copyright (C) 2019 Philippe Mathieu-Daudé + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + * + * Datasheet: BCM2835 ARM Peripherals (C6357-M-1398) + * https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf + * + * Only the free running 64-bit counter is implemented. + * The 4 COMPARE registers and the interruption are not implemented. + */ + +#include "qemu/osdep.h" +#include "qemu/timer.h" +#include "qemu/log.h" +#include "hw/registerfields.h" +#include "hw/timer/bcm2835_systmr.h" +#include "trace.h" + +REG32(CTRL_STATUS, 0x00) +REG32(COUNTER_LOW, 0x04) +REG32(COUNTER_HIGH, 0x08) +REG32(COMPARE0, 0x0c) +REG32(COMPARE1, 0x10) +REG32(COMPARE2, 0x14) +REG32(COMPARE3, 0x18) + +static uint64_t bcm2835_sys_timer_read(void *opaque, hwaddr offset, + unsigned size) +{ + uint64_t r = 0; + + switch (offset) { + case A_CTRL_STATUS: + case A_COMPARE0 ... A_COMPARE3: + break; + case A_COUNTER_LOW: + case A_COUNTER_HIGH: + /* Free running counter at 1MHz */ + r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL); + r >>= 8 * (offset - A_COUNTER_LOW); + r &= UINT32_MAX; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n", + __func__, offset); + break; + } + trace_bcm2835_sys_timer_read(offset, r); + + return r; +} + +static void bcm2835_sys_timer_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + trace_bcm2835_sys_timer_write(offset, value); + + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n", + __func__, offset); +} + +static const MemoryRegionOps bcm2835_sys_timer_ops = { + .read = bcm2835_sys_timer_read, + .write = bcm2835_sys_timer_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +static void bcm2835_sys_timer_init(Object *obj) +{ + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj); + + memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops, + s, "bcm2835-sys-timer", 0x20); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq); +} + +static const TypeInfo bcm2835_sys_timer_info = { + .name = TYPE_BCM2835_SYSTIMER, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(BCM2835SysTimerState), + .instance_init = bcm2835_sys_timer_init, +}; + +static void bcm2835_sys_timer_register_types(void) +{ + type_register_static(&bcm2835_sys_timer_info); +} + +type_init(bcm2835_sys_timer_register_types); diff --git a/hw/timer/trace-events b/hw/timer/trace-events index db02a9142c..81967a1a19 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_alarm_raised(void) "alarm raised" pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" + +# bcm2835_systmr.c +bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 +bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h new file mode 100644 index 0000000000..6ac7f8ec5a --- /dev/null +++ b/include/hw/timer/bcm2835_systmr.h @@ -0,0 +1,30 @@ +/* + * BCM2835 SYS timer emulation + * + * Copyright (c) 2019 Philippe Mathieu-Daudé + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#ifndef BCM2835_SYSTIMER_H +#define BCM2835_SYSTIMER_H + +#include "hw/sysbus.h" +#include "hw/irq.h" + +#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer" +#define BCM2835_SYSTIMER(obj) \ + OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER) + +typedef struct { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion iomem; + qemu_irq irq; +} BCM2835SysTimerState; + +#endif From patchwork Thu Sep 26 17:34:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168028 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer Date: Thu, 26 Sep 2019 19:34:19 +0200 Message-Id: <20190926173428.10713-12-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.68 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Connect the recently added SYS_timer. Now U-Boot does not hang anymore polling a free running counter stuck at 0. This timer is also used by the Linux kernel thermal subsystem. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2835_peripherals.c | 21 ++++++++++++++++++++- include/hw/arm/bcm2835_peripherals.h | 3 ++- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 70bf927a02..965f4c1f3d 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -58,6 +58,10 @@ static void bcm2835_peripherals_init(Object *obj) /* Interrupt Controller */ sysbus_init_child_obj(obj, "ic", &s->ic, sizeof(s->ic), TYPE_BCM2835_IC); + /* SYS Timer */ + sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr), + TYPE_BCM2835_SYSTIMER); + /* UART0 */ sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0), TYPE_PL011); @@ -171,6 +175,22 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); + /* Sys Timer */ + if (err) { + error_propagate(errp, err); + return; + } + object_property_set_bool(OBJECT(&s->systmr), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + memory_region_add_subregion(&s->peri_mr, ST_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0)); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0, + qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, + INTERRUPT_ARM_TIMER)); + /* UART0 */ qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err); @@ -352,7 +372,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) } create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); - create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20); create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000); create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index be7ad9b499..5b9fc89453 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -24,6 +24,7 @@ #include "hw/sd/sdhci.h" #include "hw/sd/bcm2835_sdhost.h" #include "hw/gpio/bcm2835_gpio.h" +#include "hw/timer/bcm2835_systmr.h" #include "hw/misc/unimp.h" #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" @@ -39,7 +40,7 @@ typedef struct BCM2835PeripheralState { MemoryRegion ram_alias[4]; qemu_irq irq, fiq; - UnimplementedDeviceState systmr; + BCM2835SysTimerState systmr; UnimplementedDeviceState armtmr; UnimplementedDeviceState cprman; UnimplementedDeviceState a2w; From patchwork Thu Sep 26 17:34:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168026 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="p79WxydP"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fMqK14ltz9sNf for ; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks Date: Thu, 26 Sep 2019 19:34:20 +0200 Message-Id: <20190926173428.10713-13-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add basic support for BCM283x CPRMAN. Provide support for reading and writing CPRMAN registers and initialize registers with sensible default values. During runtime retain any written values. Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2 and raspi3 systems. Based on: https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/clk/bcm/clk-bcm2835.c https://github.com/u-boot/u-boot/blob/v2019.07/include/dt-bindings/clock/bcm2835.h https://github.com/arisena-com/rpi_src/blob/master/apps/i2s_test/src/i2s_test.c#L273 Co-developed-by: Guenter Roeck Signed-off-by: Guenter Roeck Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2835_peripherals.c | 20 +- hw/misc/Makefile.objs | 1 + hw/misc/bcm2835_cprman.c | 383 +++++++++++++++++++++++++++ hw/misc/trace-events | 8 + include/hw/arm/bcm2835_peripherals.h | 4 +- include/hw/misc/bcm2835_cprman.h | 32 +++ 6 files changed, 444 insertions(+), 4 deletions(-) create mode 100644 hw/misc/bcm2835_cprman.c create mode 100644 include/hw/misc/bcm2835_cprman.h diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 965f4c1f3d..c887969795 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -62,6 +62,11 @@ static void bcm2835_peripherals_init(Object *obj) sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr), TYPE_BCM2835_SYSTIMER); + /* Clock / Power / Reset */ + object_initialize(&s->cprman, sizeof(s->cprman), TYPE_BCM2835_CPRMAN); + object_property_add_child(obj, "cprman", OBJECT(&s->cprman), NULL); + qdev_set_parent_bus(DEVICE(&s->cprman), sysbus_get_default()); + /* UART0 */ sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0), TYPE_PL011); @@ -191,6 +196,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, INTERRUPT_ARM_TIMER)); + /* Clock / Power / Reset */ + object_property_set_bool(OBJECT(&s->cprman), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0)); + memory_region_add_subregion(&s->peri_mr, CM_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 1)); + memory_region_add_subregion(&s->peri_mr, A2W_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 2)); + /* UART0 */ qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err); @@ -372,8 +390,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) } create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); - create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); - create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000); create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20); diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index c89f3816a5..64e717e6b3 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o common-obj-$(CONFIG_RASPI) += bcm2835_property.o common-obj-$(CONFIG_RASPI) += bcm2835_rng.o +common-obj-$(CONFIG_RASPI) += bcm2835_cprman.o common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o common-obj-$(CONFIG_SLAVIO) += slavio_misc.o common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c new file mode 100644 index 0000000000..6c3b5b6837 --- /dev/null +++ b/hw/misc/bcm2835_cprman.c @@ -0,0 +1,383 @@ +/* + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version) + * + * Copyright (C) 2018 Guenter Roeck + * Copyright (C) 2018 Philippe Mathieu-Daudé + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "sysemu/runstate.h" +#include "hw/registerfields.h" +#include "hw/misc/bcm2835_cprman.h" +#include "trace.h" + +#define CPRMAN_PASSWD 'Z' + +FIELD(CPRMAN, PASSWD, 24, 8) + +REG32(PM_RSTC, 0x1c) +REG32(PM_RSTS, 0x20) +REG32(PM_WDOG, 0x24) + +static const char *pm_name(hwaddr addr) +{ + addr &= ~3; + switch (addr) { + case A_PM_RSTC: return "RST_CLR"; + case A_PM_RSTS: return "RST_SET"; + case A_PM_WDOG: return "WDG"; + default: + return "UNKN"; + } +} + +static uint64_t bcm2835_cprman_pm_read(void *opaque, hwaddr addr, + unsigned size) +{ + uint32_t res = 0; + + trace_bcm2835_cprman_read(size << 3, addr, "PM", pm_name(addr), "", res); + + return res; +} + +static void bcm2835_cprman_pm_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + const char *name; + + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) { + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d" + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n", + size << 3, addr, value); + return; + } + value &= ~R_CPRMAN_PASSWD_MASK; + + name = pm_name(addr); + trace_bcm2835_cprman_write_pm(addr, name, value); + if (addr == A_PM_RSTC && value & 0x20) { /* TODO remove 0x20 magic */ + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); + } +} + +static const MemoryRegionOps bcm2835_cprman_pm_ops = { + .read = bcm2835_cprman_pm_read, + .write = bcm2835_cprman_pm_write, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +REG32(CM_CTL, 0) +FIELD(CM_CTL, SRC, 0, 4) +FIELD(CM_CTL, ENABLE, 4, 1) +FIELD(CM_CTL, KILL, 5, 1) +FIELD(CM_CTL, GATE, 6, 1) +FIELD(CM_CTL, BUSY, 7, 1) +FIELD(CM_CTL, BUSYD, 8, 1) +FIELD(CM_CTL, FRAC, 9, 1) + +REG32(CM_DIV, 4) +FIELD(CM_DIV, FRAC, 0, 12) +FIELD(CM_DIV, INTEGER, 12, 12) + +REG32(CM_OSCCOUNT, 0x100) +REG32(CM_LOCK, 0x114) +REG32(CM_EVENT, 0x118) +REG32(CM_PLLB, 0x170) + +/* Bits used by R_CM_CTL_SRC_MASK */ +enum cprman_clock_source { + SRC_GND = 0, + SRC_OSC = 1, + SRC_TEST_DBG0 = 2, + SRC_TEST_DBG1 = 3, + SRC_PLLA = 4, + SRC_PLLC_CORE0 = 5, + SRC_PLLD = 6, + SRC_PLLH_AUX = 7, + SRC_PLLC_CORE1 = 8, + SRC_PLLC_CORE2 = 9 +}; + +static const char *src_name(int src) +{ + static const char *src_names[16] = { + [SRC_GND] = "GND", + [SRC_OSC] = "OSC", + [SRC_PLLA] = "PLLA", + [SRC_PLLC_CORE0] = "PLLC_CORE0", + [SRC_PLLD] = "PLLD", + [SRC_PLLH_AUX] = "PLLH_AUX", + [SRC_PLLC_CORE1] = "PLLC_CORE1", + [SRC_PLLC_CORE2] = "PLLC_CORE2", + }; + return src_names[src] ? src_names[src] : "UNKN"; +} + +static const char *ctldiv_names[0x200 / 4] = { + [0] = "GENERIC", + [1] = "VPU", + [2] = "SYS", + [3] = "PERIA", + [4] = "PERII", + [5] = "H264", + [6] = "ISP", + [7] = "V3D", + [8] = "CAM0", + [9] = "CAM1", + [10] = "CCP2", + [11] = "DSI0E", + [12] = "DSI0P", + [13] = "DPI", + [14] = "GP0", + [15] = "GP1", + [16] = "GP2", + [17] = "HSM", + [18] = "OTP", + [19] = "PCM", + [20] = "PWM", + [21] = "SLIM", + [22] = "SMI", + [24] = "TCNT", + [25] = "TEC", + [26] = "TD0", + [27] = "TD1", + [28] = "TSENS", + [29] = "TIMER", + [30] = "UART", + [31] = "VEC", + [43] = "DSI1E", + [44] = "DSI1P", + [45] = "DFT", + [50] = "PULSE", + [53] = "SDC", + [54] = "ARM", + [55] = "AVEO", + [56] = "EMMC", +}; + +static const char *cm_name(hwaddr addr) +{ + int idx; + + addr &= ~3; + switch (addr) { + case A_CM_OSCCOUNT: return "OSCCOUNT"; + case 0x104 ... 0x110: + case A_CM_PLLB: return "PLLx"; + case A_CM_LOCK: return "LOCK"; + case A_CM_EVENT: return "EVENT"; + default: + idx = addr / 8; + return ctldiv_names[idx] ? ctldiv_names[idx] : "UNKN"; + } +} + +static uint32_t scale(uint32_t value) +{ + return (1000ull * value) >> 10; +} + +/* + * Available information suggests that CPRMAN registers have default + * values which are not overwritten by ROMMON (u-boot). The hardware + * default values are unknown at this time. + * The default values selected here are necessary and sufficient + * to boot Linux directly (on raspi2 and raspi3). The selected + * values enable all clocks and set clock rates to match their + * parent rates. + */ +static uint64_t bcm2835_cprman_cm_read(void *opaque, hwaddr addr, + unsigned size) +{ + uint32_t res = 0; + + if (addr == A_CM_LOCK) { + res = 0b11111 << 8; /* all locked! */ + } else { + switch (addr & 0xf) { + case A_CM_CTL: + res = SRC_OSC | R_CM_CTL_ENABLE_MASK; + break; + case A_CM_DIV: + res = FIELD_DP32(0, CM_DIV, INTEGER, 1); + break; + default: + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n", + __func__, addr); + } + } + trace_bcm2835_cprman_read(size << 3, addr, "CM", cm_name(addr), "", res); + + return res; +} + +static void bcm2835_cprman_cm_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + const char *name; + + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) { + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d" + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n", + size << 3, addr, value); + return; + } + value &= ~R_CPRMAN_PASSWD_MASK; + + name = cm_name(addr); + switch (addr) { + case A_CM_OSCCOUNT: + case 0x104 ... 0x110: + case A_CM_PLLB: + case A_CM_LOCK: + case A_CM_EVENT: + trace_bcm2835_cprman_write_cm_generic(name, value); + break; + default: + switch (addr & 0xf) { + case A_CM_CTL: + trace_bcm2835_cprman_write_cm_ctl(name, src_name(value & 0xf), + FIELD_EX32(value, CM_CTL, ENABLE)); + break; + case A_CM_DIV: + trace_bcm2835_cprman_write_cm_div(name, + FIELD_EX32(value, CM_DIV, INTEGER), + scale(FIELD_EX32(value, CM_DIV, FRAC))); + } + } +} + +static const MemoryRegionOps bcm2835_cprman_cm_ops = { + .read = bcm2835_cprman_cm_read, + .write = bcm2835_cprman_cm_write, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +REG32(A2W_PLL_CTRL, 0x00) +FIELD(A2W_PLL_CTRL, NDIV, 0, 12) +FIELD(A2W_PLL_CTRL, PDIV, 12, 3) +FIELD(A2W_PLL_CTRL, POWER_DOWN, 16, 1) +FIELD(A2W_PLL_CTRL, POWER_RESET_DISABLE, 17, 1) + +REG32(A2W_PLL_ANA0, 0x10) + +FIELD(A2W_PLL_FRAC, DIV, 0, 20) + +FIELD(A2W_PLL_CHAN, DIV, 0, 8) +FIELD(A2W_PLL_CHAN, DISABLE, 8, 1) + +static const char *a2w_name(hwaddr addr) +{ + if (addr >= 0x300) { + return "CHANx"; + } + if (addr >= 0x200) { + return "FRACx"; + } + switch (addr & 0x1f) { + case A_A2W_PLL_CTRL: + return "CTRL"; + case A_A2W_PLL_ANA0: + return "ANA0"; + default: + return "UNKN"; + } +} + +static const char *pll_name(int idx) +{ + static const char *pll_names[8] = { + [0] = "PLLA", + [1] = "PLLC", + [2] = "PLLD", + [3] = "PLLH", + [7] = "PLLB", + }; + return pll_names[idx] ? pll_names[idx] : "UNKN"; +} + +static uint64_t bcm2835_cprman_a2w_read(void *opaque, hwaddr addr, + unsigned size) +{ + uint32_t res = 0; + + if (addr < 0x200) { + /* Power */ + switch (addr & 0x1f) { + case A_A2W_PLL_CTRL: + res = R_A2W_PLL_CTRL_POWER_DOWN_MASK; /* On */ + break; + case A_A2W_PLL_ANA0: + break; + } + } else { + /* addr < 0x300 is FREQ, else CHANNEL */ + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n", + __func__, addr); + } + trace_bcm2835_cprman_read(size << 3, addr, "A2W", a2w_name(addr), + pll_name((addr >> 5) & 7), res); + + return res; +} + +static void bcm2835_cprman_a2w_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) { + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d" + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n", + size << 3, addr, value); + return; + } + value &= ~R_CPRMAN_PASSWD_MASK; + + trace_bcm2835_cprman_write_a2w(addr, a2w_name(addr), + pll_name((addr >> 5) & 7), value); +} + +static const MemoryRegionOps bcm2835_cprman_a2w_ops = { + .read = bcm2835_cprman_a2w_read, + .write = bcm2835_cprman_a2w_write, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static void bcm2835_cprman_init(Object *obj) +{ + BCM2835CprmanState *s = BCM2835_CPRMAN(obj); + + memory_region_init_io(&s->iomem.pm, obj, &bcm2835_cprman_pm_ops, s, + TYPE_BCM2835_CPRMAN "-pm", 0x1000); + memory_region_init_io(&s->iomem.cm, obj, &bcm2835_cprman_cm_ops, s, + TYPE_BCM2835_CPRMAN "-cm", 0x1000); + memory_region_init_io(&s->iomem.a2w, obj, &bcm2835_cprman_a2w_ops, s, + TYPE_BCM2835_CPRMAN "-a2w", 0x1000); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.pm); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.cm); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.a2w); +} + +static TypeInfo bcm2835_cprman_info = { + .name = TYPE_BCM2835_CPRMAN, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(BCM2835CprmanState), + .instance_init = bcm2835_cprman_init, +}; + +static void bcm2835_cprman_register_types(void) +{ + type_register_static(&bcm2835_cprman_info); +} + +type_init(bcm2835_cprman_register_types) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 1deb1d08c1..30d33e2e1d 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -149,3 +149,11 @@ bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" + +# bcm2835_cprman.c +bcm2835_cprman_read(unsigned size, uint64_t offset, const char *reg_type, const char *reg_name1, const char *reg_name2, uint32_t value) "cprman: rd%u @0x%03" PRIx64 " %s %s.%s val:0x%x" +bcm2835_cprman_write_pm(uint64_t offset, const char *reg_name, uint32_t value) "pm: wr @0x%03" PRIx64 " %s val:0x%x" +bcm2835_cprman_write_cm_generic(const char *reg_name, uint32_t val) "cprman: wr %s 0x%08x" +bcm2835_cprman_write_cm_div(const char *reg_name, uint32_t v0, uint32_t v1) "cprman: wr %s.DIV float:%u.%u" +bcm2835_cprman_write_cm_ctl(const char *reg_name, const char *src, uint32_t ena) "cprman: wr %s.CTL src:%s enabled:%u" +bcm2835_cprman_write_a2w(uint64_t offset, const char *reg_name, const char *pll_name, uint32_t value) "a2w: wr @0x%03" PRIx64 " %s.%s val:0x%x" diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 5b9fc89453..b4360ca1a8 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -19,6 +19,7 @@ #include "hw/intc/bcm2835_ic.h" #include "hw/misc/bcm2835_property.h" #include "hw/misc/bcm2835_rng.h" +#include "hw/misc/bcm2835_cprman.h" #include "hw/misc/bcm2835_mbox.h" #include "hw/misc/bcm2835_thermal.h" #include "hw/sd/sdhci.h" @@ -42,8 +43,7 @@ typedef struct BCM2835PeripheralState { BCM2835SysTimerState systmr; UnimplementedDeviceState armtmr; - UnimplementedDeviceState cprman; - UnimplementedDeviceState a2w; + BCM2835CprmanState cprman; PL011State uart0; BCM2835AuxState aux; BCM2835FBState fb; diff --git a/include/hw/misc/bcm2835_cprman.h b/include/hw/misc/bcm2835_cprman.h new file mode 100644 index 0000000000..4dd2c8323b --- /dev/null +++ b/include/hw/misc/bcm2835_cprman.h @@ -0,0 +1,32 @@ +/* + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version) + * + * Copyright (C) 2018 Guenter Roeck + * Copyright (C) 2018 Philippe Mathieu-Daudé + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef BCM2835_CPRMAN_H +#define BCM2835_CPRMAN_H + +#include "hw/sysbus.h" + +#define TYPE_BCM2835_CPRMAN "bcm2835-cprman" +#define BCM2835_CPRMAN(obj) \ + OBJECT_CHECK(BCM2835CprmanState, (obj), TYPE_BCM2835_CPRMAN) + +typedef struct { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + struct { + MemoryRegion pm; + MemoryRegion cm; + MemoryRegion a2w; + } iomem; +} BCM2835CprmanState; + +#endif From patchwork Thu Sep 26 17:34:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168032 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Vzs5sgC7"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fN2r0MGmz9sPc for ; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.34.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:34:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses Date: Thu, 26 Sep 2019 19:34:21 +0200 Message-Id: <20190926173428.10713-14-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The Raspberry firmware is closed-source. While running it, it accesses various I/O registers. Logging these accesses as UNIMP (unimplemented) help to understand what the firmware is doing (ideally we want it able to boot a Linux kernel). Document various blocks we might use later. Adresses and names based on: https://github.com/hermanhermitage/videocoreiv/wiki/MMIO-Register-map Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- Now the header is incorrect, should I add that in another file or update the header? * These definitions are derived from those in Raspbian Linux at * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h * where they carry the following notice: * * Copyright (C) 2010 Broadcom --- include/hw/arm/raspi_platform.h | 47 +++++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 8 deletions(-) diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index 61b04a1bd4..8bcf1c7c93 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -26,14 +26,19 @@ #define HW_ARM_RASPI_PLATFORM_H #define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */ -#define IC0_OFFSET 0x2000 +#define CCPT_OFFSET 0x1000 /* Compact Camera Port 2 TX */ +#define INTE_OFFSET 0x2000 /* VC Interrupt controller */ #define ST_OFFSET 0x3000 /* System Timer */ +#define TXP_OFFSET 0x4000 +#define JPEG_OFFSET 0x5000 #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */ #define DMA_OFFSET 0x7000 /* DMA controller, channels 0-14 */ -#define ARM_OFFSET 0xB000 /* BCM2708 ARM control block */ +#define ARBA_OFFSET 0x9000 +#define BRDG_OFFSET 0xa000 +#define ARM_OFFSET 0xB000 /* ARM control block */ #define ARMCTRL_OFFSET (ARM_OFFSET + 0x000) #define ARMCTRL_IC_OFFSET (ARM_OFFSET + 0x200) /* Interrupt controller */ -#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */ +#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */ #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores * Doorbells & Mailboxes */ #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */ @@ -42,24 +47,50 @@ #define AVS_OFFSET 0x103000 /* Audio Video Standard */ #define RNG_OFFSET 0x104000 #define GPIO_OFFSET 0x200000 -#define UART0_OFFSET 0x201000 -#define MMCI0_OFFSET 0x202000 -#define I2S_OFFSET 0x203000 -#define SPI0_OFFSET 0x204000 +#define UART0_OFFSET 0x201000 /* PL011 */ +#define MMCI0_OFFSET 0x202000 /* Legacy MMC */ +#define I2S_OFFSET 0x203000 /* PCM */ +#define SPI0_OFFSET 0x204000 /* SPI master */ #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ +#define PIXV0_OFFSET 0x206000 +#define PIXV1_OFFSET 0x207000 +#define DPI_OFFSET 0x208000 +#define DSI0_OFFSET 0x209000 /* Display Serial Interface */ +#define PWM_OFFSET 0x20c000 +#define PERM_OFFSET 0x20d000 +#define TEC_OFFSET 0x20e000 #define OTP_OFFSET 0x20f000 +#define SLIM_OFFSET 0x210000 /* SLIMbus */ +#define CPG_OFFSET 0x211000 #define THERMAL_OFFSET 0x212000 -#define BSC_SL_OFFSET 0x214000 /* SPI slave */ +#define AVSP_OFFSET 0x213000 +#define BSC_SL_OFFSET 0x214000 /* SPI slave (bootrom) */ #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ #define EMMC1_OFFSET 0x300000 +#define EMMC2_OFFSET 0x340000 +#define HVS_OFFSET 0x400000 #define SMI_OFFSET 0x600000 +#define DSI1_OFFSET 0x700000 +#define UCAM_OFFSET 0x800000 +#define CMI_OFFSET 0x802000 #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ #define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */ +#define VECA_OFFSET 0x806000 +#define PIXV2_OFFSET 0x807000 +#define HDMI_OFFSET 0x808000 +#define HDCP_OFFSET 0x809000 +#define ARBR0_OFFSET 0x80a000 #define DBUS_OFFSET 0x900000 #define AVE0_OFFSET 0x910000 #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ +#define V3D_OFFSET 0xc00000 #define SDRAMC_OFFSET 0xe00000 +#define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */ +#define L1CC_OFFSET 0xe02000 /* Level 1 Cache controller */ +#define ARBR1_OFFSET 0xe04000 #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */ +#define DCRC_OFFSET 0xe07000 +#define AXIP_OFFSET 0xe08000 /* GPU interrupts */ #define INTERRUPT_TIMER0 0 From patchwork Thu Sep 26 17:34:22 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Date: Thu, 26 Sep 2019 19:34:22 +0200 Message-Id: <20190926173428.10713-15-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.65 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Currently we are limited to use the first serial console available. Some machines/guest might use another console than the first one as the 'boot console'. To be able to use the N console as default, we simply need to connect all the N - 1 consoles to the null chardev. Add an index argument, so we can use a specific serial console as default. Signed-off-by: Philippe Mathieu-Daudé --- python/qemu/machine.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/python/qemu/machine.py b/python/qemu/machine.py index 128a3d1dc2..302b158a18 100644 --- a/python/qemu/machine.py +++ b/python/qemu/machine.py @@ -235,6 +235,8 @@ class QEMUMachine(object): '-display', 'none', '-vga', 'none'] if self._machine is not None: args.extend(['-machine', self._machine]) + for i in range(self._console_id): + args.extend(['-serial', 'null']) if self._console_set: self._console_address = os.path.join(self._temp_dir, self._name + "-console.sock") @@ -495,7 +497,7 @@ class QEMUMachine(object): """ self._machine = machine_type - def set_console(self, device_type=None): + def set_console(self, device_type=None, console_id=0): """ Sets the device type for a console device @@ -519,6 +521,7 @@ class QEMUMachine(object): """ self._console_set = True self._console_device_type = device_type + self._console_id = console_id @property def console_socket(self): From patchwork Thu Sep 26 17:34:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168036 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="t7wXGZvq"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fN9v0LRBz9sNk for ; Fri, 27 Sep 2019 04:04:51 +1000 (AEST) Received: from localhost ([::1]:42014 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDY8G-0003z7-58 for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 14:04:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59113) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXgV-0004lz-9B for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDXgU-00037J-4h for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:07 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:33347) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDXgT-00036d-V9; Thu, 26 Sep 2019 13:36:06 -0400 Received: by mail-wm1-f66.google.com with SMTP id r17so7136180wme.0; Thu, 26 Sep 2019 10:36:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Z54O11bD1AbofRei7LiG1f1sZB2nRqAkLzkY3rTTmZI=; b=t7wXGZvq12V5hEcgfvWVIZ+8SGse2gghokboAfHp0r+y6hhBb7A6uUVCAUdjhkDuOJ f2H0Zwf7hpMlRI7IyR4roEyhRs21f/LUXCd3wPGbFioe4Ii5uUe/t247FcsMbTMDJf9G wDEd9bgC7FXkFYJe5L+eYClcAcfxPH3DERjK4QelVCp24B+tQmg8/DeuK2FSwUuwoOGv LGv9NdF0hW0BjD/XdEgRn9EjN8GZ4yZ0MM/akgUq+Pu5k0FA/t7pOkYY/Ptqn17C6U1c unKCATtFbHK91Udn7J5rCbRMoLfKbfJvZkBNENokX1ZLDFz+MVqeuN51GanpmpYm8jXW p/mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Z54O11bD1AbofRei7LiG1f1sZB2nRqAkLzkY3rTTmZI=; b=cDVMv8GkPAcYxaG3dkZOnXUgS3UWa3q8ypfhT7tLWLxhwp8aUsIVPfzcoTugrfp+j3 DZQrEIZgQPLJ1LnKCK2gfTJiYCDuYjQbVWgHgX5QqAMgUeO9jJYh2pNipCMRdg1FIkl9 tVZ/NsndvX8OO8dGF8uwkxKWqr2d0R+PuJKP8T2I+HwUv3K2H8lfXkNCAsrE1sAS/tsx W1/0CX+/9wNl7csIDGOTiNWWwOnUen0md3edxna9dFEK194OafMjfPgg+9kwq25h6x+3 F1dN1fpcx+adBLyzsMpyXStAjrgAglszD/2w+3fMqrO0FXHU16PqQPlJjaliUNllc6Rj TM6w== X-Gm-Message-State: APjAAAXkkYAv/nvuV+3l6C+slXmAbuJ50VjQOoWtjPmfPk38Z7a797FR wr7uCMeXdGyve11N8yq9tSVjMqosV6U= X-Google-Smtp-Source: APXvYqzyJvZSIbnP9uUtga136B5UFGxyORKIr07OuneVC0JWA5G6Wf2m+c89CBudBofQo57In7+BPg== X-Received: by 2002:a1c:1981:: with SMTP id 123mr3901961wmz.88.1569519304847; Thu, 26 Sep 2019 10:35:04 -0700 (PDT) Received: from x1w.redhat.com (240.red-88-21-68.staticip.rima-tde.net. [88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Date: Thu, 26 Sep 2019 19:34:23 +0200 Message-Id: <20190926173428.10713-16-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We are going to use the same pattern. Instead of keeping copy/pasting this code, extract as a local function. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Esteban Bosse --- tests/acceptance/boot_linux_console.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 8a9a314ab4..079590f0c8 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -19,6 +19,11 @@ from avocado.utils import process from avocado.utils import archive +def gunzip(in_pathname_gz, out_pathname): + with gzip.open(in_pathname_gz, 'rb') as f_in: + with open(out_pathname, 'wb') as f_out: + shutil.copyfileobj(f_in, f_out) + class BootLinuxConsole(Test): """ Boots a Linux kernel and checks that the console is operational and the @@ -166,10 +171,7 @@ class BootLinuxConsole(Test): initrd_hash = 'bf806e17009360a866bf537f6de66590de349a99' initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash) initrd_path = self.workdir + "rootfs.cpio" - - with gzip.open(initrd_path_gz, 'rb') as f_in: - with open(initrd_path, 'wb') as f_out: - shutil.copyfileobj(f_in, f_out) + gunzip(initrd_path_gz, initrd_path) self.vm.set_machine('malta') self.vm.set_console() From patchwork Thu Sep 26 17:34:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168030 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="aZSw6xRU"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fMzl4xVrz9sNf for ; Fri, 27 Sep 2019 03:56:03 +1000 (AEST) Received: from localhost ([::1]:41916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXzl-0005Gp-7Q for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 13:56:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59176) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXgZ-0004s2-KU for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDXgW-00038e-0p for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:11 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:41671) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDXgV-00038R-R9; Thu, 26 Sep 2019 13:36:07 -0400 Received: by mail-wr1-f67.google.com with SMTP id h7so3426437wrw.8; Thu, 26 Sep 2019 10:36:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xoacbOd8UyUj66KJoz5CJtwAwcD7yLUS/+XI1DIJ904=; b=aZSw6xRUhvHOfj9MMOOIGfrU6BTC5zijJNv2xZTIZ7wMOLihCJuaT9H4eo4dfhufnl 1fxMe56/zUJGGEe3qR5HBcPANG13kg6fPUnWRRVYqAZOKwhin7E4P0wAEGOy916FEZKk e4kqZb8vizTJ4Sq86vDg1gg9kdgYUhkHlXPM0nnTeEhilaVxRzcOjcdkzF//egLJpaz1 Sqxl89uX/sw2W1tPHEa9pSsDRCrOkLY71Acgcu7XSrFhqkbMZTlzE0pSNyYh2fZKW4oz BjsSKYAHcJuZr5PWcszl3HV8zN/B9ztOBP/Rz6GnlwitXIB7Wv11lqnjmGw4s7sDPBiB khUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=xoacbOd8UyUj66KJoz5CJtwAwcD7yLUS/+XI1DIJ904=; b=KMzUDqQAg1SCE8Cv5XhLt5N3llDmuDJc8291p9PAhzbpceZXzbjVNBSC5hTDDuksAz s5Li2jlehQk5kE1XgFJRvT1EKN4uFrmMcTFpAOimeRKx+Xs9HEuOMeoU8Y5c0oLgAY5K oXVULLoACGDGT/uAX5uKJNuGL7w/lldnBMfM3uUHv0UZHnJHKUHKIXNCe/6qhJ8X/SCi l0BbSAGwuVY1SFaR3p/5Wgbo+pffkzTYHN0rQR7UN9VFBI+m94uK+RiHiE+4zm8vsHDx SYXRtnVKLEy4QCr4+M2DOk/y2P8b9Y+14opfuvFiRykxeaqdDGDqA46wiIuW+ddZWVx5 vkoQ== X-Gm-Message-State: APjAAAWRTQqJ7ExdgPOFrXE5urMlG5cCLaNr4mf8Lhtfiosy3gEotsBz pJ2biSSsuw8VUjz/gCnV89WB2vlMKwE= X-Google-Smtp-Source: APXvYqwoyS2ioBkz0dl3A6iyTnSJnuWhlA3zhW9aYOckS4DI6CISJaxH8vgC9eMXcfY9xHaH5XgFVA== X-Received: by 2002:adf:de0d:: with SMTP id b13mr3824717wrm.140.1569519306690; Thu, 26 Sep 2019 10:35:06 -0700 (PDT) Received: from x1w.redhat.com (240.red-88-21-68.staticip.rima-tde.net. [88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Date: Thu, 26 Sep 2019 19:34:24 +0200 Message-Id: <20190926173428.10713-17-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Similar to the x86_64/pc test, it boots a Linux kernel on a raspi2 board and verify the serial is working. The kernel image and DeviceTree blob are built by the Raspbian project (based on Debian): https://www.raspbian.org/RaspbianImages as recommended by the Raspberry Pi project: https://www.raspberrypi.org/downloads/raspbian/ If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ avocado run -t arch:arm tests/acceptance $ avocado run -t machine:raspi2 tests/acceptance Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa --- v3: removed debug printf (Cleber) use serial_kernel_cmdline dict --- tests/acceptance/boot_linux_console.py | 36 ++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 079590f0c8..7eaf6cb60e 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -318,6 +318,42 @@ class BootLinuxConsole(Test): self.vm.launch() self.wait_for_console_pattern('init started: BusyBox') + def do_test_arm_raspi2(self, uart_id): + """ + The kernel can be rebuilt using the kernel source referenced + and following the instructions on the on: + https://www.raspberrypi.org/documentation/linux/kernel/building.md + """ + serial_kernel_cmdline = { + 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0', + } + deb_url = ('http://archive.raspberrypi.org/debian/' + 'pool/main/r/raspberrypi-firmware/' + 'raspberrypi-kernel_1.20190215-1_armhf.deb') + deb_hash = 'cd284220b32128c5084037553db3c482426f3972' + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash) + kernel_path = self.extract_from_deb(deb_path, '/boot/kernel7.img') + dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb') + + self.vm.set_machine('raspi2') + self.vm.set_console() + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + + serial_kernel_cmdline[uart_id]) + self.vm.add_args('-kernel', kernel_path, + '-dtb', dtb_path, + '-append', kernel_command_line) + self.vm.launch() + console_pattern = 'Kernel command line: %s' % kernel_command_line + self.wait_for_console_pattern(console_pattern) + + def test_arm_raspi2_uart0(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:raspi2 + :avocado: tags=device:pl011 + """ + self.do_test_arm_raspi2(0) + def test_s390x_s390_ccw_virtio(self): """ :avocado: tags=arch:s390x From patchwork Thu Sep 26 17:34:25 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Date: Thu, 26 Sep 2019 19:34:25 +0200 Message-Id: <20190926173428.10713-18-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The current do_test_arm_raspi2() case tests the PL011 UART0. Our model also supports the AUX UART (16550 based). We can very simply test the UART1 with Linux, modifying the kernel command line. Add few lines to expand our previous test and cover the AUX UART. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa --- tests/acceptance/boot_linux_console.py | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 7eaf6cb60e..33e8f6c635 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -326,6 +326,7 @@ class BootLinuxConsole(Test): """ serial_kernel_cmdline = { 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0', + 1: 'earlycon=uart8250,mmio32,0x3f215040 console=ttyS1,115200' } deb_url = ('http://archive.raspberrypi.org/debian/' 'pool/main/r/raspberrypi-firmware/' @@ -336,7 +337,7 @@ class BootLinuxConsole(Test): dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb') self.vm.set_machine('raspi2') - self.vm.set_console() + self.vm.set_console(console_id=uart_id) kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + serial_kernel_cmdline[uart_id]) self.vm.add_args('-kernel', kernel_path, @@ -354,6 +355,14 @@ class BootLinuxConsole(Test): """ self.do_test_arm_raspi2(0) + def test_arm_raspi2_uart1(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:raspi2 + :avocado: tags=device:bcm2835_aux + """ + self.do_test_arm_raspi2(1) + def test_s390x_s390_ccw_virtio(self): """ :avocado: tags=arch:s390x From patchwork Thu Sep 26 17:34:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1168057 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="rmchfyel"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fNKt5r3Jz9sNf for ; Fri, 27 Sep 2019 04:11:46 +1000 (AEST) Received: from localhost ([::1]:42048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDYEy-0002BV-EV for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 14:11:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59200) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXgb-0004u5-6Q for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDXgZ-0003Bx-Ff for qemu-devel@nongnu.org; Thu, 26 Sep 2019 13:36:12 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:43456) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDXgZ-0003Au-8l; Thu, 26 Sep 2019 13:36:11 -0400 Received: by mail-wr1-f68.google.com with SMTP id q17so3427826wrx.10; Thu, 26 Sep 2019 10:36:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Z2jS7j2Q+UZz1eGlkTvwz28s1PK4ipN7g47nz7DXm4=; b=rmchfyellb1V8WNuVkKdIvfHSf/UUoCi2kMuM6NQrmsHqEHMjBcNdfjTt+S1aIb15h tjCbrcWk+sTTfsFX/F5kS3TLqDrBE4NSGCJvgs1VYnSSWIuTCibg4LWPQywFWIpjqYzz mV0TN4rqhQsa4csXVmYE5NpkpLOGGOWciDoKW8ZsJNvGKlZZL0glkiHXME9i/sPL+Ccw 0yAyu7HTMyUcFMbTWFOiS8OvCgrAFcjJ2aer+tnfcfe1nmLZBVwg3PwBnJBxmv4nXd1b Lu98O2L1vSq9fxQG7jBOzi3bRMMRrqd1lYnIb8IGSydXFektTD2vra1I+pAQe6Iqlv34 C5QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9Z2jS7j2Q+UZz1eGlkTvwz28s1PK4ipN7g47nz7DXm4=; b=slBX12eHxVSAA6ZArtxv61ouBD1EiIZy8hu2/4duK+ioqAvHIDSEZu0diPQ5CzbFVx nle0zLQGWvr41k1x71ovS8amrRGt+OFVDBi+rE4/767V6kpskqBTs++xrwLB+x920+eY DmyyPaC/LExGHIrY50E2sjnhzR2p+XzeloqA+4YOSFEA5pq6rOQzilj3DwEht0qgFpVC MyYOF7ZpGsGuh/XLPBiX/tAdmEnMIzwX6iDAwFDdya74DxYflTlEesYyEJwz8gtrSnJa OQ+o4ANulSuOVfnA+bDT/jdOYdxKD4orCTG+py6VPCrI/pf73ZIAk1kFW3JgG8CR040a xSOA== X-Gm-Message-State: APjAAAWtmPds7JYGnpBWUq+D69haS/N+rg25Z+uFwmPkUcrUBpAVc5DK 6zF3+cbzAY/R59rjZCYHqn5wqfjiGDw= X-Google-Smtp-Source: APXvYqyGwPO0hdhmCWqnJ/ZUf20VFsl/PotcP315LfahabILnQBejdS7DBfRSotbZIYlDocbSayY2g== X-Received: by 2002:adf:e48a:: with SMTP id i10mr3831085wrm.311.1569519309986; Thu, 26 Sep 2019 10:35:09 -0700 (PDT) Received: from x1w.redhat.com (240.red-88-21-68.staticip.rima-tde.net. [88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3 Date: Thu, 26 Sep 2019 19:34:26 +0200 Message-Id: <20190926173428.10713-19-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.68 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a test which boots Linux and run basic commands using the serial port console. The kernel image is built by the Debian project: https://wiki.debian.org/RaspberryPi The DeviceTree blob comes from the official Raspberry Pi project: https://www.raspberrypi.org/ The cpio image used comes from the linux-build-test project: https://github.com/groeck/linux-build-test This test can be run using: $ avocado run --show=console,app run -t machine:raspi3 tests/acceptance console: [ 0.000000] Linux version 4.14.0-3-arm64 (debian-kernel@lists.debian.org) (gcc version 7.2.0 (Debian 7.2.0-18)) #1 SMP Debian 4.14.12-2 (2018-01-06) console: [ 0.000000] Boot CPU: AArch64 Processor [410fd034] console: [ 0.000000] Machine model: Raspberry Pi 3 Model B console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '') console: [ 0.000000] bootconsole [pl11] enabled [...] console: Starting network: OK console: Found console ttyAMA0 console: Boot successful. console: / # cat /proc/cpuinfo console: processor : 0 console: BogoMIPS : 125.00 console: r : 0x41 console: CPU architecture: 8 console: CPU variant console: : 0x0 console: CPU part : 0xd03 console: CPU revision : 4 console: / # uname -a console: Linux buildroot 4.14.0-3-arm64 #1 SMP Debian 4.14.12-2 (2018-01-06) aarch64 GNU/Linux console: reboot console: / # reboot console: / # Found console ttyAMA0 console: Stopping network: OK console: Saving random seed... done. console: Stopping logging: OK console: umount: devtmpfs busy - remounted read-only console: umount: can't unmount /: Invalid argument console: The system is going down NOW! console: Sent SIGTERM to all processes console: Sent SIGKILL to all processes console: Requesting system reboot console: kvm: exiting hardware virtualization console: reboot: Restarting system PASS (11.08 s) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa --- some chars are scrambled on the console... --- tests/acceptance/boot_linux_console.py | 47 ++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 33e8f6c635..2a1a23763e 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -363,6 +363,53 @@ class BootLinuxConsole(Test): """ self.do_test_arm_raspi2(1) + def test_arm_raspi3_initrd_uart0(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=machine:raspi3 + """ + deb_url = ('https://snapshot.debian.org/archive/debian/' + '20180106T174014Z/pool/main/l/linux/' + 'linux-image-4.14.0-3-arm64_4.14.12-2_arm64.deb') + deb_hash = 'e71c995de57921921895c1162baea5df527d1c6b' + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash) + kernel_path = self.extract_from_deb(deb_path, + '/boot/vmlinuz-4.14.0-3-arm64') + + dtb_url = ('https://github.com/raspberrypi/firmware/raw/' + '1.20180313/boot/bcm2710-rpi-3-b.dtb') + dtb_hash = 'eb14d67133401ef2f93523be7341456d38bfc077' + dtb_path = self.fetch_asset(dtb_url, asset_hash=dtb_hash) + + initrd_url = ('https://github.com/groeck/linux-build-test/raw/' + '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/' + 'arm64/rootfs.cpio.gz') + initrd_hash = '6fd05324f17bb950196b5ad9d3a0fa996339f4cd' + initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash) + initrd_path = self.workdir + "rootfs.cpio" + gunzip(initrd_path_gz, initrd_path) + + self.vm.set_machine('raspi3') + self.vm.set_console() + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + + 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' + + 'panic=-1 noreboot') + self.vm.add_args('-kernel', kernel_path, + '-dtb', dtb_path, + '-initrd', initrd_path, + '-append', kernel_command_line, + '-no-reboot') + self.vm.launch() + + self.wait_for_console_pattern('Boot successful.') + + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo', + 'BogoMIPS') + self.exec_command_and_wait_for_pattern('uname -a', + 'Debian') + self.exec_command_and_wait_for_pattern('reboot', + 'reboot: Restarting system') + def test_s390x_s390_ccw_virtio(self): """ :avocado: tags=arch:s390x From patchwork Thu Sep 26 17:34:27 2019 Content-Type: text/plain; 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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id b186sm9918980wmd.16.2019.09.26.10.35.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 10:35:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor on raspi3 Date: Thu, 26 Sep 2019 19:34:27 +0200 Message-Id: <20190926173428.10713-20-f4bug@amsat.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926173428.10713-1-f4bug@amsat.org> References: <20190926173428.10713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.66 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Zolt=C3=A1n_Baldas?= =?utf-8?q?zti?= , Laurent Bonnans , Esteban Bosse , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Andrew Baumann , =?utf-8?q?Marc-Andr?= =?utf-8?b?w6kgTHVyZWF1?= , qemu-arm@nongnu.org, Clement Deschamps , Cleber Rosa , Paolo Bonzini , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a test which loads the root filesystem on a SD card. Use a kernel recent enough to also test the thermal sensor. The kernel image comes from: https://github.com/sakaki-/bcmrpi3-kernel#description The cpio image used comes from the linux-build-test project: https://github.com/groeck/linux-build-test Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa --- tests/acceptance/boot_linux_console.py | 45 ++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 2a1a23763e..5c48cacba8 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -410,6 +410,51 @@ class BootLinuxConsole(Test): self.exec_command_and_wait_for_pattern('reboot', 'reboot: Restarting system') + def test_arm_raspi3_initrd_sd_temp(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=machine:raspi3 + """ + tarball_url = ('https://github.com/sakaki-/bcmrpi3-kernel/releases/' + 'download/4.19.71.20190910/' + 'bcmrpi3-kernel-4.19.71.20190910.tar.xz') + tarball_hash = '844f117a1a6de0532ba92d2a7bceb5b2acfbb298' + tarball_path = self.fetch_asset(tarball_url, asset_hash=tarball_hash) + archive.extract(tarball_path, self.workdir) + dtb_path = self.workdir + "/boot/bcm2837-rpi-3-b.dtb" + kernel_path = self.workdir + "/boot/kernel8.img" + + rootfs_url = ('https://github.com/groeck/linux-build-test/raw/' + '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/' + 'arm64/rootfs.ext2.gz') + rootfs_hash = 'dbe4136f0b4a0d2180b93fd2a3b9a784f9951d10' + rootfs_path_gz = self.fetch_asset(rootfs_url, asset_hash=rootfs_hash) + rootfs_path = self.workdir + "rootfs.ext2" + gunzip(rootfs_path_gz, rootfs_path) + + self.vm.set_machine('raspi3') + self.vm.set_console() + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + + 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' + + 'root=/dev/mmcblk0 rootwait rw ' + + 'panic=-1 noreboot') + self.vm.add_args('-kernel', kernel_path, + '-dtb', dtb_path, + '-append', kernel_command_line, + '-drive', 'file=' + rootfs_path + ',if=sd,format=raw', + '-no-reboot') + self.vm.launch() + + self.wait_for_console_pattern('Boot successful.') + + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo', + 'Raspberry Pi 3 Model B') + self.exec_command_and_wait_for_pattern('cat /sys/devices/virtual/' + + 'thermal/thermal_zone0/temp', + '25178') + self.exec_command_and_wait_for_pattern('reboot', + 'reboot: Restarting system') + def test_s390x_s390_ccw_virtio(self): """ :avocado: tags=arch:s390x