From patchwork Mon Sep 23 08:13:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1165846 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="hQS6oY/J"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46cHCV2VkDz9sPD for ; Mon, 23 Sep 2019 18:13:58 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406704AbfIWINz (ORCPT ); Mon, 23 Sep 2019 04:13:55 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:46481 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406607AbfIWINz (ORCPT ); Mon, 23 Sep 2019 04:13:55 -0400 Received: by mail-lf1-f67.google.com with SMTP id t8so9334596lfc.13 for ; Mon, 23 Sep 2019 01:13:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y0u2P7pamoOhyJrqwJt38ESkhZ0sdWB5inGNjp2B0iE=; b=hQS6oY/JaqwIwiWR3QGBGTrvnZ0Ox9Tp21cnMGLGOBTSqAv6Pxu1Uo7aVpspDOwoKs ICEjPp6uhe0tKO00gdZLNcWvQ1ZE1Fx63MnumVq1Xw7e18d7WTJ8a4/ZgU/UEQqPFM9q aS6UZDZ/Vv1kDFZtq8xRAmhcKq+JziDPGf8Kg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y0u2P7pamoOhyJrqwJt38ESkhZ0sdWB5inGNjp2B0iE=; b=qT2FtI2DaLuaLaojkRiYWjeNpyrTyusqOUzXpjspg4tmr+c6n2escEJi8IWE1WnW+a eFYuIwZCKnhuDvSv0CksJxJ0jorv+E1Xzd4GwNzY5MMKSyfnfMKQD9UhmkPCU8KVF1Lh OQcplSdV4TLvnr2tmwCu1Kvs8R8aBai1jFPJeWb+HgSbq7y4EWtQA50fn+BC8wO6NRSa Y1EK0SMfku7ybEldz6Va1Gsqw5P6y6jCe3xzgAy9Cb0AGKKZxqqKeWhhrQSaJiUBdf/M tvII6XzAL0+WE0Gf0wrRSPBAPW9lXGkqb1mwJWCLaSGCV9XSA65n2KZug9m3/Uhrjtn4 SFyw== X-Gm-Message-State: APjAAAXvQoO0F+meDuBwQDQEYq+/nnj5bHKi2rUdprZ1c+gEfsx+Y9PG hMq3ip2qzCNPxnKsKzqUVzKhXQ== X-Google-Smtp-Source: APXvYqyXbJD3jcPtkfunH7p5W/yiqrLQ0jizMCztCXox/YlwFtfX/7WaU2GXsONN3ApveQi4vG9rwg== X-Received: by 2002:a19:22cd:: with SMTP id i196mr15644550lfi.160.1569226433180; Mon, 23 Sep 2019 01:13:53 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id c21sm2054946lff.61.2019.09.23.01.13.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Sep 2019 01:13:52 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] pwm: mxs: implement ->apply Date: Mon, 23 Sep 2019 10:13:45 +0200 Message-Id: <20190923081348.6843-2-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190923081348.6843-1-linux@rasmusvillemoes.dk> References: <20190923081348.6843-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org In preparation for supporting setting the polarity, switch the driver to support the ->apply method. Signed-off-by: Rasmus Villemoes --- drivers/pwm/pwm-mxs.c | 62 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 04c0f6b95c1a..c70c26a9ff68 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -26,6 +26,7 @@ #define PERIOD_PERIOD_MAX 0x10000 #define PERIOD_ACTIVE_HIGH (3 << 16) #define PERIOD_INACTIVE_LOW (2 << 18) +#define PERIOD_POLARITY_NORMAL (PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW) #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 @@ -41,6 +42,66 @@ struct mxs_pwm_chip { #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip) +static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); + int ret, div = 0; + unsigned int period_cycles, duty_cycles; + unsigned long rate; + unsigned long long c; + + if (state->polarity != PWM_POLARITY_NORMAL) + return -ENOTSUPP; + + rate = clk_get_rate(mxs->clk); + while (1) { + c = rate / cdiv[div]; + c = c * state->period; + do_div(c, 1000000000); + if (c < PERIOD_PERIOD_MAX) + break; + div++; + if (div >= PERIOD_CDIV_MAX) + return -EINVAL; + } + + period_cycles = c; + c *= state->duty_cycle; + do_div(c, state->period); + duty_cycles = c; + + /* + * If the PWM channel is disabled, make sure to turn on the clock + * before writing the register. Otherwise, keep it enabled. + */ + if (!pwm_is_enabled(pwm)) { + ret = clk_prepare_enable(mxs->clk); + if (ret) + return ret; + } + + writel(duty_cycles << 16, + mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); + writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div), + mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); + + if (state->enabled) { + if (!pwm_is_enabled(pwm)) { + /* + * The clock was enabled above. Just enable + * the channel in the control register. + */ + writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); + } + } else { + if (pwm_is_enabled(pwm)) + writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); + clk_disable_unprepare(mxs->clk); + } + return 0; +} + static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -116,6 +177,7 @@ static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) } static const struct pwm_ops mxs_pwm_ops = { + .apply = mxs_pwm_apply, .config = mxs_pwm_config, .enable = mxs_pwm_enable, .disable = mxs_pwm_disable, From patchwork Mon Sep 23 08:13:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1165853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="HgcQ1K4t"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46cHCh27bnz9sP6 for ; Mon, 23 Sep 2019 18:14:08 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437193AbfIWIN5 (ORCPT ); Mon, 23 Sep 2019 04:13:57 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:38604 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406068AbfIWIN4 (ORCPT ); Mon, 23 Sep 2019 04:13:56 -0400 Received: by mail-lf1-f66.google.com with SMTP id u28so9376934lfc.5 for ; Mon, 23 Sep 2019 01:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lD0e8xFBv1AR2F4JhSacxWgoKrl7ntnXXGEiOwHJH74=; b=HgcQ1K4tr0a4wAHLWjvdmktJUM3BVu3dL17gzfeF3nAdsClcj6wJpQRG6DTVB1hHUz Ocxoxx1M7JSEGyy/x1h5RDBNGIkNUresJDZanlEHiG4f+3mLRDMjpRIMk4Ihi6/cdnfz LY3qlvifzD2By4oG01tO2WS6ZIhOkjr2PMAdk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lD0e8xFBv1AR2F4JhSacxWgoKrl7ntnXXGEiOwHJH74=; b=OF5UFwVySMEUcLw1vWtNwrXEnj5E/d90AzgdZDZqk/EBEDXifn6FS3iXUrxC+gpGtC aRyPZBcRUPLkHAZRQGuLwxCKs1MyMhcd7X7HipBqrcmhT+T0Kn28oQmTht/0R5yfVgXL TaElHed4Kj7ud0g7hmEMpKoTMeuBo0dHr0aJSfY1G9LLEle64J4FNscis2+Bo/nmjADr nLZfizUsOdY2hViJ7XvRkH6N4k5Dq2I635usosxez2pCGkJnp49c7VXsIN0eBrGXp3nx q1rSnuCZ3xNKiIVn6xrkROHollDuHbS5Q/2xHA0CUXB8IotVvKl4zWB1tl2b8eHkAk4c 1isQ== X-Gm-Message-State: APjAAAVZRN3Oqlcgg7bIN2RSjkWPXbjsbOfOJ+Hz5ZSA1qEtoXQcuqNA Z+qlcIWZmqCMNaRjJhmok22Gqw== X-Google-Smtp-Source: APXvYqw1MEjTQxg98Niosegmp9jqiu0UU9wKr4JajogIk6AZhpzsknKDrE5TkAC9EB5KWFhVZyxHSQ== X-Received: by 2002:a19:6455:: with SMTP id b21mr16301336lfj.167.1569226434462; Mon, 23 Sep 2019 01:13:54 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id c21sm2054946lff.61.2019.09.23.01.13.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Sep 2019 01:13:54 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] pwm: mxs: remove legacy methods Date: Mon, 23 Sep 2019 10:13:46 +0200 Message-Id: <20190923081348.6843-3-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190923081348.6843-1-linux@rasmusvillemoes.dk> References: <20190923081348.6843-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Since we now have ->apply, these are no longer relevant. Signed-off-by: Rasmus Villemoes --- drivers/pwm/pwm-mxs.c | 77 ------------------------------------------- 1 file changed, 77 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index c70c26a9ff68..284107784dad 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -102,85 +102,8 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } -static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret, div = 0; - unsigned int period_cycles, duty_cycles; - unsigned long rate; - unsigned long long c; - - rate = clk_get_rate(mxs->clk); - while (1) { - c = rate / cdiv[div]; - c = c * period_ns; - do_div(c, 1000000000); - if (c < PERIOD_PERIOD_MAX) - break; - div++; - if (div >= PERIOD_CDIV_MAX) - return -EINVAL; - } - - period_cycles = c; - c *= duty_ns; - do_div(c, period_ns); - duty_cycles = c; - - /* - * If the PWM channel is disabled, make sure to turn on the clock - * before writing the register. Otherwise, keep it enabled. - */ - if (!pwm_is_enabled(pwm)) { - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - } - - writel(duty_cycles << 16, - mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); - writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH | - PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), - mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); - - /* - * If the PWM is not enabled, turn the clock off again to save power. - */ - if (!pwm_is_enabled(pwm)) - clk_disable_unprepare(mxs->clk); - - return 0; -} - -static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret; - - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); - - return 0; -} - -static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); - - clk_disable_unprepare(mxs->clk); -} - static const struct pwm_ops mxs_pwm_ops = { .apply = mxs_pwm_apply, - .config = mxs_pwm_config, - .enable = mxs_pwm_enable, - .disable = mxs_pwm_disable, .owner = THIS_MODULE, }; From patchwork Mon Sep 23 08:13:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1165852 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="Dmz12yDs"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46cHCg5GTzz9s00 for ; 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bh=VpSGZcyphX33tWCKZj2QOnhjatCzwqevQiSu1wJE2ec=; b=rXvfBC0MFD+dheGnNjAUPUD4pO1KS7a67hyhW2FJrHJPSDvzwRkso5wB+eGCgD6+Vu VDGHFIBWPJTohqLc3EIVBY/ZT2TUCSAaI3xZ7BskDC42s8MZWyZEOibk4FLbdGCCo+Ts D0Xffoh0Hc/oqmqMRaBJYQxqg0uTWOtbF7oITETmKvsqNauGWnSZGXP8VIt5AwYH6O9v pIssNjJjGG+RK439nnjXbSe5lJCz2T4LiGXUZMXtv6e81xfF5abuOrsw0layOrKOHwDF nQkagzxa/F9ns2d5cwDGGiirLLOIz3pR3s2UUowD3pC4jpNQ6z792DFuQ6Afx9x7MKtv 3nmw== X-Gm-Message-State: APjAAAVJ7OYD/Gl7/WL2PXQ+shuy/735jGH+QgCxsFYp+EvnNNWsl/qd MeiHSCTMB1qoxjQ//ZNXd7fBDg== X-Google-Smtp-Source: APXvYqyRCHU11hssheYtvH+avbpnrQ3CA/+RFZKG1MN2UvDqgVLTYcR3tSNxmjLfxzRrao5PKLPLeQ== X-Received: by 2002:ac2:51ce:: with SMTP id u14mr14611494lfm.72.1569226435700; Mon, 23 Sep 2019 01:13:55 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id c21sm2054946lff.61.2019.09.23.01.13.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Sep 2019 01:13:55 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] pwm: mxs: add support for inverse polarity Date: Mon, 23 Sep 2019 10:13:47 +0200 Message-Id: <20190923081348.6843-4-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190923081348.6843-1-linux@rasmusvillemoes.dk> References: <20190923081348.6843-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org If I'm reading of_pwm_xlate_with_flags() right, existing device trees that set #pwm-cells = 2 will continue to work. Signed-off-by: Rasmus Villemoes --- drivers/pwm/pwm-mxs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 284107784dad..c46697acaf11 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -25,8 +25,11 @@ #define PERIOD_PERIOD(p) ((p) & 0xffff) #define PERIOD_PERIOD_MAX 0x10000 #define PERIOD_ACTIVE_HIGH (3 << 16) +#define PERIOD_ACTIVE_LOW (2 << 16) +#define PERIOD_INACTIVE_HIGH (3 << 18) #define PERIOD_INACTIVE_LOW (2 << 18) #define PERIOD_POLARITY_NORMAL (PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW) +#define PERIOD_POLARITY_INVERSE (PERIOD_ACTIVE_LOW | PERIOD_INACTIVE_HIGH) #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 @@ -50,9 +53,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, unsigned int period_cycles, duty_cycles; unsigned long rate; unsigned long long c; - - if (state->polarity != PWM_POLARITY_NORMAL) - return -ENOTSUPP; + unsigned int pol_bits; rate = clk_get_rate(mxs->clk); while (1) { @@ -81,9 +82,12 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return ret; } + pol_bits = state->polarity == PWM_POLARITY_NORMAL ? + PERIOD_POLARITY_NORMAL : PERIOD_POLARITY_INVERSE; + writel(duty_cycles << 16, mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); - writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div), + writel(PERIOD_PERIOD(period_cycles) | pol_bits | PERIOD_CDIV(div), mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); if (state->enabled) { @@ -129,6 +133,8 @@ static int mxs_pwm_probe(struct platform_device *pdev) mxs->chip.dev = &pdev->dev; mxs->chip.ops = &mxs_pwm_ops; + mxs->chip.of_xlate = of_pwm_xlate_with_flags; + mxs->chip.of_pwm_n_cells = 3; mxs->chip.base = -1; ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm); From patchwork Mon Sep 23 08:13:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1165849 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="ewfXG73b"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46cHCZ2whpz9sPD for ; Mon, 23 Sep 2019 18:14:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437137AbfIWIOA (ORCPT ); Mon, 23 Sep 2019 04:14:00 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:38608 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437271AbfIWIOA (ORCPT ); Mon, 23 Sep 2019 04:14:00 -0400 Received: by mail-lf1-f68.google.com with SMTP id u28so9377017lfc.5 for ; Mon, 23 Sep 2019 01:13:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yaEGfYYzHwOCfVyIlgvVjUBZGDRTASgoNwVywAAbPHY=; b=ewfXG73buI74XMq7fZvVCWZKlgR+0TiV4JG9jO/fe49Cgrg27am4riX0e0bPmvYroq u1b3ifBwwoH+Hu3VVrsI7kvp9IgLIBUnoVgqO1+NL1lZp+dR74yHyrgZ1unaAXzC4J6X kayGRA9zv0hm5PTVKc5F3g/2+TsbFV+athuPM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yaEGfYYzHwOCfVyIlgvVjUBZGDRTASgoNwVywAAbPHY=; b=sPV/LJ0GtXLSP3/ZDv38hheyZ6pkLBI6REZpM53LgbRtxMcIeWmFkMywWZEDamQnU3 mRfaoQY0oReYV0O3hnsDqJ8jHbVK9t3j32mmNkdHTxqyfhE779NySLyV8oH1zu9UDp7c s8Di5XpoiWBPlGgB1BxZ3Zo5aJa3Di5qIXJ1Bx78qckhzJUzKYYaLYr9igvxBOsMtDhh 0IKW7nDVqyskLB9GIzIbRR/yOaZhrydwlE/1ryodIpFYcSMKtADrPKkMXoZEgXFaRXcj w+AGW2cN5DOkHmKMN4MZSTlOK5LGEZh54NaWTCYR5rcVtcBAtyg0CDV1j/mzg96LhXVz Y5eg== X-Gm-Message-State: APjAAAXyz6Lkkjz4+i5xyKYp2OU2DmHbJ5D0wrec5gKminougN/znkEx 7E9nHlR7hmF70DbDOHIXzOyq7Q== X-Google-Smtp-Source: APXvYqwa45HyJC3lNRp5/zE7lrzcpW7gGM4PVnCUaEY3v11W5wPXc/WNYcX42D8uo4bAGlw71Tm2Fg== X-Received: by 2002:a19:c396:: with SMTP id t144mr16546948lff.14.1569226436978; Mon, 23 Sep 2019 01:13:56 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id c21sm2054946lff.61.2019.09.23.01.13.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Sep 2019 01:13:56 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] dt-bindings: pwm: mxs-pwm: Increase #pwm-cells Date: Mon, 23 Sep 2019 10:13:48 +0200 Message-Id: <20190923081348.6843-5-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190923081348.6843-1-linux@rasmusvillemoes.dk> References: <20190923081348.6843-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org We need to increase the pwm-cells for the optional flags parameter, in order to implement support for polarity setting via DT. Signed-off-by: Rasmus Villemoes Acked-by: Rob Herring --- Documentation/devicetree/bindings/pwm/mxs-pwm.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt index 96cdde5f6208..1697dcd3b07c 100644 --- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt @@ -3,7 +3,7 @@ Freescale MXS PWM controller Required properties: - compatible: should be "fsl,imx23-pwm" - reg: physical base address and length of the controller's registers -- #pwm-cells: should be 2. See pwm.txt in this directory for a description of +- #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. - fsl,pwm-number: the number of PWM devices @@ -12,6 +12,6 @@ Example: pwm: pwm@80064000 { compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; - #pwm-cells = <2>; + #pwm-cells = <3>; fsl,pwm-number = <8>; };