From patchwork Fri Sep 20 10:39:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yue Haibing X-Patchwork-Id: 1165138 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=huawei.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46ZVkk5g1Dz9s4Y for ; Fri, 20 Sep 2019 20:46:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408690AbfITKqV (ORCPT ); Fri, 20 Sep 2019 06:46:21 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2698 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732138AbfITKqV (ORCPT ); Fri, 20 Sep 2019 06:46:21 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id EDE72A0D9F2F7E1AE577; Fri, 20 Sep 2019 18:46:18 +0800 (CST) Received: from localhost (10.133.213.239) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.439.0; Fri, 20 Sep 2019 18:46:12 +0800 From: YueHaibing To: , , , , , , , CC: , , Subject: [PATCH v2 -next] PCI: tegra: Add missing include file Date: Fri, 20 Sep 2019 18:39:25 +0800 Message-ID: <20190920103925.34404-1-yuehaibing@huawei.com> X-Mailer: git-send-email 2.10.2.windows.1 In-Reply-To: <20190920014807.38288-1-yuehaibing@huawei.com> References: <20190920014807.38288-1-yuehaibing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.133.213.239] X-CFilter-Loop: Reflected Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Fix build error without CONFIG_PINCTRL drivers/pci/controller/dwc/pcie-tegra194.c: In function tegra_pcie_config_rp: drivers/pci/controller/dwc/pcie-tegra194.c:1394:8: error: implicit declaration of function pinctrl_pm_select_default_state; did you mean prandom_seed_full_state? [-Werror=implicit-function-declaration] ret = pinctrl_pm_select_default_state(dev); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ prandom_seed_full_state Reported-by: Hulk Robot Fixes: ab2a50e7602b ("PCI: tegra: Add support to configure sideband pins") Signed-off-by: YueHaibing Reviewed-by: Vidya Sagar Reviewed-by: Andrew Murray --- v2: keep alphabetical order --- drivers/pci/controller/dwc/pcie-tegra194.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 09ed8e4..f89f5ac 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include