From patchwork Fri Nov 10 14:17:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 836768 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yYMZ94Cccz9sNd for ; Sat, 11 Nov 2017 01:17:53 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 46C7DC21C93; Fri, 10 Nov 2017 14:17:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 57041C21C2F; Fri, 10 Nov 2017 14:17:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 17B3AC21C2F; Fri, 10 Nov 2017 14:17:46 +0000 (UTC) Received: from mailout.pepperl-fuchs.com (mailout.pepperl-fuchs.com [212.21.166.229]) by lists.denx.de (Postfix) with ESMTPS id 666A6C21C2B for ; Fri, 10 Nov 2017 14:17:43 +0000 (UTC) Received: from PFDE-CAS2.EU.P-F.BIZ (pfde-cas2.eu.p-f.biz [172.24.5.134]) by mailout.pepperl-fuchs.com (Postfix) with ESMTP id 2538081845; Fri, 10 Nov 2017 15:17:43 +0100 (CET) Received: from PFDE-MX11.EU.P-F.BIZ ([fe80::d571:1e54:8f01:3111]) by PFDE-CAS2.EU.P-F.BIZ ([fe80::8109:cac5:bde5:6fd3%18]) with mapi id 14.03.0301.000; Fri, 10 Nov 2017 15:17:43 +0100 From: Goldschmidt Simon To: "u-boot@lists.denx.de" Thread-Topic: [PATCH] fpga: allow programming fpga from FIT image for all FPGA drivers Thread-Index: AdNaLqVN86q6PL+QQEqflZBjRs2Ckw== Date: Fri, 10 Nov 2017 14:17:41 +0000 Message-ID: Accept-Language: de-DE, en-US Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.5.147] x-exclaimer-md-config: 1e262833-c6b8-4d86-a546-40bddc43f2e2 MIME-Version: 1.0 Cc: "xypron.glpk@gmx.de" , Michal Simek , Rick Altherr Subject: [U-Boot] [PATCH] fpga: allow programming fpga from FIT image for all FPGA drivers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This drops the limit that fpga is only loaded from FIT images for Xilinx. This is done by moving the 'partial' check from 'common/image.c' to 'drivers/fpga/xilinx.c' (the only driver supporting partial images yet) and supplies a weak default implementation in 'drivers/fpga/fpga.c'. Signed-off-by: Simon Goldschmidt --- common/bootm.c | 2 +- common/image.c | 6 ++---- drivers/fpga/fpga.c | 9 +++++++++ drivers/fpga/xilinx.c | 13 +++++++++++++ include/fpga.h | 1 + 5 files changed, 26 insertions(+), 5 deletions(-) diff --git a/common/bootm.c b/common/bootm.c index 9493a306cd..adb12137c7 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -248,7 +248,7 @@ int bootm_find_images(int flag, int argc, char * const argv[]) #endif #if IMAGE_ENABLE_FIT -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX) +#if defined(CONFIG_FPGA) /* find bitstreams */ ret = boot_get_fpga(argc, argv, &images, IH_ARCH_DEFAULT, NULL, NULL); diff --git a/common/image.c b/common/image.c index 06fdca129c..9fd72b9423 100644 --- a/common/image.c +++ b/common/image.c @@ -1223,7 +1223,7 @@ int boot_get_setup(bootm_headers_t *images, uint8_t arch, } #if IMAGE_ENABLE_FIT -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX) +#if defined(CONFIG_FPGA) int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, uint8_t arch, const ulong *ld_start, ulong * const ld_len) { @@ -1234,8 +1234,6 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, const char *uname, *name; int err; int devnum = 0; /* TODO support multi fpga platforms */ - const fpga_desc * const desc = fpga_get_desc(devnum); - xilinx_desc *desc_xilinx = desc->devdesc; /* Check to see if the images struct has a FIT configuration */ if (!genimg_has_config(images)) { @@ -1280,7 +1278,7 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, return fit_img_result; } - if (img_len >= desc_xilinx->size) { + if (!fpga_is_partial_data(devnum, img_len)) { name = "full"; err = fpga_loadbitstream(devnum, (char *)img_data, img_len, BIT_FULL); diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index e0fb1b4e78..6aead27f16 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -171,6 +171,15 @@ int fpga_add(fpga_type devtype, void *desc) } /* + * Return 1 if the fpga data is partial. + * This is only required for fpga drivers that support bitstream_type. + */ +int __weak fpga_is_partial_data(int devnum, size_t img_len) +{ + return 0; +} + +/* * Convert bitstream data and load into the fpga */ int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size, diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 941f30010a..3c05760969 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -24,6 +24,19 @@ static int xilinx_validate(xilinx_desc *desc, char *fn); /* ------------------------------------------------------------------------- */ +int fpga_is_partial_data(int devnum, size_t img_len) +{ + const fpga_desc * const desc = fpga_get_desc(devnum); + xilinx_desc *desc_xilinx = desc->devdesc; + + /* Check datasize against FPGA size */ + if (img_len >= desc_xilinx->size) + return 0; + + /* datasize is smaller, must be partial data */ + return 1; +} + int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, bitstream_type bstype) { diff --git a/include/fpga.h b/include/fpga.h index d768fb1417..4d6da790b7 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -54,6 +54,7 @@ void fpga_init(void); int fpga_add(fpga_type devtype, void *desc); int fpga_count(void); const fpga_desc *const fpga_get_desc(int devnum); +int fpga_is_partial_data(int devnum, size_t img_len); int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype); int fpga_fsload(int devnum, const void *buf, size_t size,