From patchwork Tue Sep 10 11:50:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1160286 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="BlbforvP"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46SNdD49VCz9sP6 for ; Tue, 10 Sep 2019 21:50:24 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731601AbfIJLuN (ORCPT ); Tue, 10 Sep 2019 07:50:13 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:33200 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727120AbfIJLuN (ORCPT ); Tue, 10 Sep 2019 07:50:13 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoBuR040806; Tue, 10 Sep 2019 06:50:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568116211; bh=EqKT5FCpYXzCmOXY0n2mABkUfFslwNpZ85dM04a5nHc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BlbforvP0LGbgN1TGnofPmcmASn2nZxobkNRBxTrWaJT7EyblYsVD0U8awgUtRLsK kAz0/gSPjmZU9msAqrctAIxBxn2BTdVggkaGjp5D9Rd8InRohByZrJeU7JiD3m9zDi wk+nDPhJSm+0oZeiVDNxR4lu0dD/YmJAj+lOpCvw= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8ABoBvr010377 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 10 Sep 2019 06:50:11 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 10 Sep 2019 06:50:10 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 10 Sep 2019 06:50:09 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABo5cG028909; Tue, 10 Sep 2019 06:50:08 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH 1/3] dt-bindings: dma: Add documentation for DMA domains Date: Tue, 10 Sep 2019 14:50:35 +0300 Message-ID: <20190910115037.23539-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910115037.23539-1-peter.ujfalusi@ti.com> References: <20190910115037.23539-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On systems where multiple DMA controllers available, non Slave (for example memcpy operation) users can not be described in DT as there is no device involved from the DMA controller's point of view, DMA binding is not usable. However in these systems still a peripheral might need to be serviced by or it is better to serviced by specific DMA controller. When a memcpy is used to/from a memory mapped region for example a DMA in the same domain can perform better. For generic software modules doing mem 2 mem operations it also matter that they will get a channel from a controller which is faster in DDR to DDR mode rather then from the first controller happen to be loaded. This property is inherited, so it may be specified in a device node or in any of its parent nodes. Signed-off-by: Peter Ujfalusi --- .../devicetree/bindings/dma/dma-domain.yaml | 88 +++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/dma-domain.yaml diff --git a/Documentation/devicetree/bindings/dma/dma-domain.yaml b/Documentation/devicetree/bindings/dma/dma-domain.yaml new file mode 100644 index 000000000000..da59bb129c58 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/dma-domain.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/dma-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DMA Domain Controller Definition + +maintainers: + - Vinod Koul + +allOf: + - $ref: "dma-controller.yaml#" + +description: + On systems where multiple DMA controllers available, none Slave (for example + memcpy operation) users can not be described in DT as there is no device + involved from the DMA controller's point of view, DMA binding is not usable. + However in these systems still a peripheral might need to be serviced by or + it is better to serviced by specific DMA controller. + When a memcpy is used to/from a memory mapped region for example a DMA in the + same domain can perform better. + For generic software modules doing mem 2 mem operations it also matter that + they will get a channel from a controller which is faster in DDR to DDR mode + rather then from the first controller happen to be loaded. + + This property is inherited, so it may be specified in a device node or in any + of its parent nodes. + +properties: + $dma-domain-controller: + $ref: /schemas/types.yaml#definitions/phandle + description: + phande to the DMA controller node which should be used for the device or + domain. + +examples: + - | + / { + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654"; + interrupt-parent = <&gic500>; + /* For modules without device, DDR to DDR is faster on main UDMAP */ + dma-domain-controller = <&main_udmap>; + #address-cells = <2>; + #size-cells = <2>; + ... + }; + + &cbass_main { + /* For modules within MAIN domain, use main UDMAP */ + dma-domain-controller = <&main_udmap>; + + cbass_main_navss: interconnect0 { + ... + main_udmap: dma-controller@31150000 { + compatible = "ti,am654-navss-main-udmap"; + ... + }; + }; + }; + + &cbass_mcu { + /* For modules within MCU domain, use mcu UDMAP */ + dma-domain-controller = <&mcu_udmap>; + + cbass_mcu_navss: interconnect1 { + ... + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + ... + }; + }; + + fss: fss@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + ... + /* memcpy channel will be request from mcu_udmap */ + }; + }; + }; +... From patchwork Tue Sep 10 11:50:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1160285 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="I+pCMCrA"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46SNdC1t0rz9s4Y for ; Tue, 10 Sep 2019 21:50:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731700AbfIJLuP (ORCPT ); Tue, 10 Sep 2019 07:50:15 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:33210 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727120AbfIJLuP (ORCPT ); Tue, 10 Sep 2019 07:50:15 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoCSe040815; Tue, 10 Sep 2019 06:50:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568116212; bh=zvSBZ3H3T5stp36yhMsjbO3YbMTzllNSS6fxmYUaT5w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=I+pCMCrA57ed763fTCgJf5Cc3rOK5XqEGnQKKcISMjY1Xb+KbOIZ7oYERvoWkcUbZ BKQYuKwF0mvq20mxbYYZdvLHI0vugMHQZcro5jcXqOR+KLrDjc0XsFTwi864bQldkK PW5QyVFgNYbSGQEUH+P0GbKHAByCrztBIHqXmeZg= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8ABoCbM093258 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 10 Sep 2019 06:50:12 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 10 Sep 2019 06:50:12 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 10 Sep 2019 06:50:12 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABo5cH028909; Tue, 10 Sep 2019 06:50:10 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH 2/3] dmaengine: of_dma: Function to look up the DMA domain of a client Date: Tue, 10 Sep 2019 14:50:36 +0300 Message-ID: <20190910115037.23539-3-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910115037.23539-1-peter.ujfalusi@ti.com> References: <20190910115037.23539-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Find the DMA domain controller of the client device by iterating up in device tree looking for the closest 'dma-domain-controller' property. If the client's node is not provided then check the DT root for the controller. Signed-off-by: Peter Ujfalusi --- drivers/dma/of-dma.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/of_dma.h | 7 +++++++ 2 files changed, 49 insertions(+) diff --git a/drivers/dma/of-dma.c b/drivers/dma/of-dma.c index c2d779daa4b5..b4bff47006b0 100644 --- a/drivers/dma/of-dma.c +++ b/drivers/dma/of-dma.c @@ -18,6 +18,48 @@ static LIST_HEAD(of_dma_list); static DEFINE_MUTEX(of_dma_lock); +/** + * of_find_dma_domain - Get the domain DMA controller + * @np: device node of the client device + * + * Look up the DMA controller of the domain the client device is part of. + * Finds the dma-domain controller the client device belongs to. It is used when + * requesting non slave channels (like channel for memcpy) to make sure that the + * channel can be request from a DMA controller which can service the given + * domain best. + * + * Returns the device_node pointer of the DMA controller or succes or NULL on + * error. + */ +struct device_node *of_find_dma_domain(struct device_node *np) +{ + struct device_node *dma_domain = NULL; + phandle dma_phandle; + + /* + * If no device_node is provided look at the root level for system + * default DMA controller for modules. + */ + if (!np) + np = of_root; + + if (!np || !of_node_get(np)) + return NULL; + + do { + if (of_property_read_u32(np, "dma-domain-controller", + &dma_phandle)) { + np = of_get_next_parent(np); + } else { + dma_domain = of_find_node_by_phandle(dma_phandle); + of_node_put(np); + } + } while (!dma_domain && np); + + return dma_domain; +} +EXPORT_SYMBOL_GPL(of_find_dma_domain); + /** * of_dma_find_controller - Get a DMA controller in DT DMA helpers list * @dma_spec: pointer to DMA specifier as found in the device tree diff --git a/include/linux/of_dma.h b/include/linux/of_dma.h index fd706cdf255c..6eab0a8d3335 100644 --- a/include/linux/of_dma.h +++ b/include/linux/of_dma.h @@ -32,6 +32,8 @@ struct of_dma_filter_info { }; #ifdef CONFIG_DMA_OF +extern struct device_node *of_find_dma_domain(struct device_node *np); + extern int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *), @@ -52,6 +54,11 @@ extern struct dma_chan *of_dma_xlate_by_chan_id(struct of_phandle_args *dma_spec struct of_dma *ofdma); #else +static inline struct device_node *of_find_dma_domain(struct device_node *np) +{ + return NULL; +} + static inline int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *),