From patchwork Mon Sep 9 10:47:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ramuthevar, Vadivel MuruganX" X-Patchwork-Id: 1159666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="SbWHOaAZ"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46RlJb2BrXz9s4Y for ; Mon, 9 Sep 2019 20:48:47 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=vJP6D8mumMj6f43uMZX+G6jENlzcCD6OrtHeyes8UOs=; b=SbWHOaAZEGqDhjNYerxxS0UTrD o5XrJAijsmtzamXEFOXD1wTfZ+EDzqjOw10DUdJqkJ+cdqUbKMVIat/zKK9ZezP9JuVo8wOsmPj0T 5lZ+DK/gAnoo+KA32JgzErFZjjx0JbTUS4m6h0wDXi8q1DJ49Rq6TAhXjWyqkP3AT+OKYIX2cuAOT 2bPVv5hDEz0qsV54sdtgC92Aes9pKWZZU5qw6T3nIr7t6Nd6mTU9ttWg6IP+08IlOOzxpQ1KofAeO WFUlQiCykUBjs+nFlJE5hOuq1YlD05upAW6VloXbuLggiiqNi1xqlqqQsIeG2dSfHU18PeuJjzmfS WAN0AnjQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i7HDE-0006PQ-NG; Mon, 09 Sep 2019 10:48:01 +0000 Received: from mga04.intel.com ([192.55.52.120]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i7HCz-0006E4-5m for linux-mtd@lists.infradead.org; Mon, 09 Sep 2019 10:47:46 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Sep 2019 03:47:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,484,1559545200"; d="scan'208";a="208926601" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga004.fm.intel.com with ESMTP; 09 Sep 2019 03:47:41 -0700 From: "Ramuthevar, Vadivel MuruganX" To: linux-mtd@lists.infradead.org Subject: [PATCH v3 1/3] dt-bindings: mtd: cadence-qspi:add support for Intel lgm-qspi Date: Mon, 9 Sep 2019 18:47:31 +0800 Message-Id: <20190909104733.14273-2-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> References: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190909_034745_293204_489575B9 X-CRM114-Status: GOOD ( 10.92 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [192.55.52.120 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, tudor.ambarus@gmail.com, vigneshr@ti.com, boris.brezillon@free-electrons.com, richard@nod.at, qi-ming.wu@intel.com, linux-kernel@vger.kernel.org, david.oberhollenzer@sigma-star.at, Ramuthevar Vadivel Murugan , miquel.raynal@bootlin.com, jwboyer@gmail.com, computersforpeace@gmail.com, dwmw2@infradead.org, cyrille.pitchen@atmel.com, andriy.shevchenko@intel.com MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Ramuthevar Vadivel Murugan Add new vendor specific compatible string to check Intel's Lightning Mountain(LGM) QSPI features enablement in cadence-quadspi driver. Signed-off-by: Ramuthevar Vadivel Murugan Acked-by: Rob Herring --- Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index 945be7d5b236..8ace832a2d80 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -5,6 +5,7 @@ Required properties: Generic default - "cdns,qspi-nor". For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor". For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor". + For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor". - reg : Contains two entries, each of which is a tuple consisting of a physical address and length. The first entry is the address and length of the controller register set. The second entry is the From patchwork Mon Sep 9 10:47:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ramuthevar, Vadivel MuruganX" X-Patchwork-Id: 1159668 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hoTByQhR"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46RlJh4pJFz9s4Y for ; Mon, 9 Sep 2019 20:48:52 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=sGn31wKo+OwykXW6fIEBmh8vWVegwPh0Hmqd3SRuhCk=; b=hoTByQhRoRXtxvX6c9wgs4LK/9 gPKnPh3qV7vP9rPZxBKXRT0m3ThQ9GLS5B3FswGxmZJBcXm5jHoq0GDvN3GHjE27lDU9u2a7w1J/s 1fLJ4n26LXbk/6sqJqLNcayuBZjhCbjJwh6FOt6ETkhkxgxPpBEiRF0pkWqrJ53gdTi0fmKtq6b4N HYA+51pjrX/llNoPOKm7idZg9SeDDCDn4CiJe8JQRZ1waBqARpDtPT4bNB+0L/8P9Ifg0FCiIcY5X LG4/m5eJ6VVOIpEgC5fhNEyoxjnVhtL0J4fFmIpevv8foEKCKcJM+Nvc6vsrSMPsjZgRC1cIExFQe c7Y7A7OA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i7HDQ-0006VD-H4; Mon, 09 Sep 2019 10:48:12 +0000 Received: from mga17.intel.com ([192.55.52.151]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i7HD3-0006GO-DK for linux-mtd@lists.infradead.org; Mon, 09 Sep 2019 10:47:51 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Sep 2019 03:47:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,484,1559545200"; d="scan'208";a="185158774" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga007.fm.intel.com with ESMTP; 09 Sep 2019 03:47:44 -0700 From: "Ramuthevar, Vadivel MuruganX" To: linux-mtd@lists.infradead.org Subject: [PATCH v3 2/3] mtd: spi-nor: cadence-quadspi: Disable the DAC for Intel LGM SoC Date: Mon, 9 Sep 2019 18:47:32 +0800 Message-Id: <20190909104733.14273-3-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> References: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190909_034749_816999_63CE51F9 X-CRM114-Status: GOOD ( 14.39 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [192.55.52.151 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, tudor.ambarus@gmail.com, vigneshr@ti.com, boris.brezillon@free-electrons.com, richard@nod.at, qi-ming.wu@intel.com, linux-kernel@vger.kernel.org, david.oberhollenzer@sigma-star.at, Ramuthevar Vadivel Murugan , miquel.raynal@bootlin.com, jwboyer@gmail.com, computersforpeace@gmail.com, dwmw2@infradead.org, cyrille.pitchen@atmel.com, andriy.shevchenko@intel.com MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Ramuthevar Vadivel Murugan on Intel's Lightning Mountain(LGM) SoCs QSPI controller do not use Direct Access Controller(DAC). This patch introduces to properly disable the Direct Access Controller for data transfer instead it uses indirect data transfer. Signed-off-by: Ramuthevar Vadivel Murugan --- drivers/mtd/spi-nor/Kconfig | 2 +- drivers/mtd/spi-nor/cadence-quadspi.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 6de83277ce8b..ba2e372ae514 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -34,7 +34,7 @@ config SPI_ASPEED_SMC config SPI_CADENCE_QUADSPI tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || COMPILE_TEST) + depends on OF && (ARM || ARM64 || COMPILE_TEST || X86) help Enable support for the Cadence Quad SPI Flash controller. diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index 67f15a1f16fd..73b9fbd1508a 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -33,6 +33,7 @@ /* Quirks */ #define CQSPI_NEEDS_WR_DELAY BIT(0) +#define CQSPI_DISABLE_DAC_MODE BIT(1) /* Capabilities mask */ #define CQSPI_BASE_HWCAPS_MASK \ @@ -609,6 +610,13 @@ static int cqspi_write_setup(struct spi_nor *nor) struct cqspi_st *cqspi = f_pdata->cqspi; void __iomem *reg_base = cqspi->iobase; + /* Disable direct access controller */ + if (!f_pdata->use_direct_mode) { + reg = readl(reg_base + CQSPI_REG_CONFIG); + reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL; + writel(reg, reg_base + CQSPI_REG_CONFIG); + } + /* Set opcode. */ reg = nor->program_opcode << CQSPI_REG_WR_INSTR_OPCODE_LSB; writel(reg, reg_base + CQSPI_REG_WR_INSTR); @@ -1328,6 +1336,7 @@ static int cqspi_probe(struct platform_device *pdev) struct resource *res_ahb; struct reset_control *rstc, *rstc_ocp; const struct cqspi_driver_platdata *ddata; + struct cqspi_flash_pdata *f_pdata; int ret; int irq; @@ -1436,6 +1445,9 @@ static int cqspi_probe(struct platform_device *pdev) goto probe_setup_failed; } + if (ddata && (ddata->quirks & CQSPI_DISABLE_DAC_MODE)) + f_pdata->use_direct_mode = false; + return ret; probe_setup_failed: cqspi_controller_enable(cqspi, 0); @@ -1510,6 +1522,11 @@ static const struct cqspi_driver_platdata am654_ospi = { .quirks = CQSPI_NEEDS_WR_DELAY, }; +static const struct cqspi_driver_platdata intel_lgm_qspi = { + .hwcaps_mask = CQSPI_BASE_HWCAPS_MASK, + .quirks = CQSPI_DISABLE_DAC_MODE, +}; + static const struct of_device_id cqspi_dt_ids[] = { { .compatible = "cdns,qspi-nor", @@ -1523,6 +1540,10 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "ti,am654-ospi", .data = &am654_ospi, }, + { + .compatible = "intel,lgm-qspi", + .data = &intel_lgm_qspi, + }, { /* end of table */ } }; From patchwork Mon Sep 9 10:47:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ramuthevar, Vadivel MuruganX" X-Patchwork-Id: 1159667 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: ozlabs.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i7HDb-0006XZ-Tw; Mon, 09 Sep 2019 10:48:24 +0000 Received: from mga07.intel.com ([134.134.136.100]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i7HDB-0006Lo-Cx for linux-mtd@lists.infradead.org; Mon, 09 Sep 2019 10:47:58 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Sep 2019 03:47:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,484,1559545200"; d="scan'208";a="183782889" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga008.fm.intel.com with ESMTP; 09 Sep 2019 03:47:49 -0700 From: "Ramuthevar, Vadivel MuruganX" To: linux-mtd@lists.infradead.org Subject: [PATCH v3 3/3] mtd: spi-nor: cadence-quadspi: disable the auto-poll for Intel LGM Date: Mon, 9 Sep 2019 18:47:33 +0800 Message-Id: <20190909104733.14273-4-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> References: <20190909104733.14273-1-vadivel.muruganx.ramuthevar@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190909_034757_603616_D09026AE X-CRM114-Status: GOOD ( 11.89 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [134.134.136.100 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, tudor.ambarus@gmail.com, vigneshr@ti.com, boris.brezillon@free-electrons.com, richard@nod.at, qi-ming.wu@intel.com, linux-kernel@vger.kernel.org, david.oberhollenzer@sigma-star.at, Ramuthevar Vadivel Murugan , miquel.raynal@bootlin.com, jwboyer@gmail.com, computersforpeace@gmail.com, dwmw2@infradead.org, cyrille.pitchen@atmel.com, andriy.shevchenko@intel.com MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Ramuthevar Vadivel Murugan On Intel's Lightning Mountain(LGM) SoC QSPI controller do not auto-poll. This patch introduces to properly disable the auto-polling feature to improve the performance of cadence-quadspi. Signed-off-by: Ramuthevar Vadivel Murugan --- drivers/mtd/spi-nor/cadence-quadspi.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index 73b9fbd1508a..60998eaad1cc 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -135,6 +135,8 @@ struct cqspi_driver_platdata { #define CQSPI_REG_RD_INSTR_TYPE_DATA_MASK 0x3 #define CQSPI_REG_RD_INSTR_DUMMY_MASK 0x1F +#define CQSPI_REG_WR_COMPLETION_CTRL 0x38 +#define CQSPI_REG_WR_COMPLETION_DISABLE_AUTO_POLL BIT(14) #define CQSPI_REG_WR_INSTR 0x08 #define CQSPI_REG_WR_INSTR_OPCODE_LSB 0 #define CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB 12 @@ -471,6 +473,18 @@ static int cqspi_command_write_addr(struct spi_nor *nor, return cqspi_exec_flash_cmd(cqspi, reg); } +static int cqspi_disable_auto_poll(struct cqspi_st *cqspi) +{ + void __iomem *reg_base = cqspi->iobase; + unsigned int reg; + + reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL); + reg |= CQSPI_REG_WR_COMPLETION_DISABLE_AUTO_POLL; + writel(reg, reg_base + CQSPI_REG_WR_COMPLETION_CTRL); + + return 0; +} + static int cqspi_read_setup(struct spi_nor *nor) { struct cqspi_flash_pdata *f_pdata = nor->priv; @@ -508,6 +522,11 @@ static int cqspi_read_setup(struct spi_nor *nor) reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; reg |= (nor->addr_width - 1); writel(reg, reg_base + CQSPI_REG_SIZE); + + /* Disable auto-polling */ + if (!f_pdata->use_direct_mode) + cqspi_disable_auto_poll(cqspi); + return 0; } @@ -627,6 +646,11 @@ static int cqspi_write_setup(struct spi_nor *nor) reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; reg |= (nor->addr_width - 1); writel(reg, reg_base + CQSPI_REG_SIZE); + + /* Disable auto-polling */ + if (!f_pdata->use_direct_mode) + cqspi_disable_auto_poll(cqspi); + return 0; }