From patchwork Thu Sep 5 14:41:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oskar Senft X-Patchwork-Id: 1158489 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46PNyH2xrjz9sDQ for ; Fri, 6 Sep 2019 00:54:47 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="nToKRiBC"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46PNyH08y6zDqsh for ; Fri, 6 Sep 2019 00:54:47 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=flex--osk.bounces.google.com (client-ip=2607:f8b0:4864:20::e4a; helo=mail-vs1-xe4a.google.com; envelope-from=3pb5xxqmkb5cfjb7ff7c5.3fdfg5e2d3c9jkj.fqc12j.fi7@flex--osk.bounces.google.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="nToKRiBC"; dkim-atps=neutral Received: from mail-vs1-xe4a.google.com (mail-vs1-xe4a.google.com [IPv6:2607:f8b0:4864:20::e4a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46PNrj4r6XzDr2j for ; Fri, 6 Sep 2019 00:49:57 +1000 (AEST) Received: by mail-vs1-xe4a.google.com with SMTP id t7so336210vsj.20 for ; Thu, 05 Sep 2019 07:49:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:message-id:mime-version:subject:from:to:cc; bh=LFWsK2QZ8bVXSHheMKtLsdY0S0oitbaw2viAl6b9YRQ=; b=nToKRiBCwB6R+Wv2qaPXm7X9v1PLvu8s3PL/XUsIGgq6IDiAmrB0JDTPMaBhi9lmkA 2PRGQPF6JcBtbEWUC4B2kvXeGUFnzpsMEB1QoAdqIJGHqL1DX0xZThcZr2nqM0zafeCB mGasaJtCwA1BB6n6iodDP/y/5me8ncb8w+QP0EA5hFg41AgEHF1qq5IcZXyq6RHv9mg2 KGPOZW5VAa0EsSfSKgh8XepycO2GKD/U7DoPLJNm3GN1P9/Z2GJmVm9rNYrF3B7Ocxlw /JrakuhfbQXfb9N20paa1tiJ7p2oZ56kjiYS1ecJ0GHE+D+9J4OTgQ2Ep69UMYpvNyAQ WNVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=LFWsK2QZ8bVXSHheMKtLsdY0S0oitbaw2viAl6b9YRQ=; b=VtN65I5skCTIsS9LTCR//b/mH5iReXDo+YDVRmEA/fk7BL95iPdYoenoBHzO5V44yi OwG37q5vo7CofugOnhv7tgRN2/cbIA38v0EoRUcpNKbmUYb+6VOFq5XaUpzphLbzYYOv Xpfm3YBAOVGkdIuBKmH00tI/vgTxkoSN/JNoFw/p+h3cE6lZuMBZwuHhFarELNtjn2g7 TdJXwu5lEPQx6UHkejmuCQXz2eq59QM+7V9zvdhcllcKHD1+eAl2B1Fg2+L4os84DsWi ukiUpok7LcZd6lqbe45GFRiYrpstgAJsGbecgDNApXzcRiQP/ZzK8ryZzJEe/qwrRclQ sYzA== X-Gm-Message-State: APjAAAVpJe3/u1/MWRH90vZ8nioH7kjaTmN2Z+Xwf9YXkiMC644DOxUb XLPghq5MOPCcAwIRYI+Uci8Wflc= X-Google-Smtp-Source: APXvYqxeIMwEoSy2MaWbECwQxT+FzZFA/C0q7vBr3W8SzYyTQvFCaPXQyOq5yue5Qew81uUEEcJFFso= X-Received: by 2002:a1f:410f:: with SMTP id o15mr1715102vka.82.1567694500426; Thu, 05 Sep 2019 07:41:40 -0700 (PDT) Date: Thu, 5 Sep 2019 10:41:28 -0400 Message-Id: <20190905144130.220713-1-osk@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.23.0.187.g17f5b7556c-goog Subject: [PATCH v3 1/3] drivers/tty/serial/8250: Make Aspeed VUART SIRQ polarity configurable From: Oskar Senft To: joel@jms.id.au, andrew@aj.id.au, robh+dt@kernel.org, gregkh@linuxfoundation.org, jk@ozlabs.org X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openbmc@lists.ozlabs.org, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Oskar Senft Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Make the SIRQ polarity for Aspeed AST24xx/25xx VUART configurable via sysfs. This setting need to be changed on specific host platforms depending on the selected host interface (LPC / eSPI). The setting is configurable via sysfs rather than device-tree to stay in line with other related configurable settings. On AST2500 the VUART SIRQ polarity can be auto-configured by reading a bit from a configuration register, e.g. the LPC/eSPI interface configuration bit. Tested: Verified on TYAN S7106 mainboard. Signed-off-by: Oskar Senft --- .../ABI/stable/sysfs-driver-aspeed-vuart | 11 ++- drivers/tty/serial/8250/8250_aspeed_vuart.c | 84 +++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 1 + 3 files changed, 95 insertions(+), 1 deletion(-) diff --git a/Documentation/ABI/stable/sysfs-driver-aspeed-vuart b/Documentation/ABI/stable/sysfs-driver-aspeed-vuart index 8062953ce77b..950cafc9443a 100644 --- a/Documentation/ABI/stable/sysfs-driver-aspeed-vuart +++ b/Documentation/ABI/stable/sysfs-driver-aspeed-vuart @@ -6,10 +6,19 @@ Description: Configures which IO port the host side of the UART Users: OpenBMC. Proposed changes should be mailed to openbmc@lists.ozlabs.org -What: /sys/bus/platform/drivers/aspeed-vuart*/sirq +What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq Date: April 2017 Contact: Jeremy Kerr Description: Configures which interrupt number the host side of the UART will appear on the host <-> BMC LPC bus. Users: OpenBMC. Proposed changes should be mailed to openbmc@lists.ozlabs.org + +What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity +Date: July 2019 +Contact: Oskar Senft +Description: Configures the polarity of the serial interrupt to the + host via the BMC LPC bus. + Set to 0 for active-low or 1 for active-high. +Users: OpenBMC. Proposed changes should be mailed to + openbmc@lists.ozlabs.org diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/serial/8250/8250_aspeed_vuart.c index 0438d9a905ce..6e67fd89445a 100644 --- a/drivers/tty/serial/8250/8250_aspeed_vuart.c +++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include #include @@ -22,6 +24,7 @@ #define ASPEED_VUART_GCRA 0x20 #define ASPEED_VUART_GCRA_VUART_EN BIT(0) +#define ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY BIT(1) #define ASPEED_VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5) #define ASPEED_VUART_GCRB 0x24 #define ASPEED_VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4) @@ -131,8 +134,53 @@ static ssize_t sirq_store(struct device *dev, struct device_attribute *attr, static DEVICE_ATTR_RW(sirq); +static ssize_t sirq_polarity_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct aspeed_vuart *vuart = dev_get_drvdata(dev); + u8 reg; + + reg = readb(vuart->regs + ASPEED_VUART_GCRA); + reg &= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; + + return snprintf(buf, PAGE_SIZE - 1, "%u\n", reg ? 1 : 0); +} + +static void aspeed_vuart_set_sirq_polarity(struct aspeed_vuart *vuart, + bool polarity) +{ + u8 reg = readb(vuart->regs + ASPEED_VUART_GCRA); + + if (polarity) + reg |= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; + else + reg &= ~ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; + + writeb(reg, vuart->regs + ASPEED_VUART_GCRA); +} + +static ssize_t sirq_polarity_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct aspeed_vuart *vuart = dev_get_drvdata(dev); + unsigned long val; + int err; + + err = kstrtoul(buf, 0, &val); + if (err) + return err; + + aspeed_vuart_set_sirq_polarity(vuart, val != 0); + + return count; +} + +static DEVICE_ATTR_RW(sirq_polarity); + static struct attribute *aspeed_vuart_attrs[] = { &dev_attr_sirq.attr, + &dev_attr_sirq_polarity.attr, &dev_attr_lpc_address.attr, NULL, }; @@ -302,8 +350,30 @@ static int aspeed_vuart_handle_irq(struct uart_port *port) return 1; } +static void aspeed_vuart_auto_configure_sirq_polarity( + struct aspeed_vuart *vuart, struct device_node *syscon_np, + u32 reg_offset, u32 reg_mask) +{ + struct regmap *regmap; + u32 value; + + regmap = syscon_node_to_regmap(syscon_np); + if (IS_ERR(regmap)) { + dev_warn(vuart->dev, + "could not get regmap for aspeed,sirq-polarity-sense\n"); + return; + } + if (regmap_read(regmap, reg_offset, &value)) { + dev_warn(vuart->dev, "could not read hw strap table\n"); + return; + } + + aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0); +} + static int aspeed_vuart_probe(struct platform_device *pdev) { + struct of_phandle_args sirq_polarity_sense_args; struct uart_8250_port port; struct aspeed_vuart *vuart; struct device_node *np; @@ -402,6 +472,20 @@ static int aspeed_vuart_probe(struct platform_device *pdev) vuart->line = rc; + rc = of_parse_phandle_with_fixed_args( + np, "aspeed,sirq-polarity-sense", 2, 0, + &sirq_polarity_sense_args); + if (rc < 0) { + dev_dbg(&pdev->dev, + "aspeed,sirq-polarity-sense property not found\n"); + } else { + aspeed_vuart_auto_configure_sirq_polarity( + vuart, sirq_polarity_sense_args.np, + sirq_polarity_sense_args.args[0], + BIT(sirq_polarity_sense_args.args[1])); + of_node_put(sirq_polarity_sense_args.np); + } + aspeed_vuart_set_enabled(vuart, true); aspeed_vuart_set_host_tx_discard(vuart, true); platform_set_drvdata(pdev, vuart); diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig index 509f6a3bb9ff..98e25781a293 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig @@ -243,6 +243,7 @@ config SERIAL_8250_ASPEED_VUART tristate "Aspeed Virtual UART" depends on SERIAL_8250 depends on OF + depends on REGMAP && MFD_SYSCON help If you want to use the virtual UART (VUART) device on Aspeed BMC platforms, enable this option. This enables the 16550A- From patchwork Thu Sep 5 14:41:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oskar Senft X-Patchwork-Id: 1158482 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46PNsD2D62z9s3Z for ; Fri, 6 Sep 2019 00:50:24 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="BtnXfkFF"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46PNsC6Mh5zDq8F for ; Fri, 6 Sep 2019 00:50:23 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=flex--osk.bounces.google.com (client-ip=2607:f8b0:4864:20::84a; helo=mail-qt1-x84a.google.com; envelope-from=3pr5xxqmkb5ggkc8gg8d6.4gegh6f3e4daklk.grd23k.gj8@flex--osk.bounces.google.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="BtnXfkFF"; dkim-atps=neutral Received: from mail-qt1-x84a.google.com (mail-qt1-x84a.google.com [IPv6:2607:f8b0:4864:20::84a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46PNqN3plXzDqT4 for ; Fri, 6 Sep 2019 00:48:46 +1000 (AEST) Received: by mail-qt1-x84a.google.com with SMTP id k13so2751069qtp.15 for ; Thu, 05 Sep 2019 07:48:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=RaOdMEdHWabRyA48tWifREdKC/PQMtkOlsK8xXnOLlg=; b=BtnXfkFFib9LY2N7CLMrbVvS73v4Eq6wm+VbGidSpNhFCD42EtMTDvVL8+G02UX2lJ 6hfjWa8pXNEsKJfxRxDoiJ6Js2le/D2knnMzOom9h3YZXu6WCmWpYxSPqhxIf8XvjDqK 4mY6MhLeCLz8/uWepBTNX4NevsjTbdtjpmk3VvfemuGiEPKEMVJGs1z5NKuM2TNKIIoy rU9+aiGOOrDooEWyk2m/Kjd8XrbaMEzSWl/SESdIm9GPtZki1ifsqtx7xqM3Ww2w7UL0 9GgqgjK2Efr4Fibow4GjVnEev3fd78/76t9xWzithNMZm/vJerJGWBfYf/js6NCc21jt WkqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=RaOdMEdHWabRyA48tWifREdKC/PQMtkOlsK8xXnOLlg=; b=cxgddhQdND3Wz/dNqiDNJjV/XauGEUa6Hvg30+fwGKL5fOciYF7eR1w14u5S6TA+G1 btkhxV+RrV7DEtrTdywHO5uL34Z9brnwtxf+ej/lsrH+1ehUpMd62/cbOD/+Qvkhslns AqM834nqFPeayvZMh/L9zZNdBl+cmhnhAbw5w+ZP6/LmU6XMYO2lSZxeZOTeOFOXdVZ3 Qybd3ThDqUhcM8hvNdyNJQmJ8jENq1d8crS7IDpX5AAbBbt5q1aSS9NWaiDx02EqKBLt uQzB1vSwoqR8EiWMrOFt6cjCNNasaHx/eJtVH2+UcVLDLkBvz4VvzbZsST6ET6kFZZZW tWCA== X-Gm-Message-State: APjAAAVTpkKn6zeDVWfX2xh/TlGEsjXuKjsiULljxLFyvyqsr4JcCimY s8OftzPnMAh8OgcoD82vwU/obU8= X-Google-Smtp-Source: APXvYqzkDOBp79PXpEAipYZadtwGS7ZnIH63SZDea9FHuBgDn4feswfOL5kDKxXMwh4xwbR5YKHd0wE= X-Received: by 2002:a37:9d3:: with SMTP id 202mr3162654qkj.391.1567694501708; Thu, 05 Sep 2019 07:41:41 -0700 (PDT) Date: Thu, 5 Sep 2019 10:41:29 -0400 In-Reply-To: <20190905144130.220713-1-osk@google.com> Message-Id: <20190905144130.220713-2-osk@google.com> Mime-Version: 1.0 References: <20190905144130.220713-1-osk@google.com> X-Mailer: git-send-email 2.23.0.187.g17f5b7556c-goog Subject: [PATCH v3 2/3] dt-bindings: serial: 8250: Add aspeed, sirq-polarity-sense. From: Oskar Senft To: joel@jms.id.au, andrew@aj.id.au, robh+dt@kernel.org, gregkh@linuxfoundation.org, jk@ozlabs.org X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openbmc@lists.ozlabs.org, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Oskar Senft Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add documentation for 8250_aspeed_vuart's aspeed,sirq-polarity-sense property that enables to auto-configure the VUART's SIRQ polarity. Signed-off-by: Oskar Senft Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/8250.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt index 20d351f268ef..55700f20f6ee 100644 --- a/Documentation/devicetree/bindings/serial/8250.txt +++ b/Documentation/devicetree/bindings/serial/8250.txt @@ -56,6 +56,11 @@ Optional properties: - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively. It will use specified GPIO instead of the peripheral function pin for the UART feature. If unsure, don't specify this property. +- aspeed,sirq-polarity-sense: Only applicable to aspeed,ast2500-vuart. + phandle to aspeed,ast2500-scu compatible syscon alongside register offset + and bit number to identify how the SIRQ polarity should be configured. + One possible data source is the LPC/eSPI mode bit. + Example: aspeed,sirq-polarity-sense = <&syscon 0x70 25> Note: * fsl,ns16550: From patchwork Thu Sep 5 14:41:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oskar Senft X-Patchwork-Id: 1158484 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46PNv76sztz9s3Z for ; Fri, 6 Sep 2019 00:52:03 +1000 (AEST) Authentication-Results: ozlabs.org; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=DBIgduCaugj8tqfaD9C0q1cOrYEMjHp+EVVP9xE+eQU=; b=UY6J9FQDLV/l/xVAQtFyS4nlR0fgh/0H3CwZEWHWS5FdbPGvlUUfMEkbQT2MKagi1W 3cmfXykjFSNGqGFqORUCP3NuAUtL+tXVxPrf1hmId6vqiN/DI65k9DX50W6DyUt2ChDh 19dK+u38eh0qLpErbUQBAd+buZJFfOLNFM9DjKKDdLV0Xv74m+DMpJDI4L2T4LaA+1Rp 8u5RathjWLXq3J7XKfvHVQ3Z7ji4sSYpcYvjv3LA2c495tQ1SmFlcA8fYtZjjJeC8QLG 08xzYjxJi4BZ6nZYUwK3aCO9xrZ3pyHcU35x/a1JVktfUyt8LNcT6RH/g04JHG3FiO6E 9jaw== X-Gm-Message-State: APjAAAUtWpsvNMWP3/WT/0wt3rWKB1mATL6tsKOoYekg62ZZa1fPJOl9 jmL4B+IoaA+hkYB0Qd/MhQ9eLjU= X-Google-Smtp-Source: APXvYqyNSVOy6oyG9DD0QBvBuTaufZmFloO9JVWmWZHMU1JZn5mMUAwUE7z3OJooXuAyecAHfFp7wjQ= X-Received: by 2002:ac8:130d:: with SMTP id e13mr2670110qtj.287.1567694502968; Thu, 05 Sep 2019 07:41:42 -0700 (PDT) Date: Thu, 5 Sep 2019 10:41:30 -0400 In-Reply-To: <20190905144130.220713-1-osk@google.com> Message-Id: <20190905144130.220713-3-osk@google.com> Mime-Version: 1.0 References: <20190905144130.220713-1-osk@google.com> X-Mailer: git-send-email 2.23.0.187.g17f5b7556c-goog Subject: [PATCH v3 3/3] arm: dts: aspeed: Add vuart aspeed, sirq-polarity-sense to aspeed-g5.dtsi From: Oskar Senft To: joel@jms.id.au, andrew@aj.id.au, robh+dt@kernel.org, gregkh@linuxfoundation.org, jk@ozlabs.org X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openbmc@lists.ozlabs.org, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Oskar Senft Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Enable auto-configuration of VUART SIRQ polarity on AST2500. Signed-off-by: Oskar Senft --- arch/arm/boot/dts/aspeed-g5.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 5b1ca265c2ce..06e489c1d0cb 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -351,6 +351,7 @@ interrupts = <8>; clocks = <&syscon ASPEED_CLK_APB>; no-loopback-test; + aspeed,sirq-polarity-sense = <&syscon 0x70 25>; status = "disabled"; };