From patchwork Thu Sep 5 14:41:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oskar Senft X-Patchwork-Id: 1158475 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="BtnXfkFF"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46PNgD05cSz9s3Z for ; Fri, 6 Sep 2019 00:41:44 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730671AbfIEOln (ORCPT ); Thu, 5 Sep 2019 10:41:43 -0400 Received: from mail-qk1-f202.google.com ([209.85.222.202]:39512 "EHLO mail-qk1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730867AbfIEOln (ORCPT ); Thu, 5 Sep 2019 10:41:43 -0400 Received: by mail-qk1-f202.google.com with SMTP id p6so2648570qkk.6 for ; Thu, 05 Sep 2019 07:41:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=RaOdMEdHWabRyA48tWifREdKC/PQMtkOlsK8xXnOLlg=; b=BtnXfkFFib9LY2N7CLMrbVvS73v4Eq6wm+VbGidSpNhFCD42EtMTDvVL8+G02UX2lJ 6hfjWa8pXNEsKJfxRxDoiJ6Js2le/D2knnMzOom9h3YZXu6WCmWpYxSPqhxIf8XvjDqK 4mY6MhLeCLz8/uWepBTNX4NevsjTbdtjpmk3VvfemuGiEPKEMVJGs1z5NKuM2TNKIIoy rU9+aiGOOrDooEWyk2m/Kjd8XrbaMEzSWl/SESdIm9GPtZki1ifsqtx7xqM3Ww2w7UL0 9GgqgjK2Efr4Fibow4GjVnEev3fd78/76t9xWzithNMZm/vJerJGWBfYf/js6NCc21jt WkqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=RaOdMEdHWabRyA48tWifREdKC/PQMtkOlsK8xXnOLlg=; b=R3K86mTd7hycWPdb56oWeI3T3gKBFdZ85aaEajDJ5KANV7pFcIxvwFff9bfQk//1Km n1Xyz+d0qYGgz4y37L5uZAiyNF4h/MgHwa8Hp1ogFYsN0LPlyxppZra0SwamN5fI/G4Y oOKBiH839J/VKG7H4GQ4KHTGguLgrYDfJChVFINiLuvHyysOnjUpzn0eJdWr03UuBL8z 5/+Ky4XdUSwHVdlmI/Kb1wwhFyZNTE5Y/yVP6uFzE89hK3WPAEjlbYUMoLmAkNc0CJK7 lenHDPAytIF7NaDJs/5qK58ziBiDNDt2QjvBzencd8FS0mOg1XzgkN6EYSksN9/9gGtz 9NnA== X-Gm-Message-State: APjAAAV4MCsyOZGYuLjUxkkWO8N9gIWeqL+A8BugJAKTiitifB/XygPY c4W8SepRPEkRWw+zZYpZTCry770= X-Google-Smtp-Source: APXvYqzkDOBp79PXpEAipYZadtwGS7ZnIH63SZDea9FHuBgDn4feswfOL5kDKxXMwh4xwbR5YKHd0wE= X-Received: by 2002:a37:9d3:: with SMTP id 202mr3162654qkj.391.1567694501708; Thu, 05 Sep 2019 07:41:41 -0700 (PDT) Date: Thu, 5 Sep 2019 10:41:29 -0400 In-Reply-To: <20190905144130.220713-1-osk@google.com> Message-Id: <20190905144130.220713-2-osk@google.com> Mime-Version: 1.0 References: <20190905144130.220713-1-osk@google.com> X-Mailer: git-send-email 2.23.0.187.g17f5b7556c-goog Subject: [PATCH v3 2/3] dt-bindings: serial: 8250: Add aspeed, sirq-polarity-sense. From: Oskar Senft To: joel@jms.id.au, andrew@aj.id.au, robh+dt@kernel.org, gregkh@linuxfoundation.org, jk@ozlabs.org Cc: openbmc@lists.ozlabs.org, linux-aspeed@lists.ozlabs.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, Oskar Senft Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for 8250_aspeed_vuart's aspeed,sirq-polarity-sense property that enables to auto-configure the VUART's SIRQ polarity. Signed-off-by: Oskar Senft Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/8250.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt index 20d351f268ef..55700f20f6ee 100644 --- a/Documentation/devicetree/bindings/serial/8250.txt +++ b/Documentation/devicetree/bindings/serial/8250.txt @@ -56,6 +56,11 @@ Optional properties: - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively. It will use specified GPIO instead of the peripheral function pin for the UART feature. If unsure, don't specify this property. +- aspeed,sirq-polarity-sense: Only applicable to aspeed,ast2500-vuart. + phandle to aspeed,ast2500-scu compatible syscon alongside register offset + and bit number to identify how the SIRQ polarity should be configured. + One possible data source is the LPC/eSPI mode bit. + Example: aspeed,sirq-polarity-sense = <&syscon 0x70 25> Note: * fsl,ns16550: