From patchwork Mon Sep 2 07:51:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jungo Lin X-Patchwork-Id: 1156493 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46MMjm6LPxz9sN1 for ; Mon, 2 Sep 2019 17:51:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729873AbfIBHvz (ORCPT ); Mon, 2 Sep 2019 03:51:55 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:10603 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729408AbfIBHvz (ORCPT ); Mon, 2 Sep 2019 03:51:55 -0400 X-UUID: dd5f3a5189b64c0786ae6457573ae305-20190902 X-UUID: dd5f3a5189b64c0786ae6457573ae305-20190902 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1150973601; Mon, 02 Sep 2019 15:51:50 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 2 Sep 2019 15:51:49 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 2 Sep 2019 15:51:51 +0800 From: Jungo Lin To: , , , , CC: , , , , , , , , , , , , , , , , , , Subject: [RFC,v5, 1/5] media: dt-bindings: mt8183: Added camera ISP Pass 1 Date: Mon, 2 Sep 2019 15:51:31 +0800 Message-ID: <20190902075135.1332-2-jungo.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190902075135.1332-1-jungo.lin@mediatek.com> References: <20190902075135.1332-1-jungo.lin@mediatek.com> Reply-To: Jungo Lin MIME-Version: 1.0 X-TM-SNTS-SMTP: 6FA7EDA3DF3DBF63BADA5C92253ADB79291539DB5A0F8770415C1E685D1FC89E2000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds DT binding document for the Pass 1 (P1) unit in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor data out from the sensor interface, applies ISP image effects from tuning data and outputs the image data or statistics data to DRAM. Signed-off-by: Jungo Lin Reviewed-by: Rob Herring --- .../bindings/media/mediatek,camisp.txt | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt new file mode 100644 index 000000000000..e156f01747d0 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt @@ -0,0 +1,73 @@ +* Mediatek Image Signal Processor Pass 1 (ISP P1) + +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out +from the sensor interface, applies ISP effects from tuning data and outputs +the image data and statistics data to DRAM. Furthermore, Pass 1 unit has +the ability to output two different resolutions frames at the same time to +increase the performance of the camera application. + +Required properties: +- compatible: Must be "mediatek,mt8183-camisp" for MT8183. +- reg: Physical base address of the camera function block register and + length of memory mapped region. Must contain an entry for each entry + in reg-names. +- reg-names: Must include the following entries: + "cam_sys": Camera base function block + "cam_uni": Camera UNI function block + "cam_a": Camera ISP P1 hardware unit A + "cam_b": Camera ISP P1 hardware unit B + "cam_c": Camera ISP P1 hardware unit C +- interrupts: Must contain an entry for each entry in interrupt-names. +- interrupt-names : Must include the following entries: + "cam_uni": Camera UNI interrupt + "cam_a": Camera unit A interrupt + "cam_b": Camera unit B interrupt + "cam_c": Camera unit C interrupt +- iommus: Shall point to the respective IOMMU block with master port + as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. +- clocks: A list of phandle and clock specifier pairs as listed + in clock-names property, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn". +- mediatek,larb: Must contain the local arbiters in the current SoCs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- power-domains: a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- mediatek,scp : The node of system control processor (SCP), see + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. + +Example: +SoC specific DT entry: + + camisp: camisp@1a000000 { + compatible = "mediatek,mt8183-camisp"; + reg = <0 0x1a000000 0 0x1000>, + <0 0x1a003000 0 0x1000>, + <0 0x1a004000 0 0x2000>, + <0 0x1a006000 0 0x2000>, + <0 0x1a008000 0 0x2000>; + reg-names = "cam_sys", + "cam_uni", + "cam_a", + "cam_b", + "cam_c"; + interrupts = , + , + , + ; + interrupt-names = "cam_uni", + "cam_a", + "cam_b", + "cam_c"; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + clocks = <&camsys CLK_CAM_CAM>, + <&camsys CLK_CAM_CAMTG>; + clock-names = "camsys_cam_cgpdn", + "camsys_camtg_cgpdn"; + mediatek,larb = <&larb3>, + <&larb6>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + mediatek,scp = <&scp>; + };