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Sat, 24 Aug 2019 12:00:37 +0000 From: To: , , , , , , Subject: [PATCH v2 1/7] mtd: spi-nor: Add default_init() hook to tweak flash parameters Thread-Topic: [PATCH v2 1/7] mtd: spi-nor: Add default_init() hook to tweak flash parameters Thread-Index: AQHVWnOLI9kQAqnfkU25HHOSqmLETA== Date: Sat, 24 Aug 2019 12:00:37 +0000 Message-ID: <20190824120027.14452-2-tudor.ambarus@microchip.com> References: <20190824120027.14452-1-tudor.ambarus@microchip.com> In-Reply-To: <20190824120027.14452-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR07CA0194.eurprd07.prod.outlook.com (2603:10a6:802:3f::18) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [86.127.53.184] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c6e46aad-e6fe-42c3-f639-08d7288aad77 x-microsoft-antispam: BCL:0; PCL:0; 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The following sequence of calls is pursued: 1/ spi-nor core legacy flash parameters init: spi_nor_default_init_params() 2/ MFR-based manufacturer flash parameters init: nor->manufacturer->fixups->default_init() 3/ specific flash_info tweeks done when decisions can not be done just on MFR: nor->info->fixups->default_init() 4/ SFDP tables flash parameters init - SFDP knows better: spi_nor_sfdp_init_params() 5/ post SFDP tables flash parameters updates - in case manufacturers get the serial flash tables wrong or incomplete. nor->info->fixups->post_sfdp() The later can be extended to nor->manufacturer->fixups->post_sfdp() if needed. This patch opens doors for steps 2/ and 3/. Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon --- drivers/mtd/spi-nor/spi-nor.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 7c02eddad9fd..016bfe2fb592 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -154,12 +154,16 @@ struct sfdp_bfpt { /** * struct spi_nor_fixups - SPI NOR fixup hooks + * @default_init: called after default flash parameters init. Used to tweak + * flash parameters when information provided by the flash_info + * table is incomplete or wrong. * @post_bfpt: called after the BFPT table has been parsed * * Those hooks can be used to tweak the SPI NOR configuration when the SFDP * table is broken or not available. */ struct spi_nor_fixups { + void (*default_init)(struct spi_nor *nor); int (*post_bfpt)(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt, @@ -4133,6 +4137,17 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, return err; } +/** + * spi_nor_manufacturer_init_params() - Initialize the flash's parameters and + * settings based on ->default_init() hook. + * @nor: pointer to a 'struct spi-nor'. + */ +static void spi_nor_manufacturer_init_params(struct spi_nor *nor) +{ + if (nor->info->fixups && nor->info->fixups->default_init) + nor->info->fixups->default_init(nor); +} + static int spi_nor_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = &nor->params; @@ -4233,6 +4248,8 @@ static int spi_nor_init_params(struct spi_nor *nor) params->quad_enable = info->quad_enable; } + spi_nor_manufacturer_init_params(nor); + if ((info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) && !(info->flags & SPI_NOR_SKIP_SFDP)) { struct spi_nor_flash_parameter sfdp_params; From patchwork Sat Aug 24 12:00:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152586 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; 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SFP:1101; SCL:1; SRVR:MN2PR11MB3984; H:MN2PR11MB4448.namprd11.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: u6TzciohBQRqKKHAKdkYTUvG1pp8F/qo+jw3OcRm5KfCtlmpd7KHBagmOHch4jZm4hlGyUFAsciS/X17njfRcO396QF8GaR4OQyE2qnCMNLu687/5hLXUTeMT2lzylKvVHy8scL0ljYBIlN1xVA097cRw7MlmGseTeajFXtBPLedw4QrQuNwp+YZTfXtqIwzZgVSN4PBOEgAiZE57SHXYFOam4aOIRT8hdVUJ2gaIDgYXbd4r2H7uZDD2KE3QSp0nqkKVRdxy9M89GtdLPIItI3eHbj0AcuIYmIAY/UST2YqjQbKU5mVNmZXH+Edvm/UoP5/KtIuyj0+YW5ikRVDoRec3aXRkyd+Gpp8x12MLsvwl1c0JsJG36lkIJxlhzu2dyquq4HyfKMMKl1eA2ZUP2+un9Ks/Jf7E2r+oQgF5qU= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: c56fe2ea-68cd-42b8-f38c-08d7288aae8f X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Aug 2019 12:00:39.7450 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JOUwUGIsDjKwslqkjBIuu//h66MA7eZEt2shlygyfV0XvVJTdF/lvsaaqnNuuNqeC3PASNjwKCjtbpZIbFeuMhNMJk6iZD36VRRCNt3Ocbw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB3984 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190824_050042_891542_CD630F05 X-CRM114-Status: GOOD ( 13.60 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.154.253 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: boris.brezillon@bootlin.com, Tudor.Ambarus@microchip.com Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Boris Brezillon gd25q256 needs to tweak the ->quad_enable() implementation and the ->default_init() fixup hook is the perfect place to do that. This way, if we ever need to tweak more things for this flash, we won't have to add new fields in flash_info. We can get rid of the flash_info->quad_enable field as gd25q256 was the only user. Signed-off-by: Boris Brezillon [tudor.ambarus@microchip.com: use ->default_init() hook instead of ->post_sfdp()] Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 016bfe2fb592..27951e5a01e2 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -222,8 +222,6 @@ struct flash_info { /* Part specific fixup hooks. */ const struct spi_nor_fixups *fixups; - - int (*quad_enable)(struct spi_nor *nor); }; #define JEDEC_MFR(info) ((info)->id[0]) @@ -2126,6 +2124,21 @@ static struct spi_nor_fixups mx25l25635_fixups = { .post_bfpt = mx25l25635_post_bfpt_fixups, }; +static void gd25q256_default_init(struct spi_nor *nor) +{ + /* + * Some manufacturer like GigaDevice may use different + * bit to set QE on different memories, so the MFR can't + * indicate the quad_enable method for this case, we need + * to set it in the default_init fixup hook. + */ + nor->params.quad_enable = macronix_quad_enable; +} + +static struct spi_nor_fixups gd25q256_fixups = { + .default_init = gd25q256_default_init, +}; + /* NOTE: double check command sets and memory organization when you add * more nor chips. This current list focusses on newer chips, which * have been converging on command sets which including JEDEC ID. @@ -2218,7 +2231,7 @@ static const struct flash_info spi_nor_ids[] = { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - .quad_enable = macronix_quad_enable, + .fixups = &gd25q256_fixups, }, /* Intel/Numonyx -- xxxs33b */ @@ -4237,15 +4250,6 @@ static int spi_nor_init_params(struct spi_nor *nor) params->quad_enable = spansion_quad_enable; break; } - - /* - * Some manufacturer like GigaDevice may use different - * bit to set QE on different memories, so the MFR can't - * indicate the quad_enable method for this case, we need - * set it in flash info list. - */ - if (info->quad_enable) - params->quad_enable = info->quad_enable; } spi_nor_manufacturer_init_params(nor); From patchwork Sat Aug 24 12:00:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152588 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Sat, 24 Aug 2019 12:00:41 +0000 From: To: , , , , , , Subject: [PATCH v2 3/7] mtd: spi_nor: Move manufacturer quad_enable() in ->default_init() Thread-Topic: [PATCH v2 3/7] mtd: spi_nor: Move manufacturer quad_enable() in ->default_init() Thread-Index: AQHVWnONChlfDI2lKEuSOGQMw5/1ew== Date: Sat, 24 Aug 2019 12:00:41 +0000 Message-ID: <20190824120027.14452-4-tudor.ambarus@microchip.com> References: <20190824120027.14452-1-tudor.ambarus@microchip.com> In-Reply-To: <20190824120027.14452-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR07CA0194.eurprd07.prod.outlook.com (2603:10a6:802:3f::18) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [86.127.53.184] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4e849081-9b73-4bdf-62ce-08d7288aaf98 x-microsoft-antispam: BCL:0; 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Set specific manufacturer fixups->default_init() hooks to overwrite the default quad_enable() implementation when needed. Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon --- drivers/mtd/spi-nor/spi-nor.c | 48 ++++++++++++++++++++++++++----------------- 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 27951e5a01e2..c9514dfd7d6d 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -4150,13 +4150,38 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, return err; } +static void macronix_set_default_init(struct spi_nor *nor) +{ + nor->params.quad_enable = macronix_quad_enable; +} + +static void st_micron_set_default_init(struct spi_nor *nor) +{ + nor->params.quad_enable = NULL; +} + /** * spi_nor_manufacturer_init_params() - Initialize the flash's parameters and - * settings based on ->default_init() hook. + * settings based on MFR register and ->default_init() hook. * @nor: pointer to a 'struct spi-nor'. */ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) { + /* Init flash parameters based on MFR */ + switch (JEDEC_MFR(nor->info)) { + case SNOR_MFR_MACRONIX: + macronix_set_default_init(nor); + break; + + case SNOR_MFR_ST: + case SNOR_MFR_MICRON: + st_micron_set_default_init(nor); + break; + + default: + break; + } + if (nor->info->fixups && nor->info->fixups->default_init) nor->info->fixups->default_init(nor); } @@ -4168,6 +4193,9 @@ static int spi_nor_init_params(struct spi_nor *nor) const struct flash_info *info = nor->info; u8 i, erase_mask; + /* Initialize legacy flash parameters and settings. */ + params->quad_enable = spansion_quad_enable; + /* Set SPI NOR sizes. */ params->size = (u64)info->sector_size * info->n_sectors; params->page_size = info->page_size; @@ -4233,24 +4261,6 @@ static int spi_nor_init_params(struct spi_nor *nor) SPINOR_OP_SE); spi_nor_init_uniform_erase_map(map, erase_mask, params->size); - /* Select the procedure to set the Quad Enable bit. */ - if (params->hwcaps.mask & (SNOR_HWCAPS_READ_QUAD | - SNOR_HWCAPS_PP_QUAD)) { - switch (JEDEC_MFR(info)) { - case SNOR_MFR_MACRONIX: - params->quad_enable = macronix_quad_enable; - break; - - case SNOR_MFR_ST: - case SNOR_MFR_MICRON: - break; - - default: - /* Kept only for backward compatibility purpose. */ - params->quad_enable = spansion_quad_enable; - break; - } - } spi_nor_manufacturer_init_params(nor); From patchwork Sat Aug 24 12:00:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152589 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="LZnFeK8A"; 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Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon --- drivers/mtd/spi-nor/spi-nor.c | 83 ++++++++++++++++++++++++++++++++----------- 1 file changed, 63 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index c9514dfd7d6d..93424f914159 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -4186,7 +4186,34 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) nor->info->fixups->default_init(nor); } -static int spi_nor_init_params(struct spi_nor *nor) +/** + * spi_nor_sfdp_init_params() - Initialize the flash's parameters and settings + * based on JESD216 SFDP standard. + * @nor: pointer to a 'struct spi-nor'. + * + * The method has a roll-back mechanism: in case the SFDP parsing fails, the + * legacy flash parameters and settings will be restored. + */ +static void spi_nor_sfdp_init_params(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter sfdp_params; + + memcpy(&sfdp_params, &nor->params, sizeof(sfdp_params)); + + if (spi_nor_parse_sfdp(nor, &sfdp_params)) { + nor->addr_width = 0; + nor->flags &= ~SNOR_F_4B_OPCODES; + } else { + memcpy(&nor->params, &sfdp_params, sizeof(nor->params)); + } +} + +/** + * spi_nor_legacy_init_params() - Initialize the flash's parameters and settings + * based on nor->info data. + * @nor: pointer to a 'struct spi-nor'. + */ +static void spi_nor_legacy_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = &nor->params; struct spi_nor_erase_map *map = ¶ms->erase_map; @@ -4260,25 +4287,43 @@ static int spi_nor_init_params(struct spi_nor *nor) spi_nor_set_erase_type(&map->erase_type[i], info->sector_size, SPINOR_OP_SE); spi_nor_init_uniform_erase_map(map, erase_mask, params->size); +} +/** + * spi_nor_init_params() - Initialize the flash's parameters and settings. + * @nor: pointer to a 'struct spi-nor'. + * + * The flash parameters and settings are initialized based on a sequence of + * calls that are ordered by priority: + * + * 1/ Legacy flash parameters initialization. The initializations are done + * based on nor->info data: + * spi_nor_legacy_init_params() + * + * which can be overwritten by: + * 2/ Manufacturer flash parameters initialization. The initializations are + * done based on MFR register, or when the decisions can not be done solely + * based on MFR, by using specific flash_info tweeks, ->default_init(): + * spi_nor_manufacturer_init_params() + * + * which can be overwritten by: + * 3/ SFDP flash parameters initialization. JESD216 SFDP is a standard and + * should be more accurate that the above. + * spi_nor_sfdp_init_params() + * + * Please not that there is a ->post_bfpt() fixup hook that can overwrite the + * flash parameters and settings imediately after parsing the Basic Flash + * Parameter Table. + */ +static void spi_nor_init_params(struct spi_nor *nor) +{ + spi_nor_legacy_init_params(nor); spi_nor_manufacturer_init_params(nor); - if ((info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) && - !(info->flags & SPI_NOR_SKIP_SFDP)) { - struct spi_nor_flash_parameter sfdp_params; - - memcpy(&sfdp_params, params, sizeof(sfdp_params)); - - if (spi_nor_parse_sfdp(nor, &sfdp_params)) { - nor->addr_width = 0; - nor->flags &= ~SNOR_F_4B_OPCODES; - } else { - memcpy(params, &sfdp_params, sizeof(*params)); - } - } - - return 0; + if ((nor->info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) && + !(nor->info->flags & SPI_NOR_SKIP_SFDP)) + spi_nor_sfdp_init_params(nor); } static int spi_nor_select_read(struct spi_nor *nor, @@ -4693,10 +4738,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, nor->info->flags & SPI_NOR_HAS_LOCK) nor->params.disable_block_protection = spi_nor_clear_sr_bp; - /* Parse the Serial Flash Discoverable Parameters table. */ - ret = spi_nor_init_params(nor); - if (ret) - return ret; + /* Init flash parameters based on flash_info struct and SFDP */ + spi_nor_init_params(nor); if (!mtd->name) mtd->name = dev_name(dev); From patchwork Sat Aug 24 12:00:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152590 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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Signed-off-by: Boris Brezillon [tudor.ambarus@microchip.com: use nor->params.set_4byte() instead of nor->set_4byte()] Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 76 ++++++++++++++++++++++--------------------- include/linux/mtd/spi-nor.h | 2 ++ 2 files changed, 41 insertions(+), 37 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 93424f914159..1629584be30e 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -633,6 +633,17 @@ static int macronix_set_4byte(struct spi_nor *nor, bool enable) NULL, 0); } +static int st_micron_set_4byte(struct spi_nor *nor, bool enable) +{ + int ret; + + write_enable(nor); + ret = macronix_set_4byte(nor, enable); + write_disable(nor); + + return ret; +} + static int spansion_set_4byte(struct spi_nor *nor, bool enable) { nor->bouncebuf[0] = enable << 7; @@ -667,45 +678,24 @@ static int spi_nor_write_ear(struct spi_nor *nor, u8 ear) return nor->write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1); } -/* Enable/disable 4-byte addressing mode. */ -static int set_4byte(struct spi_nor *nor, bool enable) +static int winbond_set_4byte(struct spi_nor *nor, bool enable) { - int status; - bool need_wren = false; - - switch (JEDEC_MFR(nor->info)) { - case SNOR_MFR_ST: - case SNOR_MFR_MICRON: - /* Some Micron need WREN command; all will accept it */ - need_wren = true; - /* fall through */ - case SNOR_MFR_MACRONIX: - case SNOR_MFR_WINBOND: - if (need_wren) - write_enable(nor); + int ret; - status = macronix_set_4byte(nor, enable); - if (need_wren) - write_disable(nor); + ret = macronix_set_4byte(nor, enable); + if (ret || enable) + return ret; - if (!status && !enable && - JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND) { - /* - * On Winbond W25Q256FV, leaving 4byte mode causes - * the Extended Address Register to be set to 1, so all - * 3-byte-address reads come from the second 16M. - * We must clear the register to enable normal behavior. - */ - write_enable(nor); - spi_nor_write_ear(nor, 0); - write_disable(nor); - } + /* + * On Winbond W25Q256FV, leaving 4byte mode causes the Extended Address + * Register to be set to 1, so all 3-byte-address reads come from the + * second 16M. We must clear the register to enable normal behavior. + */ + write_enable(nor); + ret = spi_nor_write_ear(nor, 0); + write_disable(nor); - return status; - default: - /* Spansion style */ - return spansion_set_4byte(nor, enable); - } + return ret; } static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) @@ -4153,11 +4143,18 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, static void macronix_set_default_init(struct spi_nor *nor) { nor->params.quad_enable = macronix_quad_enable; + nor->params.set_4byte = macronix_set_4byte; } static void st_micron_set_default_init(struct spi_nor *nor) { nor->params.quad_enable = NULL; + nor->params.set_4byte = st_micron_set_4byte; +} + +static void winbond_set_default_init(struct spi_nor *nor) +{ + nor->params.set_4byte = winbond_set_4byte; } /** @@ -4178,6 +4175,10 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) st_micron_set_default_init(nor); break; + case SNOR_MFR_WINBOND: + winbond_set_default_init(nor); + break; + default: break; } @@ -4222,6 +4223,7 @@ static void spi_nor_legacy_init_params(struct spi_nor *nor) /* Initialize legacy flash parameters and settings. */ params->quad_enable = spansion_quad_enable; + params->set_4byte = spansion_set_4byte; /* Set SPI NOR sizes. */ params->size = (u64)info->sector_size * info->n_sectors; @@ -4610,7 +4612,7 @@ static int spi_nor_init(struct spi_nor *nor) */ WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET, "enabling reset hack; may not recover from unexpected reboots\n"); - set_4byte(nor, true); + nor->params.set_4byte(nor, true); } return 0; @@ -4634,7 +4636,7 @@ void spi_nor_restore(struct spi_nor *nor) /* restore the addressing mode */ if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES) && nor->flags & SNOR_F_BROKEN_RESET) - set_4byte(nor, false); + nor->params.set_4byte(nor, false); } EXPORT_SYMBOL_GPL(spi_nor_restore); diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index a3a765c21edc..012731ad339f 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -482,6 +482,7 @@ struct spi_nor; * @erase_map: the erase map parsed from the SFDP Sector Map Parameter * Table. * @quad_enable: enables SPI NOR quad mode. + * @set_4byte: puts the SPI NOR in 4 byte addressing mode. * @disable_block_protection: disables block protection during power-up. */ struct spi_nor_flash_parameter { @@ -495,6 +496,7 @@ struct spi_nor_flash_parameter { struct spi_nor_erase_map erase_map; int (*quad_enable)(struct spi_nor *nor); + int (*set_4byte)(struct spi_nor *nor, bool enable); int (*disable_block_protection)(struct spi_nor *nor); }; From patchwork Sat Aug 24 12:00:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152591 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; 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Sat, 24 Aug 2019 12:00:47 +0000 From: To: , , , , , , Subject: [PATCH v2 6/7] mtd: spi-nor: Rework the SPI NOR lock/unlock logic Thread-Topic: [PATCH v2 6/7] mtd: spi-nor: Rework the SPI NOR lock/unlock logic Thread-Index: AQHVWnOQaAxxvWwKPEiv+nDPOfoC1A== Date: Sat, 24 Aug 2019 12:00:47 +0000 Message-ID: <20190824120027.14452-7-tudor.ambarus@microchip.com> References: <20190824120027.14452-1-tudor.ambarus@microchip.com> In-Reply-To: <20190824120027.14452-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR07CA0194.eurprd07.prod.outlook.com (2603:10a6:802:3f::18) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [86.127.53.184] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 23043497-ab7d-4f15-3eb3-08d7288ab2fe x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(2017052603328)(7193020); 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Move the locking hooks in a separate struct so that we have just one field to update when we change the locking implementation. Signed-off-by: Boris Brezillon [tudor.ambarus@microchip.com: use ->default_init() hook, introduce spi_nor_late_init_params(), set ops in nor->params] Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 50 ++++++++++++++++++++++++++++++++----------- include/linux/mtd/spi-nor.h | 23 ++++++++++++++------ 2 files changed, 53 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 1629584be30e..fc9e14777212 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1598,6 +1598,12 @@ static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) return stm_is_locked_sr(nor, ofs, len, status); } +static const struct spi_nor_locking_ops stm_locking_ops = { + .lock = stm_lock, + .unlock = stm_unlock, + .is_locked = stm_is_locked, +}; + static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) { struct spi_nor *nor = mtd_to_spi_nor(mtd); @@ -1607,7 +1613,7 @@ static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) if (ret) return ret; - ret = nor->flash_lock(nor, ofs, len); + ret = nor->params.locking_ops->lock(nor, ofs, len); spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK); return ret; @@ -1622,7 +1628,7 @@ static int spi_nor_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) if (ret) return ret; - ret = nor->flash_unlock(nor, ofs, len); + ret = nor->params.locking_ops->unlock(nor, ofs, len); spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); return ret; @@ -1637,7 +1643,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) if (ret) return ret; - ret = nor->flash_is_locked(nor, ofs, len); + ret = nor->params.locking_ops->is_locked(nor, ofs, len); spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); return ret; @@ -4148,6 +4154,7 @@ static void macronix_set_default_init(struct spi_nor *nor) static void st_micron_set_default_init(struct spi_nor *nor) { + nor->flags = SNOR_F_HAS_LOCK; nor->params.quad_enable = NULL; nor->params.set_4byte = st_micron_set_4byte; } @@ -4292,6 +4299,23 @@ static void spi_nor_legacy_init_params(struct spi_nor *nor) } /** + * spi_nor_late_init_params() - Late initialization of legacy flash parameters. + * @nor: pointer to a 'struct spi_nor' + * + * Used to set legacy flash parameters and settings when the ->default_init() + * hook or the SFDP parser let voids. + */ +static void spi_nor_late_init_params(struct spi_nor *nor) +{ + /* + * NOR protection support. When locking_ops are not provided, we pick + * the default ones. + */ + if (nor->flags & SNOR_F_HAS_LOCK && !nor->params.locking_ops) + nor->params.locking_ops = &stm_locking_ops; +} + +/** * spi_nor_init_params() - Initialize the flash's parameters and settings. * @nor: pointer to a 'struct spi-nor'. * @@ -4316,6 +4340,10 @@ static void spi_nor_legacy_init_params(struct spi_nor *nor) * Please not that there is a ->post_bfpt() fixup hook that can overwrite the * flash parameters and settings imediately after parsing the Basic Flash * Parameter Table. + * + * 4/ Late legacy flash parameters initialization, used when the + * ->default_init() hook or the SFDP parser do not set specific params. + * spi_nor_late_init_params() */ static void spi_nor_init_params(struct spi_nor *nor) { @@ -4326,6 +4354,8 @@ static void spi_nor_init_params(struct spi_nor *nor) if ((nor->info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) && !(nor->info->flags & SPI_NOR_SKIP_SFDP)) spi_nor_sfdp_init_params(nor); + + spi_nor_late_init_params(nor); } static int spi_nor_select_read(struct spi_nor *nor, @@ -4730,6 +4760,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, if (info->flags & SPI_S3AN) nor->flags |= SNOR_F_READY_XSR_RDY; + if (info->flags & SPI_NOR_HAS_LOCK) + nor->flags |= SNOR_F_HAS_LOCK; + /* * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up * with the software protection bits set. @@ -4754,16 +4787,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->_read = spi_nor_read; mtd->_resume = spi_nor_resume; - /* NOR protection support for STmicro/Micron chips and similar */ - if (JEDEC_MFR(info) == SNOR_MFR_ST || - JEDEC_MFR(info) == SNOR_MFR_MICRON || - info->flags & SPI_NOR_HAS_LOCK) { - nor->flash_lock = stm_lock; - nor->flash_unlock = stm_unlock; - nor->flash_is_locked = stm_is_locked; - } - - if (nor->flash_lock && nor->flash_unlock && nor->flash_is_locked) { + if (nor->params.locking_ops) { mtd->_lock = spi_nor_lock; mtd->_unlock = spi_nor_unlock; mtd->_is_locked = spi_nor_is_locked; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 012731ad339f..6c5eaf607b50 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -243,6 +243,7 @@ enum spi_nor_option_flags { SNOR_F_BROKEN_RESET = BIT(6), SNOR_F_4B_OPCODES = BIT(7), SNOR_F_HAS_4BAIT = BIT(8), + SNOR_F_HAS_LOCK = BIT(9), }; /** @@ -466,6 +467,18 @@ enum spi_nor_pp_command_index { struct spi_nor; /** + * struct spi_nor_locking_ops - SPI NOR locking methods + * @lock: lock a region of the SPI NOR. + * @unlock: unlock a region of the SPI NOR. + * @is_locked: check if a region of the SPI NOR is completely locked + */ +struct spi_nor_locking_ops { + int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); + int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); + int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); +}; + +/** * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. * Includes legacy flash parameters and settings that can be overwritten * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 @@ -484,6 +497,7 @@ struct spi_nor; * @quad_enable: enables SPI NOR quad mode. * @set_4byte: puts the SPI NOR in 4 byte addressing mode. * @disable_block_protection: disables block protection during power-up. + * @locking_ops: SPI NOR locking methods. */ struct spi_nor_flash_parameter { u64 size; @@ -498,6 +512,8 @@ struct spi_nor_flash_parameter { int (*quad_enable)(struct spi_nor *nor); int (*set_4byte)(struct spi_nor *nor, bool enable); int (*disable_block_protection)(struct spi_nor *nor); + + const struct spi_nor_locking_ops *locking_ops; }; /** @@ -538,10 +554,6 @@ struct flash_info; * @erase: [DRIVER-SPECIFIC] erase a sector of the SPI NOR * at the offset @offs; if not provided by the driver, * spi-nor will send the erase opcode via write_reg() - * @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR - * @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR - * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is - * completely locked * @params: [FLASH-SPECIFIC] SPI-NOR flash parameters and settings. * The structure includes legacy flash parameters and * settings that can be overwritten by the spi_nor_fixups @@ -579,9 +591,6 @@ struct spi_nor { size_t len, const u_char *write_buf); int (*erase)(struct spi_nor *nor, loff_t offs); - int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); - int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); - int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); struct spi_nor_flash_parameter params; void *priv; From patchwork Sat Aug 24 12:00:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 1152592 X-Patchwork-Delegate: tudor.ambarus@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; 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X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.154.253 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tudor.Ambarus@microchip.com Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Tudor Ambarus Get rid of MFR handling and implement specific manufacturer default_init() fixup hooks. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index fc9e14777212..f4e9fcca619f 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -4146,6 +4146,16 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, return err; } +static void atmel_set_default_init(struct spi_nor *nor) +{ + nor->params.disable_block_protection = spi_nor_clear_sr_bp; +} + +static void intel_set_default_init(struct spi_nor *nor) +{ + nor->params.disable_block_protection = spi_nor_clear_sr_bp; +} + static void macronix_set_default_init(struct spi_nor *nor) { nor->params.quad_enable = macronix_quad_enable; @@ -4173,6 +4183,14 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) { /* Init flash parameters based on MFR */ switch (JEDEC_MFR(nor->info)) { + case SNOR_MFR_ATMEL: + atmel_set_default_init(nor); + break; + + case SNOR_MFR_INTEL: + intel_set_default_init(nor); + break; + case SNOR_MFR_MACRONIX: macronix_set_default_init(nor); break; @@ -4760,18 +4778,10 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, if (info->flags & SPI_S3AN) nor->flags |= SNOR_F_READY_XSR_RDY; - if (info->flags & SPI_NOR_HAS_LOCK) + if (info->flags & SPI_NOR_HAS_LOCK) { nor->flags |= SNOR_F_HAS_LOCK; - - /* - * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up - * with the software protection bits set. - */ - if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL || - JEDEC_MFR(nor->info) == SNOR_MFR_INTEL || - JEDEC_MFR(nor->info) == SNOR_MFR_SST || - nor->info->flags & SPI_NOR_HAS_LOCK) nor->params.disable_block_protection = spi_nor_clear_sr_bp; + } /* Init flash parameters based on flash_info struct and SFDP */ spi_nor_init_params(nor);