From patchwork Thu Aug 22 13:45:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151611 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507515-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="bo9YGSkV"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm5y0kj0z9s00 for ; Thu, 22 Aug 2019 23:46:29 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=PneR7 F+F3DGZzpyF4NlRVd7IRma/729vB4dMI0XZ4ddny0om0qZz4CaprFz58zYCq3NXY XbyOTT0MfwA0E2bWJRCiTfjqpRGoloZvSkuErsQIH1pA2dBBID48ePwg+JrRmTWr 4x0/LsgFO7rclvyrp9w1h3sPTJMuTJm43xBYsE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=ihOnT7JrPpb Ug9EDSuVtseyl9Ks=; b=bo9YGSkVPtniXmWh5leNFhZQEMfH8V4S1GCKzqPotKk GTqaW9UkP3nYSECgk7nkNZP5M/a65rbphfI8iJ4UBtFrAqAFJtuvTxhvxptDz03r mJYOD5mLBybFZpTI8S42wsxyRtQP6Qb965FByfdJO0XXSOaUst2x34Nk5mJP1CX8 = Received: (qmail 70928 invoked by alias); 22 Aug 2019 13:46:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 70814 invoked by uid 89); 22 Aug 2019 13:46:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=Ilya, interpreted, unordered, sk:iiilin X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:46:15 +0000 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDXpdQ096684 for ; Thu, 22 Aug 2019 09:46:13 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2uhu2ckgm4-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:46:13 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:46:09 +0100 Received: from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDk8Fg48169124 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:46:08 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 69E4C42045; Thu, 22 Aug 2019 13:46:08 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3B6A842047; Thu, 22 Aug 2019 13:46:08 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:46:08 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 1/9] Document signaling for min, max and ltgt operations Date: Thu, 22 Aug 2019 15:45:43 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0016-0000-0000-000002A1843E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0017-0000-0000-00003301BDBC Message-Id: <20190822134551.18924-2-iii@linux.ibm.com> X-IsSubscribed: yes Currently it's not clear whether min, max and ltgt should raise floating point exceptions when dealing with qNaNs. Right now a lot of code assumes that LTGT is signaling: in particular, with -fno-finite-math-only, which is the default, it's generated for the signaling ((x < y) || (x > y)). The behavior of MIN/MAX is (intentionally?) left unspecified, according to https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=263751 ("Unconditionally use MAX_EXPR/MIN_EXPR for MAX/MIN intrinsics"). So document the status quo. gcc/ChangeLog: 2019-08-09 Ilya Leoshkevich PR target/91323 * doc/generic.texi (LTGT_EXPR): Restore the original wording regarding floating point exceptions. (MIN_EXPR, MAX_EXPR): Document. * doc/md.texi (smin, smax): Add a clause regarding floating point exceptions. * doc/rtl.texi (smin, smax): Add a clause regarding floating point exceptions. --- gcc/doc/generic.texi | 16 +++++++++++++--- gcc/doc/md.texi | 3 ++- gcc/doc/rtl.texi | 3 ++- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi index 8901d5f357e..d5ae20bd461 100644 --- a/gcc/doc/generic.texi +++ b/gcc/doc/generic.texi @@ -1331,6 +1331,8 @@ the byte offset of the field, but should not be used directly; call @tindex UNGE_EXPR @tindex UNEQ_EXPR @tindex LTGT_EXPR +@tindex MIN_EXPR +@tindex MAX_EXPR @tindex MODIFY_EXPR @tindex INIT_EXPR @tindex COMPOUND_EXPR @@ -1602,13 +1604,21 @@ These operations take two floating point operands and determine whether the operands are unordered or are less than, less than or equal to, greater than, greater than or equal to, or equal respectively. For example, @code{UNLT_EXPR} returns true if either operand is an IEEE -NaN or the first operand is less than the second. With the possible -exception of @code{LTGT_EXPR}, all of these operations are guaranteed -not to generate a floating point exception. The result +NaN or the first operand is less than the second. Only @code{LTGT_EXPR} +is expected to raise an invalid floating-point-operation trap when the +outcome is unordered. All other operations are guaranteed not to raise +a floating point exception. The result type of these expressions will always be of integral or boolean type. These operations return the result type's zero value for false, and the result type's one value for true. +@item MIN_EXPR +@itemx MAX_EXPR +These nodes represent minimum and maximum operations. When used with +floating point, if both operands are zeros, or if either operand is +@code{NaN}, then it is unspecified which of the two operands is returned +as the result and whether or not a floating point exception is raised. + @item MODIFY_EXPR These nodes represent assignment. The left-hand side is the first operand; the right-hand side is the second operand. The left-hand side diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 7751984bf5f..74f8ec84974 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5353,7 +5353,8 @@ in the rtl as @item @samp{smin@var{m}3}, @samp{smax@var{m}3} Signed minimum and maximum operations. When used with floating point, if both operands are zeros, or if either operand is @code{NaN}, then -it is unspecified which of the two operands is returned as the result. +it is unspecified which of the two operands is returned as the result +and whether or not a floating point exception is raised. @cindex @code{fmin@var{m}3} instruction pattern @cindex @code{fmax@var{m}3} instruction pattern diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index 0814b66a486..e0628da893d 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -2596,7 +2596,8 @@ Represents the smaller (for @code{smin}) or larger (for @code{smax}) of @var{x} and @var{y}, interpreted as signed values in mode @var{m}. When used with floating point, if both operands are zeros, or if either operand is @code{NaN}, then it is unspecified which of the two operands -is returned as the result. +is returned as the result and whether or not a floating point exception +is raised. @findex umin @findex umax From patchwork Thu Aug 22 13:45:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151612 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507516-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="UcBcLxJR"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm6C1tvPz9s00 for ; Thu, 22 Aug 2019 23:46:43 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=ePBhB 0rVfPdEyHmWSPRa102voXQ2tz6WtdNfMTiZ56U+ptQwqrYFQU5s0q9yMK9iCbYXj uzVnkNUX+RtAraub7Hs2qGyxKHT6FJ/ewP+Ny9rZftORyz2/4MZZ8J3eu7v4Q1Cq nml9HlGUzHie5ZR3BaUqbQkANpmqxriWiwYFN4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=2/k7kYXcAmN OlNxOn3VNQ0vcoD4=; b=UcBcLxJRHi6NoUmi/ZhwGlqqF2od7ktqVHpaTQOU68L B3VoAX8mS732AAt38VDuaQqrbBLM7uajkQVfGla9GQE34ALfS5Vrw/4n9YppAZin sfYVz4B3509NbpyPqPXAMLQwrf7Aumho49dRnJF5v8/3U7fmxrmDA3WlwdVpzvrQ = Received: (qmail 72654 invoked by alias); 22 Aug 2019 13:46:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 72567 invoked by uid 89); 22 Aug 2019 13:46:32 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:46:30 +0000 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDZp7S076083 for ; Thu, 22 Aug 2019 09:46:28 -0400 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0b-001b2d01.pphosted.com with ESMTP id 2uhs8nqtyt-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:46:28 -0400 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:46:23 +0100 Received: from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDkMDv44892250 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:46:22 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B2E654204B; Thu, 22 Aug 2019 13:46:22 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8524542045; Thu, 22 Aug 2019 13:46:22 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:46:22 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 2/9] hash_traits: split pointer_hash_mark from pointer_hash Date: Thu, 22 Aug 2019 15:45:44 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0028-0000-0000-000003928223 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0029-0000-0000-00002454AD88 Message-Id: <20190822134551.18924-3-iii@linux.ibm.com> X-IsSubscribed: yes The next patch introducing can_vector_compare_p function needs to store rtxes in a hash table and look them up using a special key type. Currently pointer_hash requires value_type to be the same as compare_type, so it would not be usable and one would have to implement mark_deleted, mark_empty, is_deleted and is_empty manually. Split pointer_hash_mark out of pointer_hash in order to support such use cases. Also make use of it in the existing code where possible. gcc/ChangeLog: 2019-08-22 Ilya Leoshkevich * hash-traits.h (struct pointer_hash_mark): New trait. (Pointer>::mark_deleted): Move from pointer_hash. (Pointer>::mark_empty): Likewise. (Pointer>::is_deleted): Likewise. (Pointer>::is_empty): Likewise. (struct pointer_hash): Inherit from pointer_hash_mark. (Type>::mark_deleted): Move to pointer_hash_mark. (Type>::mark_empty): Likewise. (Type>::is_deleted): Likewise. (Type>::is_empty): Likewise. * ipa-prop.c (struct ipa_bit_ggc_hash_traits): Use pointer_hash_mark. (struct ipa_vr_ggc_hash_traits): Likewise. gcc/cp/ChangeLog: 2019-08-22 Ilya Leoshkevich * decl2.c (struct mangled_decl_hash): Use pointer_hash_mark. --- gcc/cp/decl2.c | 14 +-------- gcc/hash-traits.h | 74 ++++++++++++++++++++++++++--------------------- gcc/ipa-prop.c | 47 ++++-------------------------- 3 files changed, 47 insertions(+), 88 deletions(-) diff --git a/gcc/cp/decl2.c b/gcc/cp/decl2.c index a32108f9d16..36a10f491fa 100644 --- a/gcc/cp/decl2.c +++ b/gcc/cp/decl2.c @@ -105,7 +105,7 @@ static GTY(()) vec *mangling_aliases; /* hash traits for declarations. Hashes single decls via DECL_ASSEMBLER_NAME_RAW. */ -struct mangled_decl_hash : ggc_remove +struct mangled_decl_hash : pointer_hash_mark , ggc_remove { typedef tree value_type; /* A DECL. */ typedef tree compare_type; /* An identifier. */ @@ -119,18 +119,6 @@ struct mangled_decl_hash : ggc_remove tree name = DECL_ASSEMBLER_NAME_RAW (existing); return candidate == name; } - - static inline void mark_empty (value_type &p) {p = NULL_TREE;} - static inline bool is_empty (value_type p) {return !p;} - - static bool is_deleted (value_type e) - { - return e == reinterpret_cast (1); - } - static void mark_deleted (value_type &e) - { - e = reinterpret_cast (1); - } }; /* A hash table of decls keyed by mangled name. Used to figure out if diff --git a/gcc/hash-traits.h b/gcc/hash-traits.h index 2d17e2c982a..e5c9e88d99f 100644 --- a/gcc/hash-traits.h +++ b/gcc/hash-traits.h @@ -136,12 +136,52 @@ int_hash ::is_empty (Type x) return x == Empty; } +/* Base class for pointer hashers that want to implement marking in a generic + way. */ + +template +struct pointer_hash_mark +{ + static inline void mark_deleted (Pointer &); + static inline void mark_empty (Pointer &); + static inline bool is_deleted (Pointer); + static inline bool is_empty (Pointer); +}; + +template +inline void +pointer_hash_mark ::mark_deleted (Pointer &e) +{ + e = reinterpret_cast (1); +} + +template +inline void +pointer_hash_mark ::mark_empty (Pointer &e) +{ + e = NULL; +} + +template +inline bool +pointer_hash_mark ::is_deleted (Pointer e) +{ + return e == reinterpret_cast (1); +} + +template +inline bool +pointer_hash_mark ::is_empty (Pointer e) +{ + return e == NULL; +} + /* Pointer hasher based on pointer equality. Other types of pointer hash can inherit this and override the hash and equal functions with some other form of equality (such as string equality). */ template -struct pointer_hash +struct pointer_hash : pointer_hash_mark { typedef Type *value_type; typedef Type *compare_type; @@ -149,10 +189,6 @@ struct pointer_hash static inline hashval_t hash (const value_type &); static inline bool equal (const value_type &existing, const compare_type &candidate); - static inline void mark_deleted (Type *&); - static inline void mark_empty (Type *&); - static inline bool is_deleted (Type *); - static inline bool is_empty (Type *); }; template @@ -172,34 +208,6 @@ pointer_hash ::equal (const value_type &existing, return existing == candidate; } -template -inline void -pointer_hash ::mark_deleted (Type *&e) -{ - e = reinterpret_cast (1); -} - -template -inline void -pointer_hash ::mark_empty (Type *&e) -{ - e = NULL; -} - -template -inline bool -pointer_hash ::is_deleted (Type *e) -{ - return e == reinterpret_cast (1); -} - -template -inline bool -pointer_hash ::is_empty (Type *e) -{ - return e == NULL; -} - /* Hasher for "const char *" strings, using string rather than pointer equality. */ diff --git a/gcc/ipa-prop.c b/gcc/ipa-prop.c index 1a0e12e6c0c..6fde7500cf4 100644 --- a/gcc/ipa-prop.c +++ b/gcc/ipa-prop.c @@ -64,7 +64,8 @@ ipa_edge_args_sum_t *ipa_edge_args_sum; /* Traits for a hash table for reusing already existing ipa_bits. */ -struct ipa_bit_ggc_hash_traits : public ggc_cache_remove +struct ipa_bit_ggc_hash_traits : pointer_hash_mark , + ggc_cache_remove { typedef ipa_bits *value_type; typedef ipa_bits *compare_type; @@ -79,26 +80,6 @@ struct ipa_bit_ggc_hash_traits : public ggc_cache_remove { return a->value == b->value && a->mask == b->mask; } - static void - mark_empty (ipa_bits *&p) - { - p = NULL; - } - static bool - is_empty (const ipa_bits *p) - { - return p == NULL; - } - static bool - is_deleted (const ipa_bits *p) - { - return p == reinterpret_cast (1); - } - static void - mark_deleted (ipa_bits *&p) - { - p = reinterpret_cast (1); - } }; /* Hash table for avoid repeated allocations of equal ipa_bits. */ @@ -107,7 +88,9 @@ static GTY ((cache)) hash_table *ipa_bits_hash_table; /* Traits for a hash table for reusing value_ranges used for IPA. Note that the equiv bitmap is not hashed and is expected to be NULL. */ -struct ipa_vr_ggc_hash_traits : public ggc_cache_remove +struct ipa_vr_ggc_hash_traits : pointer_hash_mark , + ggc_cache_remove + { typedef value_range_base *value_type; typedef value_range_base *compare_type; @@ -124,26 +107,6 @@ struct ipa_vr_ggc_hash_traits : public ggc_cache_remove { return a->equal_p (*b); } - static void - mark_empty (value_range_base *&p) - { - p = NULL; - } - static bool - is_empty (const value_range_base *p) - { - return p == NULL; - } - static bool - is_deleted (const value_range_base *p) - { - return p == reinterpret_cast (1); - } - static void - mark_deleted (value_range_base *&p) - { - p = reinterpret_cast (1); - } }; /* Hash table for avoid repeated allocations of equal value_ranges. */ From patchwork Thu Aug 22 13:45:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151613 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507517-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="syd2+D+j"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm6W5z7kz9s00 for ; Thu, 22 Aug 2019 23:46:59 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=Hc2Qn xrR6OGlitOPGVxJiIL5zpQJJcXsEaKiUF7JdZiau0EiS6buVOwNXSnssVALoCoPc 618UHJ8lTMuq/6sJ0m6y8BVwGVkOS3OT0rIz1Laj0GUEUJ/+xUERDJHoJ/kqC97o 2crj2QpiyKXObKYakQPfQyotBX5NFAFKAgXQeU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=tBsLlvGta7a Agu/CSkJG++y4cys=; b=syd2+D+jRZgcvLGHw2vkIhjQmXmM1FGFRhTT4zoQvpg W4zG9MKv7ARU00i98fL5FSRgobOvEXGlj/4w+jsE/PikWQzvf2H5lThd6AKW/3Na 972ZAbzTl9iP5ADmOld2aRhpRfJoE2gCwMwfM22gQRRBzf+0L9r6mb7uqDjKVOm4 = Received: (qmail 74522 invoked by alias); 22 Aug 2019 13:46:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 74508 invoked by uid 89); 22 Aug 2019 13:46:51 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=non-signaling, nonsignaling X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:46:49 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDXhEB020088 for ; Thu, 22 Aug 2019 09:46:48 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0a-001b2d01.pphosted.com with ESMTP id 2uhuestbhk-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:46:48 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:46:44 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDkhbr44892276 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:46:43 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 391614203F; Thu, 22 Aug 2019 13:46:43 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0131C42049; Thu, 22 Aug 2019 13:46:43 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:46:42 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 3/9] Introduce can_vector_compare_p function Date: Thu, 22 Aug 2019 15:45:45 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0020-0000-0000-00000362843F X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0021-0000-0000-000021B7BFC9 Message-Id: <20190822134551.18924-4-iii@linux.ibm.com> X-IsSubscribed: yes z13 supports only non-signaling vector comparisons. This means we cannot vectorize LT, LE, GT, GE and LTGT when compiling for z13. However, we cannot express this restriction today: the code only checks whether vcond$a$b optab exists, which does not contain information about the operation. Introduce a function that checks whether back-end supports vector comparisons with individual rtx codes by matching vcond expander's third argument with a fake comparison with the corresponding rtx code. gcc/ChangeLog: 2019-08-21 Ilya Leoshkevich * Makefile.in (GTFILES): Add optabs.c. * optabs-tree.c (expand_vec_cond_expr_p): Use can_vector_compare_p. * optabs.c (binop_key): Binary operation cache key. (binop_hasher): Binary operation cache hasher. (cached_binops): Binary operation cache. (get_cached_binop): New function that returns a cached binary operation or creates a new one. (can_vector_compare_p): New function. * optabs.h (enum can_vector_compare_purpose): New enum. Not really needed today, but can be used to extend the support to e.g. vec_cmp if need arises. (can_vector_compare_p): New function. --- gcc/Makefile.in | 2 +- gcc/optabs-tree.c | 11 +++++-- gcc/optabs.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++ gcc/optabs.h | 15 +++++++++ 4 files changed, 104 insertions(+), 3 deletions(-) diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 597dc01328b..d2207da5657 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -2541,7 +2541,7 @@ GTFILES = $(CPPLIB_H) $(srcdir)/input.h $(srcdir)/coretypes.h \ $(srcdir)/function.c $(srcdir)/except.c \ $(srcdir)/ggc-tests.c \ $(srcdir)/gcse.c $(srcdir)/godump.c \ - $(srcdir)/lists.c $(srcdir)/optabs-libfuncs.c \ + $(srcdir)/lists.c $(srcdir)/optabs.c $(srcdir)/optabs-libfuncs.c \ $(srcdir)/profile.c $(srcdir)/mcf.c \ $(srcdir)/reg-stack.c $(srcdir)/cfgrtl.c \ $(srcdir)/stor-layout.c \ diff --git a/gcc/optabs-tree.c b/gcc/optabs-tree.c index 8157798cc71..e68bb39c021 100644 --- a/gcc/optabs-tree.c +++ b/gcc/optabs-tree.c @@ -23,7 +23,10 @@ along with GCC; see the file COPYING3. If not see #include "coretypes.h" #include "target.h" #include "insn-codes.h" +#include "rtl.h" #include "tree.h" +#include "memmodel.h" +#include "optabs.h" #include "optabs-tree.h" #include "stor-layout.h" @@ -347,8 +350,12 @@ expand_vec_cond_expr_p (tree value_type, tree cmp_op_type, enum tree_code code) || maybe_ne (GET_MODE_NUNITS (value_mode), GET_MODE_NUNITS (cmp_op_mode))) return false; - if (get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type), - TYPE_UNSIGNED (cmp_op_type)) == CODE_FOR_nothing + bool unsigned_p = TYPE_UNSIGNED (cmp_op_type); + if (((get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type), + unsigned_p) == CODE_FOR_nothing) + || !can_vector_compare_p (get_rtx_code (code, unsigned_p), + TYPE_MODE (value_type), + TYPE_MODE (cmp_op_type), cvcp_vcond)) && ((code != EQ_EXPR && code != NE_EXPR) || get_vcond_eq_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type)) == CODE_FOR_nothing)) diff --git a/gcc/optabs.c b/gcc/optabs.c index 9e54dda6e7f..07b4d824822 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -34,6 +34,7 @@ along with GCC; see the file COPYING3. If not see #include "recog.h" #include "diagnostic-core.h" #include "rtx-vector-builder.h" +#include "hash-table.h" /* Include insn-config.h before expr.h so that HAVE_conditional_move is properly defined. */ @@ -3819,6 +3820,82 @@ can_compare_p (enum rtx_code code, machine_mode mode, return 0; } +/* can_vector_compare_p presents fake rtx binary operations to the the back-end + in order to determine its capabilities. In order to avoid creating fake + operations on each call, values from previous calls are cached in a global + cached_binops hash_table. It contains rtxes, which can be looked up using + binop_keys. */ + +struct binop_key { + enum rtx_code code; /* Operation code. */ + machine_mode value_mode; /* Result mode. */ + machine_mode cmp_op_mode; /* Operand mode. */ +}; + +struct binop_hasher : pointer_hash_mark, ggc_cache_remove { + typedef rtx value_type; + typedef binop_key compare_type; + + static hashval_t + hash (enum rtx_code code, machine_mode value_mode, machine_mode cmp_op_mode) + { + inchash::hash hstate (0); + hstate.add_int (code); + hstate.add_int (value_mode); + hstate.add_int (cmp_op_mode); + return hstate.end (); + } + + static hashval_t + hash (const rtx &ref) + { + return hash (GET_CODE (ref), GET_MODE (ref), GET_MODE (XEXP (ref, 0))); + } + + static bool + equal (const rtx &ref1, const binop_key &ref2) + { + return (GET_CODE (ref1) == ref2.code) + && (GET_MODE (ref1) == ref2.value_mode) + && (GET_MODE (XEXP (ref1, 0)) == ref2.cmp_op_mode); + } +}; + +static GTY ((cache)) hash_table *cached_binops; + +static rtx +get_cached_binop (enum rtx_code code, machine_mode value_mode, + machine_mode cmp_op_mode) +{ + if (!cached_binops) + cached_binops = hash_table::create_ggc (1024); + binop_key key = { code, value_mode, cmp_op_mode }; + hashval_t hash = binop_hasher::hash (code, value_mode, cmp_op_mode); + rtx *slot = cached_binops->find_slot_with_hash (key, hash, INSERT); + if (!*slot) + *slot = gen_rtx_fmt_ee (code, value_mode, gen_reg_rtx (cmp_op_mode), + gen_reg_rtx (cmp_op_mode)); + return *slot; +} + +bool +can_vector_compare_p (enum rtx_code code, machine_mode value_mode, + machine_mode cmp_op_mode, + enum can_vector_compare_purpose purpose) +{ + enum insn_code icode; + bool unsigned_p = (code == LTU || code == LEU || code == GTU || code == GEU); + rtx test = get_cached_binop(code, value_mode, cmp_op_mode); + + if (purpose == cvcp_vcond + && (icode = get_vcond_icode (value_mode, cmp_op_mode, unsigned_p)) + != CODE_FOR_nothing + && insn_operand_matches (icode, 3, test)) + return true; + + return false; +} + /* This function is called when we are going to emit a compare instruction that compares the values found in X and Y, using the rtl operator COMPARISON. @@ -7481,3 +7558,5 @@ expand_jump_insn (enum insn_code icode, unsigned int nops, if (!maybe_expand_jump_insn (icode, nops, ops)) gcc_unreachable (); } + +#include "gt-optabs.h" diff --git a/gcc/optabs.h b/gcc/optabs.h index 897bb5d4443..2b2338a67af 100644 --- a/gcc/optabs.h +++ b/gcc/optabs.h @@ -242,6 +242,21 @@ enum can_compare_purpose (without splitting it into pieces). */ extern int can_compare_p (enum rtx_code, machine_mode, enum can_compare_purpose); + +/* The various uses that a vector comparison can have; used by + can_vector_compare_p. So far only vcond is defined, vec_cmp is a possible + future extension. */ +enum can_vector_compare_purpose +{ + cvcp_vcond +}; + +/* Return whether back-end can emit a vector comparison insn(s) using a given + CODE, with operands with CMP_OP_MODE, producing a result with VALUE_MODE, + in order to achieve a PURPOSE. */ +extern bool can_vector_compare_p (enum rtx_code, machine_mode, machine_mode, + enum can_vector_compare_purpose); + extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode, machine_mode, int); /* Emit a pair of rtl insns to compare two rtx's and to jump From patchwork Thu Aug 22 13:45:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151614 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507518-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="dKzAbI6b"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm713Qggz9s00 for ; Thu, 22 Aug 2019 23:47:25 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=ZTn9/ AXhoVpwzLkegsVZUxKGxLvGIhM948Y5FfIhNK8WyabaOfU2nY2duQAc9KmgjCmPU k8UQnCyIw9XtmgV5a6Rv/0kBI5FGo+ea84lKMVgqr5X/O0gbmsDrM178y45nOAcA jOobZZvrwkI6qtF3Mo8JVD6Tc5Pp1iLjqMB5os= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=fdHP6Jdjrvv Fowg2AcKe7sicpiw=; b=dKzAbI6brZvNJ1EUBl70yB1xlvRZZYFLfqSAAC7M+PP 1FG6ozFy+EC+F9LGkQzDV6zKxE8uKWwP20xAGoVto/5uMKJ+PkbFdQNj7IOiQxeZ JmJvGu1SD8Bk05rNpbmtyFYgY/Sxevxj9446AfqTyeZoxwRwtl9//Zg6lIZJ+A5Q = Received: (qmail 80643 invoked by alias); 22 Aug 2019 13:47:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 80476 invoked by uid 89); 22 Aug 2019 13:47:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:47:16 +0000 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDYsDC093677 for ; Thu, 22 Aug 2019 09:47:14 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0b-001b2d01.pphosted.com with ESMTP id 2uhsf2f88a-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:47:14 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:47:09 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDl8X445023516 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:47:09 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D37834204F; Thu, 22 Aug 2019 13:47:08 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id ADE114204C; Thu, 22 Aug 2019 13:47:08 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:47:08 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 4/9] S/390: Do not use signaling vector comparisons on z13 Date: Thu, 22 Aug 2019 15:45:46 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0012-0000-0000-000003418423 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0013-0000-0000-0000217BAF7E Message-Id: <20190822134551.18924-5-iii@linux.ibm.com> X-IsSubscribed: yes z13 supports only non-signaling vector comparisons. This means we cannot vectorize LT, LE, GT, GE and LTGT when compiling for z13. Notify middle-end about this using more restrictive operator predicate in vcond. gcc/ChangeLog: 2019-08-21 Ilya Leoshkevich * config/s390/vector.md (vcond_comparison_operator): New predicate. (vcond): Use vcond_comparison_operator. --- gcc/config/s390/vector.md | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 0702e1de835..d7a266c5605 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -614,10 +614,30 @@ operands[2] = GEN_INT (GET_MODE_NUNITS (mode) - 1); }) +(define_predicate "vcond_comparison_operator" + (match_operand 0 "comparison_operator") +{ + if (!HONOR_NANS (GET_MODE (XEXP (op, 0))) + && !HONOR_NANS (GET_MODE (XEXP (op, 1)))) + return true; + switch (GET_CODE (op)) + { + case LE: + case LT: + case GE: + case GT: + case LTGT: + /* Signaling vector comparisons are supported only on z14+. */ + return TARGET_Z14; + default: + return true; + } +}) + (define_expand "vcond" [(set (match_operand:V_HW 0 "register_operand" "") (if_then_else:V_HW - (match_operator 3 "comparison_operator" + (match_operator 3 "vcond_comparison_operator" [(match_operand:V_HW2 4 "register_operand" "") (match_operand:V_HW2 5 "nonmemory_operand" "")]) (match_operand:V_HW 1 "nonmemory_operand" "") From patchwork Thu Aug 22 13:45:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151615 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507519-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="xI2D/1al"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm7P1C6Mz9sNk for ; Thu, 22 Aug 2019 23:47:44 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=yes8w OHjbsf24bX0kPSNCjvlFQBVjAw6YG+xIN8QyuSGv9QJW19QpQDequhkCQABjCMeP XStfgoq5Y9tl8p4ULuLe37QIdtOuGQApApR1AL3xmhx80r/XupAnoA2KMxH6HNYp FsI7XTEABzMgSlV2OzPTvgUD9NrCyWfMrG5wXg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=/C7Bp3yARRi 0pjhg80zmPgfL+Jk=; b=xI2D/1alRBDVEwp+rcLN9zV56PWhutwEdpWRncsrgkH nrO4OYnYltStrkYxgV2ANbbF4yyShNd+sYHXzlh+xGvkQWUroJnaM8AQOhSt0+Jt NUohc0LVel2VDlPrRVMYAoaxeJblgCi1mggisPeBycaH67Ha0e7YW+sTjD5UIyAg = Received: (qmail 82936 invoked by alias); 22 Aug 2019 13:47:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 82928 invoked by uid 89); 22 Aug 2019 13:47:36 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=ck X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:47:35 +0000 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDZrxM076198 for ; Thu, 22 Aug 2019 09:47:34 -0400 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0b-001b2d01.pphosted.com with ESMTP id 2uhs8nqv8m-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:47:33 -0400 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:47:26 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDlP4744892336 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:47:25 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B0A4242041; Thu, 22 Aug 2019 13:47:25 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7B03F42045; Thu, 22 Aug 2019 13:47:25 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:47:25 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 5/9] S/390: Implement vcond expander for V1TI,V1TF Date: Thu, 22 Aug 2019 15:45:47 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0028-0000-0000-00000392823E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0029-0000-0000-00002454ADA5 Message-Id: <20190822134551.18924-6-iii@linux.ibm.com> X-IsSubscribed: yes Currently gcc does not emit wf{c,k}* instructions when comparing long double values. Middle-end actually adds them in the first place, but then veclower pass replaces them with floating point register pair operations, because the corresponding expander is missing. gcc/ChangeLog: 2019-08-09 Ilya Leoshkevich * config/s390/vector.md (vcondv1tiv1tf): New variant of vcond$a$b expander. --- gcc/config/s390/vector.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index d7a266c5605..ca5ec0dd3b0 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -649,6 +649,21 @@ DONE; }) +(define_expand "vcondv1tiv1tf" + [(set (match_operand:V1TI 0 "register_operand" "") + (if_then_else:V1TI + (match_operator 3 "vcond_comparison_operator" + [(match_operand:V1TF 4 "register_operand" "") + (match_operand:V1TF 5 "nonmemory_operand" "")]) + (match_operand:V1TI 1 "nonmemory_operand" "") + (match_operand:V1TI 2 "nonmemory_operand" "")))] + "TARGET_VXE" +{ + s390_expand_vcond (operands[0], operands[1], operands[2], + GET_CODE (operands[3]), operands[4], operands[5]); + DONE; +}) + (define_expand "vcondu" [(set (match_operand:V_HW 0 "register_operand" "") (if_then_else:V_HW From patchwork Thu Aug 22 13:45:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151616 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507520-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="y7tHGBa3"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm7b4yFxz9s00 for ; Thu, 22 Aug 2019 23:47:55 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=CHk7R liVqIOsjklv8yBhYxqbvlmysya8wNBw+p98SAvjretbSZ4zACwouFVsS7PYqu2zT J/r5tNaoAezJ/5S7vi65Ypu55XZyhvAEwg21sFG5oVFcHV8O/2u+fstH4gEKNWb3 c5oG584dfx2aadEeuuGwN2/MFpC/z9HFOJc8Ys= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=wCZJgZPIB1s 949l8qp8CQ/IaDlo=; b=y7tHGBa3BAXpo4+tGCOU2idfBO4oODOOnLQuWISWCOV lIOX6DfOe1DmIyGe02fkxS2MorlTw82oK1f53o8DZWRf7Lek1qM4bgxMhyi5V4jE 7fgo5ZjAyBd6KW6HfM2Ng2rHhTS6C/JKht24+oBNfnFIxozgRs+o6S6cPLqXATc4 = Received: (qmail 83683 invoked by alias); 22 Aug 2019 13:47:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 83610 invoked by uid 89); 22 Aug 2019 13:47:42 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.4 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Languages-Length:1468 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:47:40 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDXhCm020092 for ; Thu, 22 Aug 2019 09:47:39 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2uhuestcw1-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:47:39 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:47:34 +0100 Received: from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com [9.149.105.60]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDlXjv53870828 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:47:33 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3DB5042041; Thu, 22 Aug 2019 13:47:33 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1144A42045; Thu, 22 Aug 2019 13:47:33 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:47:33 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 6/9] S/390: Remove code duplication in vec_unordered Date: Thu, 22 Aug 2019 15:45:48 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0016-0000-0000-000002A18453 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0017-0000-0000-00003301BDD4 Message-Id: <20190822134551.18924-7-iii@linux.ibm.com> X-IsSubscribed: yes vec_unordered is vec_ordered plus a negation at the end. Reuse vec_unordered logic. gcc/ChangeLog: 2019-08-13 Ilya Leoshkevich * config/s390/vector.md (vec_unordered): Call gen_vec_ordered. --- gcc/config/s390/vector.md | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index ca5ec0dd3b0..1b66b8be61f 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -1581,15 +1581,15 @@ ; UNORDERED (a, b): !ORDERED (a, b) (define_expand "vec_unordered" - [(set (match_operand: 0 "register_operand" "=v") - (ge: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) (gt: (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior: (match_dup 0) (match_dup 3))) - (set (match_dup 0) (not: (match_dup 0)))] + [(match_operand: 0 "register_operand" "=v") + (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")] "TARGET_VX" { - operands[3] = gen_reg_rtx (mode); + emit_insn (gen_vec_ordered (operands[0], operands[1], operands[2])); + emit_insn (gen_rtx_SET (operands[0], + gen_rtx_NOT (mode, operands[0]))); + DONE; }) (define_expand "vec_unordered" From patchwork Thu Aug 22 13:45:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1151617 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507521-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="S72HrQQ7"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Dm7q71K0z9s00 for ; Thu, 22 Aug 2019 23:48:07 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=PmH0j tDQrzD7hlTmPfyprGrJgZoYUD3fe1pnsed4Ye68cSrTudxCmgMwoCxel2SxAUWVv 7qMXO8OSMZrjOzdXOrwkvKa3j1fWSqJDuUb3EzDLkdrFL62IbiFyvNUf/7enxLYC OGHoq51tJdQ+aZhRFJwWbYPMn9tceWxU+pHSDk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=CvjFiJGFIpp qweuX4Wu6i1o0kSA=; b=S72HrQQ7hbIdeep1BFBYm9Im0FaABrD0Kd14u2fib4y DirfGQuVw9/yvyWv7Vn2BKt+bodBdos0VQI6lCTSuQ8vcsKXbhPhKzEAF3k2Wodq MUVj/r1pg3Ji2eteKP8TtwzglNiP8fPinmFAKZpoGuJEdoiqFamerNreUB6lMB5Y = Received: (qmail 85656 invoked by alias); 22 Aug 2019 13:47:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 85578 invoked by uid 89); 22 Aug 2019 13:47:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Aug 2019 13:47:56 +0000 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7MDZuSA115341 for ; Thu, 22 Aug 2019 09:47:54 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0b-001b2d01.pphosted.com with ESMTP id 2uhtwsbp6b-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2019 09:47:54 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:47:51 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDlosp43057448 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:47:50 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 51ECC42042; Thu, 22 Aug 2019 13:47:50 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E53C42041; Thu, 22 Aug 2019 13:47:50 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:47:50 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 7/9] S/390: Remove code duplication in vec_* comparison expanders Date: Thu, 22 Aug 2019 15:45:49 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-4275-0000-0000-0000035BEB0B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-4276-0000-0000-0000386E1157 Message-Id: <20190822134551.18924-8-iii@linux.ibm.com> X-IsSubscribed: yes s390.md uses a lot of near-identical expanders that perform dispatching to other expanders based on operand types. Since the following patch would require even more of these, avoid copy-pasting the code by generating these expanders using an iterator. gcc/ChangeLog: 2019-08-09 Ilya Leoshkevich * config/s390/s390.c (s390_expand_vec_compare): Use gen_vec_cmpordered and gen_vec_cmpunordered. * config/s390/vector.md (vec_cmpuneq, vec_cmpltgt, vec_ordered, vec_unordered): Delete. (vec_ordered): Rename to vec_cmpordered. (vec_unordered): Rename to vec_cmpunordered. (vec_cmp): Generic dispatcher. --- gcc/config/s390/s390.c | 4 +-- gcc/config/s390/vector.md | 67 +++++++-------------------------------- 2 files changed, 13 insertions(+), 58 deletions(-) diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index fa17d7d5d08..f9817f6edaf 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -6523,10 +6523,10 @@ s390_expand_vec_compare (rtx target, enum rtx_code cond, emit_insn (gen_vec_cmpltgt (target, cmp_op1, cmp_op2)); return; case ORDERED: - emit_insn (gen_vec_ordered (target, cmp_op1, cmp_op2)); + emit_insn (gen_vec_cmpordered (target, cmp_op1, cmp_op2)); return; case UNORDERED: - emit_insn (gen_vec_unordered (target, cmp_op1, cmp_op2)); + emit_insn (gen_vec_cmpunordered (target, cmp_op1, cmp_op2)); return; default: break; } diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 1b66b8be61f..a093ae5c565 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -1507,22 +1507,6 @@ operands[3] = gen_reg_rtx (mode); }) -(define_expand "vec_cmpuneq" - [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "") - (match_operand 2 "register_operand" "")] - "TARGET_VX" -{ - if (GET_MODE (operands[1]) == V4SFmode) - emit_insn (gen_vec_cmpuneqv4sf (operands[0], operands[1], operands[2])); - else if (GET_MODE (operands[1]) == V2DFmode) - emit_insn (gen_vec_cmpuneqv2df (operands[0], operands[1], operands[2])); - else - gcc_unreachable (); - - DONE; -}) - ; LTGT a <> b -> a > b | b > a (define_expand "vec_cmpltgt" [(set (match_operand: 0 "register_operand" "=v") @@ -1535,24 +1519,8 @@ operands[3] = gen_reg_rtx (mode); }) -(define_expand "vec_cmpltgt" - [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "") - (match_operand 2 "register_operand" "")] - "TARGET_VX" -{ - if (GET_MODE (operands[1]) == V4SFmode) - emit_insn (gen_vec_cmpltgtv4sf (operands[0], operands[1], operands[2])); - else if (GET_MODE (operands[1]) == V2DFmode) - emit_insn (gen_vec_cmpltgtv2df (operands[0], operands[1], operands[2])); - else - gcc_unreachable (); - - DONE; -}) - ; ORDERED (a, b): a >= b | b > a -(define_expand "vec_ordered" +(define_expand "vec_cmpordered" [(set (match_operand: 0 "register_operand" "=v") (ge: (match_operand:VFT 1 "register_operand" "v") (match_operand:VFT 2 "register_operand" "v"))) @@ -1563,45 +1531,32 @@ operands[3] = gen_reg_rtx (mode); }) -(define_expand "vec_ordered" - [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "") - (match_operand 2 "register_operand" "")] - "TARGET_VX" -{ - if (GET_MODE (operands[1]) == V4SFmode) - emit_insn (gen_vec_orderedv4sf (operands[0], operands[1], operands[2])); - else if (GET_MODE (operands[1]) == V2DFmode) - emit_insn (gen_vec_orderedv2df (operands[0], operands[1], operands[2])); - else - gcc_unreachable (); - - DONE; -}) - ; UNORDERED (a, b): !ORDERED (a, b) -(define_expand "vec_unordered" +(define_expand "vec_cmpunordered" [(match_operand: 0 "register_operand" "=v") (match_operand:VFT 1 "register_operand" "v") (match_operand:VFT 2 "register_operand" "v")] "TARGET_VX" { - emit_insn (gen_vec_ordered (operands[0], operands[1], operands[2])); + emit_insn (gen_vec_cmpordered (operands[0], operands[1], operands[2])); emit_insn (gen_rtx_SET (operands[0], gen_rtx_NOT (mode, operands[0]))); DONE; }) -(define_expand "vec_unordered" +(define_code_iterator VEC_CODE_WITH_COMPLEX_EXPAND + [uneq ltgt ordered unordered]) + +(define_expand "vec_cmp" [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "") - (match_operand 2 "register_operand" "")] + (VEC_CODE_WITH_COMPLEX_EXPAND (match_operand 1 "register_operand" "") + (match_operand 2 "register_operand" ""))] "TARGET_VX" { if (GET_MODE (operands[1]) == V4SFmode) - emit_insn (gen_vec_unorderedv4sf (operands[0], operands[1], operands[2])); + emit_insn (gen_vec_cmpv4sf (operands[0], operands[1], operands[2])); else if (GET_MODE (operands[1]) == V2DFmode) - emit_insn (gen_vec_unorderedv2df (operands[0], operands[1], operands[2])); + emit_insn (gen_vec_cmpv2df (operands[0], operands[1], operands[2])); else gcc_unreachable (); From patchwork Thu Aug 22 13:45:50 2019 Content-Type: text/plain; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 22 Aug 2019 14:48:01 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7MDm09Y41091134 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Aug 2019 13:48:00 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0865442045; Thu, 22 Aug 2019 13:48:00 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C06614203F; Thu, 22 Aug 2019 13:47:59 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.99.241]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2019 13:47:59 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: richard.sandiford@arm.com, segher@kernel.crashing.org, Ilya Leoshkevich Subject: [PATCH v2 8/9] S/390: Use signaling FP comparison instructions Date: Thu, 22 Aug 2019 15:45:50 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0028-0000-0000-000003928243 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0029-0000-0000-00002454ADAB Message-Id: <20190822134551.18924-9-iii@linux.ibm.com> X-IsSubscribed: yes dg-torture.exp=inf-compare-1.c is failing, because (qNaN > +Inf) comparison is compiled to CDB instruction, which does not signal an invalid operation exception. KDB should have been used instead. This patch introduces a new CCmode and a new pattern in order to generate signaling instructions in this and similar cases. gcc/ChangeLog: 2019-08-09 Ilya Leoshkevich * config/s390/2827.md: Add new opcodes. * config/s390/2964.md: Likewise. * config/s390/3906.md: Likewise. * config/s390/8561.md: Likewise. * config/s390/s390-builtins.def (s390_vfchesb): Use the new vec_cmpgev4sf_quiet_nocc. (s390_vfchedb): Use the new vec_cmpgev2df_quiet_nocc. (s390_vfchsb): Use the new vec_cmpgtv4sf_quiet_nocc. (s390_vfchdb): Use the new vec_cmpgtv2df_quiet_nocc. (vec_cmplev4sf): Use the new vec_cmplev4sf_quiet_nocc. (vec_cmplev2df): Use the new vec_cmplev2df_quiet_nocc. (vec_cmpltv4sf): Use the new vec_cmpltv4sf_quiet_nocc. (vec_cmpltv2df): Use the new vec_cmpltv2df_quiet_nocc. * config/s390/s390-modes.def (CCSFPS): New mode. * config/s390/s390.c (s390_match_ccmode_set): Support CCSFPS. (s390_select_ccmode): Return CCSFPS for LT, LE, GT, GE and LTGT. (s390_branch_condition_mask): Reuse CCS for CCSFPS. (s390_expand_vec_compare): Use non-signaling patterns where necessary. (s390_reverse_condition): Support CCSFPS. * config/s390/s390.md (*cmp_ccsfps): New pattern. * config/s390/vector.md: (VFCMP_HW_OP): Remove. (asm_fcmp_op): Likewise. (*smaxv2df3_vx): Use pattern for quiet comparison. (*sminv2df3_vx): Likewise. (*vec_cmp_nocc): Remove. (*vec_cmpeq_quiet_nocc): New pattern. (vec_cmpgt_quiet_nocc): Likewise. (vec_cmplt_quiet_nocc): New expander. (vec_cmpge_quiet_nocc): New pattern. (vec_cmple_quiet_nocc): New expander. (*vec_cmpeq_signaling_nocc): New pattern. (*vec_cmpgt_signaling_nocc): Likewise. (*vec_cmpgt_signaling_finite_nocc): Likewise. (*vec_cmpge_signaling_nocc): Likewise. (*vec_cmpge_signaling_finite_nocc): Likewise. (vec_cmpungt): New expander. (vec_cmpunge): Likewise. (vec_cmpuneq): Use quiet patterns. (vec_cmpltgt): Allow only on z14+. (vec_cmpordered): Use quiet patterns. (vec_cmpunordered): Likewise. (VEC_CODE_WITH_COMPLEX_EXPAND): Add ungt and unge. gcc/testsuite/ChangeLog: 2019-08-09 Ilya Leoshkevich * gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust expectations. --- gcc/config/s390/2827.md | 14 +- gcc/config/s390/2964.md | 13 +- gcc/config/s390/3906.md | 17 +- gcc/config/s390/8561.md | 19 +- gcc/config/s390/s390-builtins.def | 16 +- gcc/config/s390/s390-modes.def | 8 + gcc/config/s390/s390.c | 34 ++-- gcc/config/s390/s390.md | 14 ++ gcc/config/s390/vector.md | 171 +++++++++++++++--- .../gcc.target/s390/vector/vec-scalar-cmp-1.c | 8 +- 10 files changed, 240 insertions(+), 74 deletions(-) diff --git a/gcc/config/s390/2827.md b/gcc/config/s390/2827.md index 3f63f82284d..aafe8e27339 100644 --- a/gcc/config/s390/2827.md +++ b/gcc/config/s390/2827.md @@ -44,7 +44,7 @@ (define_insn_reservation "zEC12_normal_fp" 8 (and (eq_attr "cpu" "zEC12") - (eq_attr "mnemonic" "lnebr,sdbr,sebr,clfxtr,adbr,aebr,celfbr,clfebr,lpebr,msebr,lndbr,clfdbr,cebr,maebr,ltebr,clfdtr,cdlgbr,cxlftr,lpdbr,cdfbr,lcebr,clfxbr,msdbr,cdbr,madbr,meebr,clgxbr,clgdtr,ledbr,cegbr,cdlftr,cdlgtr,mdbr,clgebr,ltdbr,cdlfbr,cdgbr,clgxtr,lcdbr,celgbr,clgdbr,ldebr,cefbr,fidtr,fixtr,madb,msdb,mseb,fiebra,fidbra,aeb,mdb,seb,cdb,tcdb,sdb,adb,tceb,maeb,ceb,meeb,ldeb")) "nothing") + (eq_attr "mnemonic" "lnebr,sdbr,sebr,clfxtr,adbr,aebr,celfbr,clfebr,lpebr,msebr,lndbr,clfdbr,cebr,maebr,ltebr,clfdtr,cdlgbr,cxlftr,lpdbr,cdfbr,lcebr,clfxbr,msdbr,cdbr,madbr,meebr,clgxbr,clgdtr,ledbr,cegbr,cdlftr,cdlgtr,mdbr,clgebr,ltdbr,cdlfbr,cdgbr,clgxtr,lcdbr,celgbr,clgdbr,ldebr,cefbr,fidtr,fixtr,madb,msdb,mseb,fiebra,fidbra,aeb,mdb,seb,cdb,tcdb,sdb,adb,tceb,maeb,ceb,meeb,ldeb,keb,kebr,kdb,kdbr")) "nothing") (define_insn_reservation "zEC12_cgdbr" 2 (and (eq_attr "cpu" "zEC12") @@ -426,6 +426,10 @@ (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cxbr")) "nothing") +(define_insn_reservation "zEC12_kxbr" 18 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kxbr")) "nothing") + (define_insn_reservation "zEC12_ddbr" 36 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "ddbr")) "nothing") @@ -578,10 +582,18 @@ (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cdtr")) "nothing") +(define_insn_reservation "zEC12_kdtr" 11 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kdtr")) "nothing") + (define_insn_reservation "zEC12_cxtr" 14 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cxtr")) "nothing") +(define_insn_reservation "zEC12_kxtr" 14 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kxtr")) "nothing") + (define_insn_reservation "zEC12_slbg" 3 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "slbg")) "nothing") diff --git a/gcc/config/s390/2964.md b/gcc/config/s390/2964.md index a7897bcf58a..4396e3ba1c0 100644 --- a/gcc/config/s390/2964.md +++ b/gcc/config/s390/2964.md @@ -69,7 +69,7 @@ ng,ni,niy,ntstg,ny,o,og,oi,oiy,oy,s,sar,sdb,seb,sfpc,sg,sgf,sh,shy,sl,\ slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,stey,stg,stgrl,\ sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,tabort,tm,tmy,vl,\ vlbb,vleb,vlef,vleg,vleh,vll,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,\ -vlrepf,vlrepg,vlreph,vst,vstl,x,xg,xi,xiy,xy") +vlrepf,vlrepg,vlreph,vst,vstl,x,xg,xi,xiy,xy,kdb") (const_int 1)] (const_int 0))) (define_attr "z13_unit_vfu" "" @@ -109,7 +109,8 @@ vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,wcdgb,wcdlgb,wcgdb,wclgdb,wfadb,\ wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexbs,wfchdb,wfchedb,wfchesb,wfchexb,\ wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfisb,wfixb,wflcdb,wflcsb,wflcxb,wflld,\ wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmadb,wfmasb,wfmaxb,wfmdb,wfmsb,\ -wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb") +wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb,kebr,kdb,kdbr,kxbr,\ +kdtr,kxtr,wfkdb,wfksb") (const_int 1)] (const_int 0))) (define_attr "z13_cracked" "" @@ -131,7 +132,7 @@ stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,ml,mlg,\ mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,sfpc,slb,slbg,slbgr,slbr,\ -sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "z13_endgroup" "" @@ -198,7 +199,7 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlvgp,\ vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,vslb,vsrab,vsrlb,wfcdb,wfcexbs,\ -wfchexbs,wfchxbs,wfcsb")) "nothing") +wfchexbs,wfchxbs,wfcsb,kebr,kdb,kdbr,wfkdb,wfksb")) "nothing") (define_insn_reservation "z13_3" 3 (and (eq_attr "cpu" "z13") @@ -232,7 +233,7 @@ wfmdb,wfmsb,wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb")) "nothing (and (eq_attr "cpu" "z13") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,msg,msgr,sdtr,tdcdt,tdcet,\ vcdgb,vcdlgb,vcgdb,vclgdb,vfadb,vfasb,vfidb,vfisb,vfmadb,vfmasb,vfmdb,vfmsb,\ -vfmsdb,vfmssb,vfsdb,vfssb,vldeb,vledb")) "nothing") +vfmsdb,vfmssb,vfsdb,vfssb,vldeb,vledb,kdtr")) "nothing") (define_insn_reservation "z13_8" 8 (and (eq_attr "cpu" "z13") @@ -254,7 +255,7 @@ celgbr,flogr,m,madb,maeb,maebr,mfy,ml,mlr,mr,msdb,mseb,msebr")) "nothing") (define_insn_reservation "z13_12" 12 (and (eq_attr "cpu" "z13") (eq_attr "mnemonic" "cfdbr,cfebr,cgdbr,cgebr,clfdbr,clfebr,clgdbr,\ -clgebr,cxbr,cxtr,mlg,mlgr,tcxb,tdcxt")) "nothing") +clgebr,cxbr,cxtr,mlg,mlgr,tcxb,tdcxt,kxbr,kxtr")) "nothing") (define_insn_reservation "z13_13" 13 (and (eq_attr "cpu" "z13") diff --git a/gcc/config/s390/3906.md b/gcc/config/s390/3906.md index 8cb4565ee22..1212d8b61f1 100644 --- a/gcc/config/s390/3906.md +++ b/gcc/config/s390/3906.md @@ -71,7 +71,7 @@ sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,\ stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,\ tabort,tm,tmy,vl,vlbb,vleb,vlef,vleg,vleh,vll,vllezb,vllezf,vllezg,vllezh,\ vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr,vst,vstl,vstrl,vstrlr,x,xg,xi,\ -xiy,xy") +xiy,xy,kdb") (const_int 1)] (const_int 0))) (define_attr "z14_unit_vfu" "" @@ -113,7 +113,8 @@ wfadb,wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexbs,wfchdb,wfchedb,wfchesb,\ wfchexb,wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfisb,wfixb,wflcdb,wflcsb,wflcxb,\ wflld,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmadb,wfmasb,wfmaxb,\ wfmaxxb,wfmdb,wfminxb,wfmsb,wfmsdb,wfmssb,wfmsxb,wfmxb,wfnmaxb,wfnmsxb,wfsdb,\ -wfssb,wfsxb,wldeb,wledb") +wfssb,wfsxb,wldeb,wledb,kebr,kdb,kdbr,kxbr,kdtr,kxtr,wfkdb,wfksb,vfkesb,\ +vfkedb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb") (const_int 1)] (const_int 0))) (define_attr "z14_cracked" "" @@ -135,7 +136,7 @@ stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\ ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,ppa,sfpc,slb,slbg,\ -slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "z14_endgroup" "" @@ -192,7 +193,8 @@ vrepig,vrepih,vsb,vsbiq,vscbib,vscbif,vscbig,vscbih,vscbiq,vsegb,vsegf,vsegh,\ vsel,vsf,vsg,vsh,vsl,vslb,vsldb,vsq,vsra,vsrab,vsrl,vsrlb,vuphb,vuphf,\ vuphh,vuplb,vuplf,vuplhb,vuplhf,vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,\ wfcedb,wfcesb,wfchdb,wfchedb,wfchesb,wfchexb,wfchsb,wfchxb,wflcdb,wflcsb,\ -wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,xiy")) "nothing") +wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,xiy,\ +vfkesb,vfkedb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb")) "nothing") (define_insn_reservation "z14_2" 2 (and (eq_attr "cpu" "z14") @@ -204,7 +206,7 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vlgvf,vlgvg,vlgvh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,\ vlrepg,vlreph,vlrl,vlvgp,vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,wfcdb,\ -wfcexbs,wfchexbs,wfchxbs,wfcsb")) "nothing") +wfcexbs,wfchexbs,wfchxbs,wfcsb,kebr,kdb,kdbr,wfkdb,wfksb")) "nothing") (define_insn_reservation "z14_3" 3 (and (eq_attr "cpu" "z14") @@ -238,7 +240,8 @@ wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing") (define_insn_reservation "z14_7" 7 (and (eq_attr "cpu" "z14") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,msgrkc,sdtr,tdcdt,tdcet,\ -vfasb,vfisb,vfmasb,vfmsb,vfmssb,vfnmssb,vfssb,vgef,vgeg,wflld")) "nothing") +vfasb,vfisb,vfmasb,vfmsb,vfmssb,vfnmssb,vfssb,vgef,vgeg,wflld,kdtr")) +"nothing") (define_insn_reservation "z14_8" 8 (and (eq_attr "cpu" "z14") @@ -261,7 +264,7 @@ celgbr,madb,maeb,maebr,msdb,mseb,msebr,vscef,vsceg")) "nothing") (define_insn_reservation "z14_12" 12 (and (eq_attr "cpu" "z14") (eq_attr "mnemonic" "cfdbr,cfebr,cgdbr,cgebr,clfdbr,clfebr,clgdbr,\ -clgebr,cxbr,cxtr,tcxb,tdcxt")) "nothing") +clgebr,cxbr,cxtr,tcxb,tdcxt,kxbr,kxtr")) "nothing") (define_insn_reservation "z14_13" 13 (and (eq_attr "cpu" "z14") diff --git a/gcc/config/s390/8561.md b/gcc/config/s390/8561.md index e5a345f4dba..91a92b6bc5c 100644 --- a/gcc/config/s390/8561.md +++ b/gcc/config/s390/8561.md @@ -70,7 +70,7 @@ sar,sdb,seb,sfpc,sg,sgf,sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,\ stc,stcy,std,stdy,ste,stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,\ strvg,strvh,sty,sy,tabort,tm,tmy,vl,vlbb,vleb,vlef,vleg,vleh,vll,vllezb,\ vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr,vst,\ -vstef,vsteg,vstl,vstrl,vstrlr,x,xg,xi,xiy,xy") +vstef,vsteg,vstl,vstrl,vstrlr,x,xg,xi,xiy,xy,keb,kdb") (const_int 1)] (const_int 0))) (define_attr "arch13_unit_vfu" "" @@ -112,7 +112,9 @@ vupllf,vupllh,vx,vzero,wfadb,wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexb,wfcexbs,\ wfchdb,wfchedb,wfchesb,wfchexb,wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfidb,\ wfisb,wfixb,wflcdb,wflcsb,wflcxb,wflld,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,\ wflpxb,wfmadb,wfmasb,wfmaxb,wfmaxxb,wfmdb,wfminxb,wfmsb,wfmsdb,wfmssb,wfmsxb,\ -wfmxb,wfnmaxb,wfnmsxb,wfsdb,wfssb,wfsxb,wldeb,wledb") +wfmxb,wfnmaxb,wfnmsxb,wfsdb,wfssb,wfsxb,wldeb,wledb,keb,kebr,kdb,kdbr,kxbr,\ +kdtr,kxtr,wfkdb,wfksb,vfkesb,vfkedb,wfkexb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,\ +vfkhedb,wfkhexb") (const_int 1)] (const_int 0))) (define_attr "arch13_cracked" "" @@ -134,7 +136,7 @@ stam,stm,stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\ ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,nc,oc,ppa,sfpc,slb,slbg,\ -slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "arch13_endgroup" "" @@ -194,7 +196,8 @@ vsel,vsf,vsg,vsh,vsl,vslb,vsldb,vsq,vsra,vsrab,vsrl,vsrlb,vuphb,vuphf,\ vuphh,vuplb,vuplf,vuplhb,vuplhf,vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,\ wfcedb,wfcesb,wfcexb,wfchdb,wfchedb,wfchesb,wfchexb,wfchsb,wfchxb,wflcdb,\ wflcsb,wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,\ -xiy")) "nothing") +xiy,vfkesb,vfkedb,wfkexb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb")) +"nothing") (define_insn_reservation "arch13_2" 2 (and (eq_attr "cpu" "arch13") @@ -206,7 +209,8 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vlgvb,vlgvf,vlgvg,vlgvh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,\ vlrepf,vlrepg,vlreph,vlrl,vlvgp,vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,\ -wfcdb,wfcexbs,wfchexbs,wfchxbs,wfcsb")) "nothing") +wfcdb,wfcexbs,wfchexbs,wfchxbs,wfcsb,keb,kebr,kdb,kdbr,wfkdb,wfksb")) +"nothing") (define_insn_reservation "arch13_3" 3 (and (eq_attr "cpu" "arch13") @@ -240,7 +244,7 @@ wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing") (define_insn_reservation "arch13_7" 7 (and (eq_attr "cpu" "arch13") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,ltdtr,msgrkc,sdtr,tdcdt,\ -tdcet,vgef,vgeg")) "nothing") +tdcet,vgef,vgeg,kdtr")) "nothing") (define_insn_reservation "arch13_8" 8 (and (eq_attr "cpu" "arch13") @@ -263,7 +267,8 @@ clgebr,mg,mgrk,mlg,mlgr")) "nothing") (define_insn_reservation "arch13_12" 12 (and (eq_attr "cpu" "arch13") -(eq_attr "mnemonic" "cxbr,cxftr,cxlftr,cxtr,tcxb,tdcxt")) "nothing") +(eq_attr "mnemonic" "cxbr,cxftr,cxlftr,cxtr,tcxb,tdcxt,kxbr,kxtr")) +"nothing") (define_insn_reservation "arch13_13" 13 (and (eq_attr "cpu" "arch13") diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def index cfc69651b0d..013cac0206a 100644 --- a/gcc/config/s390/s390-builtins.def +++ b/gcc/config/s390/s390-builtins.def @@ -1495,8 +1495,8 @@ B_DEF (vec_cmpgev4si, vec_cmpgev4si, 0, B_DEF (vec_cmpgeuv4si, vec_cmpgeuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmpgev2di, vec_cmpgev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpgeuv2di, vec_cmpgeuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (s390_vfchesb, vec_cmpgev4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (s390_vfchedb, vec_cmpgev2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (s390_vfchesb, vec_cmpgev4sf_quiet_nocc,0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (s390_vfchedb, vec_cmpgev2df_quiet_nocc,0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmpgt, s390_vec_cmpgt_s8, s390_vec_cmpgt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmpgt_s8, s390_vchb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1518,8 +1518,8 @@ B_DEF (s390_vchf, vec_cmpgtv4si, 0, B_DEF (s390_vchlf, vec_cmpgtuv4si, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (s390_vchg, vec_cmpgtv2di, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI) B_DEF (s390_vchlg, vec_cmpgtuv2di, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (s390_vfchsb, vec_cmpgtv4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (s390_vfchdb, vec_cmpgtv2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (s390_vfchsb, vec_cmpgtv4sf_quiet_nocc,0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (s390_vfchdb, vec_cmpgtv2df_quiet_nocc,0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmple, s390_vec_cmple_s8, s390_vec_cmple_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmple_s8, vec_cmplev16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1541,8 +1541,8 @@ B_DEF (vec_cmplev4si, vec_cmplev4si, 0, B_DEF (vec_cmpleuv4si, vec_cmpleuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmplev2di, vec_cmplev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpleuv2di, vec_cmpleuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmplev4sf, vec_cmplev4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (vec_cmplev2df, vec_cmplev2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (vec_cmplev4sf, vec_cmplev4sf_quiet_nocc,0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmplev2df, vec_cmplev2df_quiet_nocc,0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmplt, s390_vec_cmplt_s8, s390_vec_cmplt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmplt_s8, vec_cmpltv16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1564,8 +1564,8 @@ B_DEF (vec_cmpltv4si, vec_cmpltv4si, 0, B_DEF (vec_cmpltuv4si, vec_cmpltuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmpltv2di, vec_cmpltv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpltuv2di, vec_cmpltuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpltv4sf, vec_cmpltv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (vec_cmpltv2df, vec_cmpltv2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (vec_cmpltv4sf, vec_cmpltv4sf_quiet_nocc,0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmpltv2df, vec_cmpltv2df_quiet_nocc,0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cntlz, s390_vec_cntlz_s8, s390_vec_cntlz_u64, B_VX, BT_FN_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cntlz_s8, s390_vclzb, 0, 0, BT_OV_UV16QI_V16QI) diff --git a/gcc/config/s390/s390-modes.def b/gcc/config/s390/s390-modes.def index 7b7c1141449..2d9cd9b5945 100644 --- a/gcc/config/s390/s390-modes.def +++ b/gcc/config/s390/s390-modes.def @@ -52,6 +52,8 @@ CCS: EQ LT GT UNORDERED (LTGFR, LTGR, LTR, ICM/Y, ADB/R, AEB/R, SDB/R, SEB/R, SRAG, SRA, SRDA) CCSR: EQ GT LT UNORDERED (CGF/R, CH/Y) +CCSFPS: EQ GT LT UNORDERED (KEB/R, KDB/R, KXBR, KDTR, + KXTR, WFK) Condition codes resulting from add with overflow @@ -140,6 +142,11 @@ around. The following both modes can be considered as CCS and CCU modes with exchanged operands. +CCSFPS + +This mode is used for signaling rtxes: LT, LE, GT, GE and LTGT. + + CCL1, CCL2 These modes represent the result of overflow checks. @@ -226,6 +233,7 @@ CC_MODE (CCU); CC_MODE (CCUR); CC_MODE (CCS); CC_MODE (CCSR); +CC_MODE (CCSFPS); CC_MODE (CCT); CC_MODE (CCT1); CC_MODE (CCT2); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index f9817f6edaf..9fe1131bd98 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -1376,6 +1376,7 @@ s390_match_ccmode_set (rtx set, machine_mode req_mode) case E_CCZ1mode: case E_CCSmode: case E_CCSRmode: + case E_CCSFPSmode: case E_CCUmode: case E_CCURmode: case E_CCOmode: @@ -1559,6 +1560,12 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) else return CCAPmode; } + + /* Fall through. */ + case LTGT: + if (HONOR_NANS (op0) || HONOR_NANS (op1)) + return CCSFPSmode; + /* Fall through. */ case UNORDERED: case ORDERED: @@ -1567,7 +1574,6 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) case UNLT: case UNGE: case UNGT: - case LTGT: if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND) && GET_CODE (op1) != CONST_INT) return CCSRmode; @@ -2082,6 +2088,7 @@ s390_branch_condition_mask (rtx code) break; case E_CCSmode: + case E_CCSFPSmode: switch (GET_CODE (code)) { case EQ: return CC0; @@ -6504,18 +6511,23 @@ s390_expand_vec_compare (rtx target, enum rtx_code cond, { /* NE a != b -> !(a == b) */ case NE: cond = EQ; neg_p = true; break; - /* UNGT a u> b -> !(b >= a) */ - case UNGT: cond = GE; neg_p = true; swap_p = true; break; - /* UNGE a u>= b -> !(b > a) */ - case UNGE: cond = GT; neg_p = true; swap_p = true; break; - /* LE: a <= b -> b >= a */ + case UNGT: + emit_insn (gen_vec_cmpungt (target, cmp_op1, cmp_op2)); + return; + case UNGE: + emit_insn (gen_vec_cmpunge (target, cmp_op1, cmp_op2)); + return; case LE: cond = GE; swap_p = true; break; - /* UNLE: a u<= b -> !(a > b) */ - case UNLE: cond = GT; neg_p = true; break; + /* UNLE: (a u<= b) -> (b u>= a). */ + case UNLE: + emit_insn (gen_vec_cmpunge (target, cmp_op2, cmp_op1)); + return; /* LT: a < b -> b > a */ case LT: cond = GT; swap_p = true; break; - /* UNLT: a u< b -> !(a >= b) */ - case UNLT: cond = GE; neg_p = true; break; + /* UNLT: (a u< b) -> (b u> a). */ + case UNLT: + emit_insn (gen_vec_cmpungt (target, cmp_op2, cmp_op1)); + return; case UNEQ: emit_insn (gen_vec_cmpuneq (target, cmp_op1, cmp_op2)); return; @@ -6678,7 +6690,7 @@ s390_reverse_condition (machine_mode mode, enum rtx_code code) { /* Reversal of FP compares takes care -- an ordered compare becomes an unordered compare and vice versa. */ - if (mode == CCVFALLmode || mode == CCVFANYmode) + if (mode == CCVFALLmode || mode == CCVFANYmode || mode == CCSFPSmode) return reverse_condition_maybe_unordered (code); else if (mode == CCVIALLmode || mode == CCVIANYmode) return reverse_condition (code); diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index e4516f6c378..bf3e051dbae 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1424,6 +1424,20 @@ (set_attr "cpu_facility" "*,*,vx,vxe") (set_attr "enabled" "*,,,")]) +(define_insn "*cmp_ccsfps" + [(set (reg CC_REGNUM) + (compare (match_operand:FP 0 "register_operand" "f,f,v,v") + (match_operand:FP 1 "general_operand" "f,R,v,v")))] + "s390_match_ccmode (insn, CCSFPSmode) && TARGET_HARD_FLOAT" + "@ + kr\t%0,%1 + kb\t%0,%1 + wfkdb\t%0,%1 + wfksb\t%0,%1" + [(set_attr "op_type" "RRE,RXE,VRR,VRR") + (set_attr "cpu_facility" "*,*,vx,vxe") + (set_attr "enabled" "*,,,")]) + ; Compare and Branch instructions ; cij, cgij, crj, cgrj, cfi, cgfi, cr, cgr diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index a093ae5c565..7f33d34e726 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -168,10 +168,6 @@ (define_mode_attr vec_halfnumelts [(V4SF "V2SF") (V4SI "V2SI")]) -; The comparisons not setting CC iterate over the rtx code. -(define_code_iterator VFCMP_HW_OP [eq gt ge]) -(define_code_attr asm_fcmp_op [(eq "e") (gt "h") (ge "he")]) - ; Comparison operators on int and fp compares which are directly @@ -1392,7 +1388,8 @@ "#" "&& 1" [(set (match_dup 3) - (gt:V2DI (match_dup 1) (match_dup 2))) + (not:V2DI + (unge:V2DI (match_dup 2) (match_dup 1)))) (set (match_dup 0) (if_then_else:V2DF (eq (match_dup 3) (match_dup 4)) @@ -1427,7 +1424,8 @@ "#" "&& 1" [(set (match_dup 3) - (gt:V2DI (match_dup 1) (match_dup 2))) + (not:V2DI + (unge:V2DI (match_dup 2) (match_dup 1)))) (set (match_dup 0) (if_then_else:V2DF (eq (match_dup 3) (match_dup 4)) @@ -1481,27 +1479,134 @@ ;; Floating point compares ;; -; EQ, GT, GE -; vfcesb, vfcedb, wfcexb, vfchsb, vfchdb, wfchxb, vfchesb, vfchedb, wfchexb -(define_insn "*vec_cmp_nocc" - [(set (match_operand: 0 "register_operand" "=v") - (VFCMP_HW_OP: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v")))] - "TARGET_VX" - "fcb\t%v0,%v1,%v2" +; vfcesb, vfcedb, wfcexb: non-signaling "==" comparison (a == b) +(define_insn "*vec_cmpeq_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (eq: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX" + "fceb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfchsb, vfchdb, wfchxb: non-signaling > comparison (!(b u>= a)) +(define_insn "vec_cmpgt_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v"))))] + "TARGET_VX" + "fchb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_expand "vec_cmplt_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v"))))] + "TARGET_VX") + +; vfchesb, vfchedb, wfchexb: non-signaling >= comparison (!(a u< b)) +(define_insn "vec_cmpge_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v"))))] + "TARGET_VX" + "fcheb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_expand "vec_cmple_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v"))))] + "TARGET_VX") + +; vfkesb, vfkedb, wfkexb: signaling == comparison ((a >= b) & (b >= a)) +(define_insn "*vec_cmpeq_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (and: + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")) + (ge: (match_dup 2) + (match_dup 1))))] + "TARGET_VXE" + "fkeb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfkhsb, vfkhdb, wfkhxb: signaling > comparison (a > b) +(define_insn "*vec_cmpgt_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (gt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VXE" + "fkhb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_insn "*vec_cmpgt_signaling_finite_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (gt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX && !TARGET_VXE && flag_finite_math_only" + "fchb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfkhesb, vfkhedb, wfkhexb: signaling >= comparison (a >= b) +(define_insn "*vec_cmpge_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VXE" + "fkheb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_insn "*vec_cmpge_signaling_finite_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX && !TARGET_VXE && flag_finite_math_only" + "fcheb\t%v0,%v1,%v2" [(set_attr "op_type" "VRR")]) ; Expanders for not directly supported comparisons +; Signaling comparisons must be expressed via signaling rtxes only, +; and quiet comparisons must be expressed via quiet rtxes only. + +; UNGT a u> b -> !!(b u< a) +(define_expand "vec_cmpungt" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v")))) + (set (match_dup 0) + (not: (match_dup 0)))] + "TARGET_VX") -; UNEQ a u== b -> !(a > b | b > a) +; UNGE a u>= b -> !!(a u>= b) +(define_expand "vec_cmpunge" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 0) + (not: (match_dup 0)))] + "TARGET_VX") + +; UNEQ a u== b -> !(!(a u>= b) | !(b u>= a)) (define_expand "vec_cmpuneq" - [(set (match_operand: 0 "register_operand" "=v") - (gt: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) - (gt: (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior: (match_dup 0) (match_dup 3))) - (set (match_dup 0) (not: (match_dup 0)))] + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 3) + (not: + (unge: (match_dup 2) + (match_dup 1)))) + (set (match_dup 0) + (ior: (match_dup 0) + (match_dup 3))) + (set (match_dup 0) + (not: (match_dup 0)))] "TARGET_VX" { operands[3] = gen_reg_rtx (mode); @@ -1514,18 +1619,24 @@ (match_operand:VFT 2 "register_operand" "v"))) (set (match_dup 3) (gt: (match_dup 2) (match_dup 1))) (set (match_dup 0) (ior: (match_dup 0) (match_dup 3)))] - "TARGET_VX" + "TARGET_VXE" { operands[3] = gen_reg_rtx (mode); }) -; ORDERED (a, b): a >= b | b > a +; ORDERED (a, b): !(a u< b) | !(a u>= b) (define_expand "vec_cmpordered" - [(set (match_operand: 0 "register_operand" "=v") - (ge: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) (gt: (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior: (match_dup 0) (match_dup 3)))] + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 3) + (not: + (unge: (match_dup 1) + (match_dup 2)))) + (set (match_dup 0) + (ior: (match_dup 0) + (match_dup 3)))] "TARGET_VX" { operands[3] = gen_reg_rtx (mode); @@ -1545,7 +1656,7 @@ }) (define_code_iterator VEC_CODE_WITH_COMPLEX_EXPAND - [uneq ltgt ordered unordered]) + [ungt unge uneq ltgt ordered unordered]) (define_expand "vec_cmp" [(match_operand 0 "register_operand" "") diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c index ea51d0c86af..073d574aa5e 100644 --- a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c @@ -34,7 +34,7 @@ gt (double a, double b) return a > b; } -/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */ +/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */ int ge (double a, double b) @@ -45,7 +45,7 @@ ge (double a, double b) return a >= b; } -/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */ +/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */ int lt (double a, double b) @@ -56,7 +56,7 @@ lt (double a, double b) return a < b; } -/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */ +/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */ int le (double a, double b) @@ -67,4 +67,4 @@ le (double a, double b) return a <= b; } -/* { dg-final { scan-assembler "le:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */ +/* { dg-final { scan-assembler "le:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */ From patchwork Thu Aug 22 13:45:51 2019 Content-Type: text/plain; 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v2 9/9] S/390: Test signaling FP comparison instructions Date: Thu, 22 Aug 2019 15:45:51 +0200 In-Reply-To: <20190822134551.18924-1-iii@linux.ibm.com> References: <20190822134551.18924-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082213-0012-0000-0000-000003418430 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082213-0013-0000-0000-0000217BAF8D Message-Id: <20190822134551.18924-10-iii@linux.ibm.com> X-IsSubscribed: yes gcc/testsuite/ChangeLog: 2019-08-09 Ilya Leoshkevich * gcc.target/s390/s390.exp: Enable Fortran tests. * gcc.target/s390/zvector/autovec-double-quiet-eq.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-ge.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-gt.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-le.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-lt.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-ordered.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-uneq.c: New test. * gcc.target/s390/zvector/autovec-double-quiet-unordered.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-eq-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-eq-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-eq.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ge-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ge-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ge.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-gt-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-gt-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-gt.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-le-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-le-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-le.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-lt-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-lt-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-lt.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13-finite.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13.c: New test. * gcc.target/s390/zvector/autovec-double-signaling-ltgt.c: New test. * gcc.target/s390/zvector/autovec-double-smax-z13.F90: New test. * gcc.target/s390/zvector/autovec-double-smax.F90: New test. * gcc.target/s390/zvector/autovec-double-smin-z13.F90: New test. * gcc.target/s390/zvector/autovec-double-smin.F90: New test. * gcc.target/s390/zvector/autovec-float-quiet-eq.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-ge.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-gt.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-le.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-lt.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-ordered.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-uneq.c: New test. * gcc.target/s390/zvector/autovec-float-quiet-unordered.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-eq.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-ge.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-gt.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-le.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-lt.c: New test. * gcc.target/s390/zvector/autovec-float-signaling-ltgt.c: New test. * gcc.target/s390/zvector/autovec-fortran.h: New test. * gcc.target/s390/zvector/autovec-long-double-signaling-ge.c: New test. * gcc.target/s390/zvector/autovec-long-double-signaling-gt.c: New test. * gcc.target/s390/zvector/autovec-long-double-signaling-le.c: New test. * gcc.target/s390/zvector/autovec-long-double-signaling-lt.c: New test. * gcc.target/s390/zvector/autovec.h: New test. --- gcc/testsuite/gcc.target/s390/s390.exp | 8 ++++ .../s390/zvector/autovec-double-quiet-eq.c | 8 ++++ .../s390/zvector/autovec-double-quiet-ge.c | 8 ++++ .../s390/zvector/autovec-double-quiet-gt.c | 8 ++++ .../s390/zvector/autovec-double-quiet-le.c | 8 ++++ .../s390/zvector/autovec-double-quiet-lt.c | 8 ++++ .../zvector/autovec-double-quiet-ordered.c | 10 +++++ .../s390/zvector/autovec-double-quiet-uneq.c | 10 +++++ .../zvector/autovec-double-quiet-unordered.c | 11 +++++ .../autovec-double-signaling-eq-z13-finite.c | 10 +++++ .../zvector/autovec-double-signaling-eq-z13.c | 9 ++++ .../zvector/autovec-double-signaling-eq.c | 11 +++++ .../autovec-double-signaling-ge-z13-finite.c | 10 +++++ .../zvector/autovec-double-signaling-ge-z13.c | 9 ++++ .../zvector/autovec-double-signaling-ge.c | 8 ++++ .../autovec-double-signaling-gt-z13-finite.c | 10 +++++ .../zvector/autovec-double-signaling-gt-z13.c | 9 ++++ .../zvector/autovec-double-signaling-gt.c | 8 ++++ .../autovec-double-signaling-le-z13-finite.c | 10 +++++ .../zvector/autovec-double-signaling-le-z13.c | 9 ++++ .../zvector/autovec-double-signaling-le.c | 8 ++++ .../autovec-double-signaling-lt-z13-finite.c | 10 +++++ .../zvector/autovec-double-signaling-lt-z13.c | 9 ++++ .../zvector/autovec-double-signaling-lt.c | 8 ++++ ...autovec-double-signaling-ltgt-z13-finite.c | 9 ++++ .../autovec-double-signaling-ltgt-z13.c | 9 ++++ .../zvector/autovec-double-signaling-ltgt.c | 9 ++++ .../s390/zvector/autovec-double-smax-z13.F90 | 11 +++++ .../s390/zvector/autovec-double-smax.F90 | 8 ++++ .../s390/zvector/autovec-double-smin-z13.F90 | 11 +++++ .../s390/zvector/autovec-double-smin.F90 | 8 ++++ .../s390/zvector/autovec-float-quiet-eq.c | 8 ++++ .../s390/zvector/autovec-float-quiet-ge.c | 8 ++++ .../s390/zvector/autovec-float-quiet-gt.c | 8 ++++ .../s390/zvector/autovec-float-quiet-le.c | 8 ++++ .../s390/zvector/autovec-float-quiet-lt.c | 8 ++++ .../zvector/autovec-float-quiet-ordered.c | 10 +++++ .../s390/zvector/autovec-float-quiet-uneq.c | 10 +++++ .../zvector/autovec-float-quiet-unordered.c | 11 +++++ .../s390/zvector/autovec-float-signaling-eq.c | 11 +++++ .../s390/zvector/autovec-float-signaling-ge.c | 8 ++++ .../s390/zvector/autovec-float-signaling-gt.c | 8 ++++ .../s390/zvector/autovec-float-signaling-le.c | 8 ++++ .../s390/zvector/autovec-float-signaling-lt.c | 8 ++++ .../zvector/autovec-float-signaling-ltgt.c | 9 ++++ .../gcc.target/s390/zvector/autovec-fortran.h | 7 ++++ .../autovec-long-double-signaling-ge.c | 8 ++++ .../autovec-long-double-signaling-gt.c | 8 ++++ .../autovec-long-double-signaling-le.c | 8 ++++ .../autovec-long-double-signaling-lt.c | 8 ++++ .../gcc.target/s390/zvector/autovec.h | 41 +++++++++++++++++++ 51 files changed, 485 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-eq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ge.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-gt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-le.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-lt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ordered.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-unordered.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13-finite.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax-z13.F90 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax.F90 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin-z13.F90 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin.F90 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-eq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ge.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-gt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-le.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-lt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ordered.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-unordered.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-eq.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ge.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-gt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-le.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-lt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ltgt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-fortran.h create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-ge.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-gt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-le.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-lt.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/autovec.h diff --git a/gcc/testsuite/gcc.target/s390/s390.exp b/gcc/testsuite/gcc.target/s390/s390.exp index 86f7e4398eb..925eb568832 100644 --- a/gcc/testsuite/gcc.target/s390/s390.exp +++ b/gcc/testsuite/gcc.target/s390/s390.exp @@ -27,6 +27,7 @@ if ![istarget s390*-*-*] then { # Load support procs. load_lib gcc-dg.exp load_lib target-supports.exp +load_lib gfortran-dg.exp # Return 1 if the the assembler understands .machine and .machinemode. The # target attribute needs that feature to work. @@ -193,6 +194,10 @@ global DEFAULT_CFLAGS if ![info exists DEFAULT_CFLAGS] then { set DEFAULT_CFLAGS " -ansi -pedantic-errors" } +global DEFAULT_FFLAGS +if ![info exists DEFAULT_FFLAGS] then { + set DEFAULT_FFLAGS " -pedantic-errors" +} # Initialize `dg'. dg-init @@ -209,6 +214,9 @@ dg-runtest [lsort [prune [glob -nocomplain $srcdir/$subdir/*.{c,S}] \ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*vector*/*.{c,S}]] \ "" $DEFAULT_CFLAGS +gfortran-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*vector*/*.F90]] \ + "" $DEFAULT_FFLAGS + dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/target-attribute/*.{c,S}]] \ "" $DEFAULT_CFLAGS diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-eq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-eq.c new file mode 100644 index 00000000000..dad138770c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-eq.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_EQ); + +/* { dg-final { scan-assembler {\n\tvfcedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ge.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ge.c new file mode 100644 index 00000000000..9fddb62573f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ge.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_GE); + +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-gt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-gt.c new file mode 100644 index 00000000000..eb512f84c47 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-gt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_GT); + +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-le.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-le.c new file mode 100644 index 00000000000..c049f8b7dee --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-le.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_LE); + +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-lt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-lt.c new file mode 100644 index 00000000000..b6f7702ecd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-lt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_LT); + +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ordered.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ordered.c new file mode 100644 index 00000000000..bf8ebd4ab6a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-ordered.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_ORDERED); + +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c new file mode 100644 index 00000000000..421fb5e7ba5 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_UNEQ); + +/* { dg-final { scan-assembler-times {\n\tvfchdb\t} 2 } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ +/* { dg-final { scan-assembler {\n\tvx\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-unordered.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-unordered.c new file mode 100644 index 00000000000..c42f7930ad8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-unordered.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (QUIET_UNORDERED); + +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ +/* combine prefers to reorder vsel args instead of using vno. */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13-finite.c new file mode 100644 index 00000000000..e3d42eaf3ad --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13-finite.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_EQ); + +/* We can use non-signaling vector comparison instructions with + -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfcedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13.c new file mode 100644 index 00000000000..f6110328891 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_EQ); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdbr\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq.c new file mode 100644 index 00000000000..32088cb55b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-eq.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_EQ); + +/* The vectorizer produces <= and ==, which rtl passes cannot turn into vfkedb + yet. */ +/* { dg-final { scan-assembler {\n\tvfcedb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfkhedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13-finite.c new file mode 100644 index 00000000000..b301d1b739b --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13-finite.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GE); + +/* We can use non-signaling vector comparison instructions with + -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13.c new file mode 100644 index 00000000000..ee83f3405c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GE); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge.c new file mode 100644 index 00000000000..bcb4c868a15 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ge.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GE); + +/* { dg-final { scan-assembler {\n\tvfkhedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13-finite.c new file mode 100644 index 00000000000..c49764447f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13-finite.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GT); + +/* We can use non-signaling vector comparison instructions with + -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13.c new file mode 100644 index 00000000000..6b9c11997a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GT); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt.c new file mode 100644 index 00000000000..e423ed0f78c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-gt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_GT); + +/* { dg-final { scan-assembler {\n\tvfkhdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13-finite.c new file mode 100644 index 00000000000..7fa559b5701 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13-finite.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LE); + +/* We can use non-signaling vector comparison instructions with + -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfchedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13.c new file mode 100644 index 00000000000..a80ac20b905 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LE); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le.c new file mode 100644 index 00000000000..b97bebaaf8f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-le.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LE); + +/* { dg-final { scan-assembler {\n\tvfkhedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13-finite.c new file mode 100644 index 00000000000..3305a98379c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13-finite.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LT); + +/* We can use non-signaling vector comparison instructions with + -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfchdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13.c new file mode 100644 index 00000000000..8b398a28c37 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LT); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt.c new file mode 100644 index 00000000000..b01272d00a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-lt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LT); + +/* { dg-final { scan-assembler {\n\tvfkhdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13-finite.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13-finite.c new file mode 100644 index 00000000000..76730d70968 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13-finite.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector -ffinite-math-only" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LTGT); + +/* ltgt is the same as eq with -ffinite-math-only. */ +/* { dg-final { scan-assembler {\n\tvfcedb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13.c new file mode 100644 index 00000000000..d466697499a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt-z13.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z13 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LTGT); + +/* z13 does not have signaling vector comparison instructions. */ +/* { dg-final { scan-assembler {\n\tkdb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt.c new file mode 100644 index 00000000000..645f299a9fc --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-signaling-ltgt.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_DOUBLE (SIGNALING_LTGT); + +/* { dg-final { scan-assembler-times {\n\tvfkhdb\t} 2 } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax-z13.F90 b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax-z13.F90 new file mode 100644 index 00000000000..b114082df59 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax-z13.F90 @@ -0,0 +1,11 @@ +! { dg-do compile } +! { dg-options "-ffree-line-length-256 -O3 -march=z13 -mzvector" } + +#include "autovec-fortran.h" + +AUTOVEC_FORTRAN (max) + +! Fortran's max does not specify whether or not an exception should be raised in +! face of qNaNs, and neither does gcc's smax. Vectorize max using quiet +! comparison, because that's the only one we have on z13. +! { dg-final { scan-assembler {\n\tvfchdb\t} } } diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax.F90 b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax.F90 new file mode 100644 index 00000000000..1698ec4f4db --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smax.F90 @@ -0,0 +1,8 @@ +! { dg-do compile } +! { dg-options "-ffree-line-length-256 -O3 -march=z14 -mzvector" } + +#include "autovec-fortran.h" + +AUTOVEC_FORTRAN (max) + +! { dg-final { scan-assembler {\n\tvfmaxdb\t} } } diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin-z13.F90 b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin-z13.F90 new file mode 100644 index 00000000000..fc56e9d6879 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin-z13.F90 @@ -0,0 +1,11 @@ +! { dg-do compile } +! { dg-options "-ffree-line-length-256 -O3 -march=z13 -mzvector" } + +#include "autovec-fortran.h" + +AUTOVEC_FORTRAN (min) + +! Fortran's min does not specify whether or not an exception should be raised in +! face of qNaNs, and neither does gcc's smin. Vectorize min using quiet +! comparison, because that's the only one we have on z13. +! { dg-final { scan-assembler {\n\tvfchdb\t} } } diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin.F90 b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin.F90 new file mode 100644 index 00000000000..0dd1a33bb84 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-smin.F90 @@ -0,0 +1,8 @@ +! { dg-do compile } +! { dg-options "-ffree-line-length-256 -O3 -march=z14 -mzvector" } + +#include "autovec-fortran.h" + +AUTOVEC_FORTRAN (min) + +! { dg-final { scan-assembler {\n\tvfmindb\t} } } diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-eq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-eq.c new file mode 100644 index 00000000000..c74927dd028 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-eq.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_EQ); + +/* { dg-final { scan-assembler {\n\tvfcesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ge.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ge.c new file mode 100644 index 00000000000..4c7cb09eed5 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ge.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_GE); + +/* { dg-final { scan-assembler {\n\tvfchesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-gt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-gt.c new file mode 100644 index 00000000000..dd787929b9f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-gt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_GT); + +/* { dg-final { scan-assembler {\n\tvfchsb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-le.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-le.c new file mode 100644 index 00000000000..5bd1e3e98e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-le.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_LE); + +/* { dg-final { scan-assembler {\n\tvfchesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-lt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-lt.c new file mode 100644 index 00000000000..4938dcfb430 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-lt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_LT); + +/* { dg-final { scan-assembler {\n\tvfchsb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ordered.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ordered.c new file mode 100644 index 00000000000..222e9efb5f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-ordered.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_UNORDERED); + +/* { dg-final { scan-assembler {\n\tvfchesb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfchsb\t} } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c new file mode 100644 index 00000000000..ab5dcac9c34 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_UNEQ); + +/* { dg-final { scan-assembler-times {\n\tvfchsb\t} 2 } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ +/* { dg-final { scan-assembler {\n\tvx\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-unordered.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-unordered.c new file mode 100644 index 00000000000..c800dce2d7b --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-unordered.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (QUIET_UNORDERED); + +/* { dg-final { scan-assembler {\n\tvfchesb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfchsb\t} } } */ +/* combine prefers to reorder vsel args instead of using vno. */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-eq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-eq.c new file mode 100644 index 00000000000..ce3271c918c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-eq.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_EQ); + +/* The vectorizer produces <= and ==, which rtl passes cannot turn into vfkesb + yet. */ +/* { dg-final { scan-assembler {\n\tvfcesb\t} } } */ +/* { dg-final { scan-assembler {\n\tvfkhesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ge.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ge.c new file mode 100644 index 00000000000..0f98c5467e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ge.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_GE); + +/* { dg-final { scan-assembler {\n\tvfkhesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-gt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-gt.c new file mode 100644 index 00000000000..762c4c2030c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-gt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_GT); + +/* { dg-final { scan-assembler {\n\tvfkhsb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-le.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-le.c new file mode 100644 index 00000000000..ccf0c5c24d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-le.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_LE); + +/* { dg-final { scan-assembler {\n\tvfkhesb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-lt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-lt.c new file mode 100644 index 00000000000..b428e5fc52e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-lt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_LT); + +/* { dg-final { scan-assembler {\n\tvfkhsb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ltgt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ltgt.c new file mode 100644 index 00000000000..bf15242a4d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-signaling-ltgt.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_FLOAT (SIGNALING_LTGT); + +/* { dg-final { scan-assembler-times {\n\tvfkhsb\t} 2 } } */ +/* { dg-final { scan-assembler {\n\tvo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-fortran.h b/gcc/testsuite/gcc.target/s390/zvector/autovec-fortran.h new file mode 100644 index 00000000000..8e44cb2dd31 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-fortran.h @@ -0,0 +1,7 @@ +#define AUTOVEC_FORTRAN(OP) subroutine f (r, x, y); \ + real(kind=kind (1.0d0)) :: r(1000000), x(1000000), y(1000000); \ + integer :: i; \ + do i = 1, 1000000; \ + r(i) = OP (x(i), y(i)); \ + end do; \ +end diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-ge.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-ge.c new file mode 100644 index 00000000000..684a6a9b2e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-ge.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_LONG_DOUBLE (SIGNALING_GE); + +/* { dg-final { scan-assembler {\n\twfkhexb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-gt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-gt.c new file mode 100644 index 00000000000..76ade12c7f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-gt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_LONG_DOUBLE (SIGNALING_GT); + +/* { dg-final { scan-assembler {\n\twfkhxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-le.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-le.c new file mode 100644 index 00000000000..a15960ec86a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-le.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_LONG_DOUBLE (SIGNALING_LE); + +/* { dg-final { scan-assembler {\n\twfkhexb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-lt.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-lt.c new file mode 100644 index 00000000000..046d5487af8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-long-double-signaling-lt.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzvector" } */ + +#include "autovec.h" + +AUTOVEC_LONG_DOUBLE (SIGNALING_LT); + +/* { dg-final { scan-assembler {\n\twfkhxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec.h b/gcc/testsuite/gcc.target/s390/zvector/autovec.h new file mode 100644 index 00000000000..d04e5d7e00e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec.h @@ -0,0 +1,41 @@ +#ifndef AUTOVEC_H +#define AUTOVEC_H 1 + +#define QUIET_EQ(x, y) ((x) == (y)) +#define QUIET_GE __builtin_isgreaterequal +#define QUIET_GT __builtin_isgreater +#define QUIET_LE __builtin_islessequal +#define QUIET_LT __builtin_isless +#define QUIET_ORDERED(x, y) (!__builtin_isunordered ((x), (y))) +#define QUIET_UNEQ(x, y) (__builtin_isless ((x), (y)) \ + || __builtin_isgreater ((x), (y))) +#define QUIET_UNORDERED __builtin_isunordered +#define SIGNALING_EQ(x, y) (((x) <= (y)) && ((x) >= (y))) +#define SIGNALING_GE(x, y) ((x) >= (y)) +#define SIGNALING_GT(x, y) ((x) > (y)) +#define SIGNALING_LE(x, y) ((x) <= (y)) +#define SIGNALING_LT(x, y) ((x) < (y)) +#define SIGNALING_LTGT(x, y) (((x) < (y)) || ((x) > (y))) + +#define AUTOVEC(RESULT_TYPE, OP_TYPE, OP) void \ +f (RESULT_TYPE *r, const OP_TYPE *x, const OP_TYPE *y) \ +{ \ + int i; \ +\ + for (i = 0; i < 1000000; i++) \ + { \ + OP_TYPE xi = x[i], yi = y[i]; \ +\ + r[i] = OP (xi, yi); \ + } \ +} + +#define AUTOVEC_DOUBLE(OP) AUTOVEC (long, double, OP) + +#define AUTOVEC_FLOAT(OP) AUTOVEC (int, float, OP) + +typedef __int128 v1ti __attribute__ ((vector_size (16))); +typedef long double v1tf __attribute__ ((vector_size (16))); +#define AUTOVEC_LONG_DOUBLE(OP) AUTOVEC (v1ti, v1tf, OP) + +#endif