From patchwork Thu Aug 15 08:35:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1147474 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507018-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="i2zZClB8"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 468KXV20HNz9sND for ; Thu, 15 Aug 2019 18:35:38 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=J59PSxzS6VK0wc8TqMyDHUt6P5oEFZft8pC27DnrPztdRc5EXg/V3 HyDRZ40ndFou13xi+aB1AWIeKhoJZeJ+1Rgmng2K2PIKWO4v6gB1ipw7L1JHS9sD H0sIcgX+TLRvR9QeGQNVMEL1SbNBsKjcrPp8QTKVCLH6A2ngcufujY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=TW2Ua/v/16pGmXcUvavgnrqhPTY=; b=i2zZClB8TLLqxtjxBoQl j1j5iPjx7qiJQsZulKXKoNQl2ItKdAsDUfOW0Up/EwfzoHIX4cFmXxWGzJAVebP/ RXLhCalNTclgRNXSMaEIe3guUfUcYY1ClVmj+kEmxt5iNSxjblO3vTMSRYyjSR2r ZQ/7xhMEcQUrlPlCrUv46/M= Received: (qmail 57246 invoked by alias); 15 Aug 2019 08:35:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 57238 invoked by uid 89); 15 Aug 2019 08:35:30 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 15 Aug 2019 08:35:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB95428 for ; Thu, 15 Aug 2019 01:35:27 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 52E6A3F718 for ; Thu, 15 Aug 2019 01:35:27 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [committed][AArch64] Remove unneeded FSUB alternatives and add a new one Date: Thu, 15 Aug 2019 09:35:26 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 X-IsSubscribed: yes The floating-point subtraction patterns don't need to handle subtraction of constants, since those go through the addition patterns instead. There was a missing MOVPRFX alternative for FSUBR though. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. Applied as r274514. Richard 2019-08-15 Richard Sandiford gcc/ * config/aarch64/aarch64-sve.md (*sub3): Remove immediate FADD and FSUB alternatives. Add a MOVPRFX alternative for FSUBR. Index: gcc/config/aarch64/aarch64-sve.md =================================================================== --- gcc/config/aarch64/aarch64-sve.md 2019-08-15 09:32:03.211125428 +0100 +++ gcc/config/aarch64/aarch64-sve.md 2019-08-15 09:33:35.554443513 +0100 @@ -2878,34 +2878,31 @@ (define_insn_and_rewrite "*cond_add3" - [(set (match_operand:SVE_F 0 "register_operand" "=w, w, w, w") + [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w") (unspec:SVE_F - [(match_operand: 1 "register_operand" "Upl, Upl, Upl, Upl") - (match_operand:SI 4 "aarch64_sve_gp_strictness" "i, i, i, Z") - (match_operand:SVE_F 2 "aarch64_sve_float_arith_operand" "0, 0, vsA, w") - (match_operand:SVE_F 3 "aarch64_sve_float_arith_with_sub_operand" "vsA, vsN, 0, w")] + [(match_operand: 1 "register_operand" "Upl, Upl, Upl") + (match_operand:SI 4 "aarch64_sve_gp_strictness" "i, Z, i") + (match_operand:SVE_F 2 "aarch64_sve_float_arith_operand" "vsA, w, vsA") + (match_operand:SVE_F 3 "register_operand" "0, w, 0")] UNSPEC_COND_FSUB))] - "TARGET_SVE - && (register_operand (operands[2], mode) - || register_operand (operands[3], mode))" + "TARGET_SVE" "@ - fsub\t%0., %1/m, %0., #%3 - fadd\t%0., %1/m, %0., #%N3 fsubr\t%0., %1/m, %0., #%2 - #" + # + movprfx\t%0, %3\;fsubr\t%0., %1/m, %0., #%2" ; Split the unpredicated form after reload, so that we don't have ; the unnecessary PTRUE. "&& reload_completed - && register_operand (operands[2], mode) - && register_operand (operands[3], mode)" + && register_operand (operands[2], mode)" [(set (match_dup 0) (minus:SVE_F (match_dup 2) (match_dup 3)))] + "" + [(set_attr "movprfx" "*,*,yes")] ) ;; Predicated floating-point subtraction from a constant, merging with the