From patchwork Sun Aug 11 09:09:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 1145260 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 465tVl0KHBz9sP8 for ; Sun, 11 Aug 2019 19:10:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726509AbfHKJKa (ORCPT ); Sun, 11 Aug 2019 05:10:30 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:8323 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725999AbfHKJKZ (ORCPT ); Sun, 11 Aug 2019 05:10:25 -0400 X-UUID: 06caa4f05da24577ad382a44a593aa42-20190811 X-UUID: 06caa4f05da24577ad382a44a593aa42-20190811 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 357677779; Sun, 11 Aug 2019 17:10:15 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 11 Aug 2019 17:10:07 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 11 Aug 2019 17:10:06 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , , David Airlie , Matthias Brugger CC: Jitao Shi , Thierry Reding , Ajay Kumar , Inki Dae , Rahul Sharma , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , Russell King , , , , , , , Sascha Hauer , , , , , , , Sam Ravnborg Subject: [PATCH v4 1/4] dt-bindings: display: panel: Add BOE tv101wum-n16 panel bindings Date: Sun, 11 Aug 2019 17:09:58 +0800 Message-ID: <20190811091001.49555-2-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190811091001.49555-1-jitao.shi@mediatek.com> References: <20190811091001.49555-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: ED0F539021A774F8F7C0AB4EDE195669EBA78E8BEFAF79893AE53DACD6A79B7C2000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for boe tv101wum-n16 panel. Signed-off-by: Jitao Shi Reviewed-by: Sam Ravnborg --- .../display/panel/boe,tv101wum-nl6.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt new file mode 100644 index 000000000000..bd44af636390 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt @@ -0,0 +1,34 @@ +Boe Corporation 10.1" WUXGA TFT LCD panel + +Required properties: +- compatible: should be "boe,tv101wum-nl6" +- reg: the virtual channel number of a DSI peripheral +- enable-gpios: a GPIO spec for the enable pin +- pp1800-supply: core voltage supply +- avdd-supply: phandle of the regulator that provides positive voltage +- avee-supply: phandle of the regulator that provides negative voltage +- backlight: phandle of the backlight device attached to the panel + +The device node can contain one 'port' child node with one child +'endpoint' node, according to the bindings defined in +media/video-interfaces.txt. This node should describe panel's video bus. + +Example: +&dsi { + ... + panel@0 { + compatible = "boe,tv101wum-nl6"; + reg = <0>; + enable-gpios = <&pio 45 0>; + avdd-supply = <&ppvarn_lcd>; + avee-supply = <&ppvarp_lcd>; + pp1800-supply = <&pp1800_lcd>; + backlight = <&backlight_lcd0>; + status = "okay"; + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; +}; From patchwork Sun Aug 11 09:10:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 1145258 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 465tVk0M5tz9sN6 for ; Sun, 11 Aug 2019 19:10:38 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726516AbfHKJKb (ORCPT ); Sun, 11 Aug 2019 05:10:31 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:46824 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725990AbfHKJKZ (ORCPT ); Sun, 11 Aug 2019 05:10:25 -0400 X-UUID: 3b3017fef26142b58580e5e185f41bed-20190811 X-UUID: 3b3017fef26142b58580e5e185f41bed-20190811 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 759948162; Sun, 11 Aug 2019 17:10:14 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33N2.mediatek.inc (172.27.4.76) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 11 Aug 2019 17:10:11 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 11 Aug 2019 17:10:09 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , , David Airlie , Matthias Brugger CC: Jitao Shi , Thierry Reding , Ajay Kumar , Inki Dae , Rahul Sharma , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , Russell King , , , , , , , Sascha Hauer , , , , , , , Sam Ravnborg Subject: [PATCH wn 3/4] dt-bindings: display: panel: add auo kd101n80-45na panel bindings Date: Sun, 11 Aug 2019 17:10:00 +0800 Message-ID: <20190811091001.49555-4-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190811091001.49555-1-jitao.shi@mediatek.com> References: <20190811091001.49555-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: A0CA7C28459BB59248EBBF1EF21FA40E49649FC090FA6CDCE4ED35C890F55B732000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for auo kd101n80-45na panel. Signed-off-by: Jitao Shi Reviewed-by: Sam Ravnborg --- .../display/panel/auo,kd101n80-45na.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/auo,kd101n80-45na.txt diff --git a/Documentation/devicetree/bindings/display/panel/auo,kd101n80-45na.txt b/Documentation/devicetree/bindings/display/panel/auo,kd101n80-45na.txt new file mode 100644 index 000000000000..994c2a13f942 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/auo,kd101n80-45na.txt @@ -0,0 +1,34 @@ +AUO Corporation 10.1" WUXGA TFT LCD panel + +Required properties: +- compatible: should be "auo,kd101n80-45na" +- reg: the virtual channel number of a DSI peripheral +- enable-gpios: a GPIO spec for the enable pin +- pp1800-supply: core voltage supply +- avdd-supply: phandle of the regulator that provides positive voltage +- avee-supply: phandle of the regulator that provides negative voltage +- backlight: phandle of the backlight device attached to the panel + +The device node can contain one 'port' child node with one child +'endpoint' node, according to the bindings defined in +media/video-interfaces.txt. This node should describe panel's video bus. + +Example: +&dsi { + ... + panel@0 { + compatible = "auo,kd101n80-45na"; + reg = <0>; + enable-gpios = <&pio 45 0>; + avdd-supply = <&ppvarn_lcd>; + avee-supply = <&ppvarp_lcd>; + pp1800-supply = <&pp1800_lcd>; + backlight = <&backlight_lcd0>; + status = "okay"; + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; +};