From patchwork Wed Aug 7 16:21:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reza Arbab X-Patchwork-Id: 1143589 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 463cGH4C25z9sDB for ; Thu, 8 Aug 2019 02:21:59 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 463cGH1JX1zDqtj for ; Thu, 8 Aug 2019 02:21:59 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=arbab@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 463cG83nLWzDqs3 for ; Thu, 8 Aug 2019 02:21:51 +1000 (AEST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x77G2pel017387; Wed, 7 Aug 2019 12:21:46 -0400 Received: from ppma01wdc.us.ibm.com (fd.55.37a9.ip4.static.sl-reverse.com [169.55.85.253]) by mx0a-001b2d01.pphosted.com with ESMTP id 2u810nbecp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Aug 2019 12:21:46 -0400 Received: from pps.filterd (ppma01wdc.us.ibm.com [127.0.0.1]) by ppma01wdc.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x77GJmvc016596; Wed, 7 Aug 2019 16:21:45 GMT Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by ppma01wdc.us.ibm.com with ESMTP id 2u51w6r42k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Aug 2019 16:21:45 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x77GLiNR65470742 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 16:21:44 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 51311BE056; Wed, 7 Aug 2019 16:21:44 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 457CEBE053; Wed, 7 Aug 2019 16:21:44 +0000 (GMT) Received: from arbab-laptop.localdomain (unknown [9.53.179.210]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 16:21:44 +0000 (GMT) Received: by arbab-laptop.localdomain (Postfix, from userid 152845) id ACB0D46219A; Wed, 7 Aug 2019 11:21:42 -0500 (CDT) From: Reza Arbab To: skiboot@lists.ozlabs.org Date: Wed, 7 Aug 2019 11:21:42 -0500 Message-Id: <1565194902-23196-1-git-send-email-arbab@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070163 Subject: [Skiboot] [PATCH] npu3: Expose remaining ATSD launch registers X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Popple MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" List all 16 ATSD registers in the device tree, not just the first 8. Signed-off-by: Reza Arbab --- hw/npu3-nvlink.c | 21 ++++++++++++--------- include/npu3-regs.h | 1 + 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/npu3-nvlink.c b/hw/npu3-nvlink.c index c8e1a0abf31b..7dc54be59dc4 100644 --- a/hw/npu3-nvlink.c +++ b/hw/npu3-nvlink.c @@ -1387,6 +1387,17 @@ static void npu3_dev_create_pvd(struct npu3_dev *dev) npu3_cfg_populate(dev); } +static void npu3_dt_add_mmio_atsd(struct npu3 *npu) +{ + struct dt_node *dn = npu->nvlink.phb.dt_node; + uint64_t mmio_atsd[NPU3_XTS_ATSD_MAX]; + + for (uint32_t i = 0; i < NPU3_XTS_ATSD_MAX; i++) + mmio_atsd[i] = npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(i); + + dt_add_property(dn, "ibm,mmio-atsd", mmio_atsd, sizeof(mmio_atsd)); +} + static void npu3_dt_add_mmio_window(struct npu3 *npu) { struct dt_node *dn = npu->nvlink.phb.dt_node; @@ -1482,16 +1493,8 @@ static void npu3_dt_add_props(struct npu3 *npu) dt_add_property_cells(dn, "ibm,links", NPU3_LINKS_PER_NPU); dt_add_property(dn, "reg", npu->regs, sizeof(npu->regs)); - dt_add_property_u64s(dn, "ibm,mmio-atsd", - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(0), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(1), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(2), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(3), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(4), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(5), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(6), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(7)); + npu3_dt_add_mmio_atsd(npu); npu3_dt_add_mmio_window(npu); npu3_dt_add_interrupts(npu); } diff --git a/include/npu3-regs.h b/include/npu3-regs.h index 341d652899c3..380fb5491590 100644 --- a/include/npu3-regs.h +++ b/include/npu3-regs.h @@ -248,5 +248,6 @@ /* NPU_XTS_ATSD block registers */ #define NPU3_XTS_ATSD_LAUNCH(n) (NPU3_BLOCK_NPU_XTS_ATSD(n) + 0x000) +#define NPU3_XTS_ATSD_MAX 16 #endif /* __NPU3_REGS_H */