From patchwork Fri Aug 2 11:08:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141090 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="aTL00w4n"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460Pcz45MNz9sBF for ; Fri, 2 Aug 2019 21:12:03 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 17CFEC21EBE; Fri, 2 Aug 2019 11:08:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 89174C21E6C; Fri, 2 Aug 2019 11:08:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 85788C21C2C; Fri, 2 Aug 2019 11:08:17 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 53BFFC21BE5 for ; Fri, 2 Aug 2019 11:08:17 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B1Pl8028858; Fri, 2 Aug 2019 13:08:13 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=vHXVuDPJQIBb7JM/GX0L0ZxQ7x5XIez8rkfAzuZkH1Y=; b=aTL00w4niD6znfwEq5AqKoIiqOW6tXDLpIGK8jpk6YNm3rH/XkiG5BqgiA4qgFAvNLX8 T9tETl+h8g/r+RCFTUWK27O92+0M8Bd31OgjNFLRRT037RdXnvn7+wa1pF26eGklqCDB uJaPvBuWLTnNj/l+p+rsclF/cvHJPyJGXbM50OpYSen20j4toh5hBPzzuRJfUa9XqCxx xFqwFi1/xYSJmfE4JFPAgu7fORUlCA3tZCV88xF7mzMu1xX7pgOD9lKaPzpqwUVDmr2k ZEMJzZUEK08gqf1jVJCxGfsISVJ1TFfiaDfdDMRrYOS/iew+OPon5nveRKtAiq8eTPz+ TA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2u3vd06vuk-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:13 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 021153D; Fri, 2 Aug 2019 11:08:12 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id ED59F207419; Fri, 2 Aug 2019 13:08:12 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:12 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:12 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:02 +0200 Message-ID: <1564744088-16896-2-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: uboot-stm32@st-md-mailman.stormreply.com Subject: [U-Boot] [PATCH v2 1/7] bsec: update after MISC u-class update X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Since the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered"); The misc bsec driver need to be adapted to reflect the number of transferred bytes. Signed-off-by: Patrick Delaunay --- Changes in v2: - udpate bsec patch after rebase (use offs) arch/arm/mach-stm32mp/bsec.c | 30 ++++++++++++++++-------------- drivers/misc/stm32mp_fuse.c | 30 +++++++++++++++++------------- 2 files changed, 33 insertions(+), 27 deletions(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 8018366..a77c706 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -364,15 +364,13 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, offs -= STM32_BSEC_OTP_OFFSET; shadow = false; } - otp = offs / sizeof(u32); - if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { - dev_err(dev, "wrong value for otp, max value : %i\n", - BSEC_OTP_MAX_VALUE); + if (offs < 0 || (offs % 4) || (size % 4)) return -EINVAL; - } - for (i = otp; i < (otp + nb_otp); i++) { + otp = offs / sizeof(u32); + + for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) { u32 *addr = &((u32 *)buf)[i - otp]; if (shadow) @@ -383,7 +381,10 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, if (ret) break; } - return ret; + if (ret) + return ret; + else + return (i - otp) * 4; } static int stm32mp_bsec_write(struct udevice *dev, int offset, @@ -400,15 +401,13 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, offs -= STM32_BSEC_OTP_OFFSET; shadow = false; } - otp = offs / sizeof(u32); - if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { - dev_err(dev, "wrong value for otp, max value : %d\n", - BSEC_OTP_MAX_VALUE); + if (offs < 0 || (offs % 4) || (size % 4)) return -EINVAL; - } - for (i = otp; i < otp + nb_otp; i++) { + otp = offs / sizeof(u32); + + for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) { u32 *val = &((u32 *)buf)[i - otp]; if (shadow) @@ -418,7 +417,10 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, if (ret) break; } - return ret; + if (ret) + return ret; + else + return (i - otp) * 4; } static const struct misc_ops stm32mp_bsec_ops = { diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index 801d946..a1a27d1 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -20,7 +20,7 @@ */ int fuse_read(u32 bank, u32 word, u32 *val) { - int ret = 0; + int ret; struct udevice *dev; switch (bank) { @@ -32,9 +32,10 @@ int fuse_read(u32 bank, u32 word, u32 *val) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -67,9 +68,10 @@ int fuse_prog(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -100,9 +102,10 @@ int fuse_sense(u32 bank, u32 word, u32 *val) if (ret) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -135,9 +138,10 @@ int fuse_override(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 From patchwork Fri Aug 2 11:08:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141091 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="uk8Ti4xn"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460Pd31G6Nz9sBF for ; Fri, 2 Aug 2019 21:12:07 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D569CC21E2C; Fri, 2 Aug 2019 11:08:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 10955C21E1E; Fri, 2 Aug 2019 11:08:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F1EF0C21BE5; Fri, 2 Aug 2019 11:08:16 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id AFB7BC21C3F for ; Fri, 2 Aug 2019 11:08:16 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B1JWT028843; Fri, 2 Aug 2019 13:08:14 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=WfRKj7uql+7fVJ1e8DXQ4u5dm7+JqT/yoAQUA4nBip0=; b=uk8Ti4xn9fy18/cQxKKBgJib8VIC0YFfm53CklHQhA2Fa4ymgQRnr0BP/sbpZVdt8ZF5 4eaOfOSn/NM4TR+360Izs5+9klQ1MyEQX1RRIDCAMPgOLjsTuzNh1+fY+H7Smo3OB2ct szi8IjgO4s/KHxHrJ3KPS9vkk8Cq5V2Y3uYbkXamIga1qAmHccha7WR5FSCIKoRZAK7C R54acKLiVMaHSk3Iep+0KD1vl8KmkjFlm6XKAYuD6A+u2L/oxYyOEHVySWi/RksaBNDY J9PxpuYklmwwJz4dpMWw4jfjKGSfHb0NRZHT8veFnyaFuu3S5RuknyI7DZj3WsPzpCoK DA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2u3vd06vuq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3290231; Fri, 2 Aug 2019 11:08:14 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2A823207409; Fri, 2 Aug 2019 13:08:14 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:14 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:13 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:03 +0200 Message-ID: <1564744088-16896-3-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: uboot-stm32@st-md-mailman.stormreply.com Subject: [U-Boot] [PATCH v2 2/7] pmu: stpmic1: change specific NVM api to MISC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use MISC u-class to export the NVM register (starting at 0xF8 offset) and avoid specific API. - SHADOW have offset < 0. - NVM have register > 0 Signed-off-by: Patrick Delaunay --- Changes in v2: None drivers/misc/stm32mp_fuse.c | 44 ++++++++++++++++++-- drivers/power/pmic/stpmic1.c | 98 +++++++++++++++++++++++++------------------- include/power/stpmic1.h | 7 ---- 3 files changed, 96 insertions(+), 53 deletions(-) diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index a1a27d1..0eed345 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -40,8 +40,17 @@ int fuse_read(u32 bank, u32 word, u32 *val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; *val = 0; - ret = stpmic1_shadow_read_byte(word, (u8 *)val); + ret = misc_read(dev, -word, val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -76,7 +85,16 @@ int fuse_prog(u32 bank, u32 word, u32 val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: - ret = stpmic1_nvm_write_byte(word, (u8 *)&val); + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; + ret = misc_write(dev, word, &val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -110,8 +128,17 @@ int fuse_sense(u32 bank, u32 word, u32 *val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; *val = 0; - ret = stpmic1_nvm_read_byte(word, (u8 *)val); + ret = misc_read(dev, word, val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -146,7 +173,16 @@ int fuse_override(u32 bank, u32 word, u32 val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: - ret = stpmic1_shadow_write_byte(word, (u8 *)&val); + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; + ret = misc_write(dev, -word, &val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index c338148..509baed 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -69,6 +70,7 @@ static int stpmic1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) static int stpmic1_bind(struct udevice *dev) { + int ret; #if CONFIG_IS_ENABLED(DM_REGULATOR) ofnode regulators_node; int children; @@ -86,6 +88,13 @@ static int stpmic1_bind(struct udevice *dev) dev_dbg(dev, "no child found\n"); #endif /* DM_REGULATOR */ + if (!IS_ENABLED(CONFIG_SPL_BUILD)) { + ret = device_bind_driver(dev, "stpmic1-nvm", + "stpmic1-nvm", NULL); + if (ret) + return ret; + } + if (CONFIG_IS_ENABLED(SYSRESET)) return device_bind_driver(dev, "stpmic1-sysreset", "stpmic1-sysreset", NULL); @@ -113,32 +122,38 @@ U_BOOT_DRIVER(pmic_stpmic1) = { }; #ifndef CONFIG_SPL_BUILD -static int stpmic1_nvm_rw(u8 addr, u8 *buf, int buf_len, enum pmic_nvm_op op) +static int stpmic1_nvm_rw(struct udevice *dev, u8 addr, u8 *buf, int buf_len, + enum pmic_nvm_op op) { - struct udevice *dev; unsigned long timeout; u8 cmd = STPMIC1_NVM_CMD_READ; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmic1), &dev); - if (ret) - /* No PMIC on power discrete board */ - return -EOPNOTSUPP; + int ret, len = buf_len; if (addr < STPMIC1_NVM_START_ADDRESS) return -EACCES; + if (addr + buf_len > STPMIC1_NVM_START_ADDRESS + STPMIC1_NVM_SIZE) + len = STPMIC1_NVM_START_ADDRESS + STPMIC1_NVM_SIZE - addr; - if (op == SHADOW_READ) - return pmic_read(dev, addr, buf, buf_len); + if (op == SHADOW_READ) { + ret = pmic_read(dev, addr, buf, len); + if (ret < 0) + return ret; + else + return len; + } - if (op == SHADOW_WRITE) - return pmic_write(dev, addr, buf, buf_len); + if (op == SHADOW_WRITE) { + ret = pmic_write(dev, addr, buf, len); + if (ret < 0) + return ret; + else + return len; + } if (op == NVM_WRITE) { cmd = STPMIC1_NVM_CMD_PROGRAM; - ret = pmic_write(dev, addr, buf, buf_len); + ret = pmic_write(dev, addr, buf, len); if (ret < 0) return ret; } @@ -168,51 +183,50 @@ static int stpmic1_nvm_rw(u8 addr, u8 *buf, int buf_len, enum pmic_nvm_op op) return -ETIMEDOUT; if (op == NVM_READ) { - ret = pmic_read(dev, addr, buf, buf_len); + ret = pmic_read(dev, addr, buf, len); if (ret < 0) return ret; } - return 0; + return len; } -int stpmic1_shadow_read_byte(u8 addr, u8 *buf) +static int stpmic1_nvm_read(struct udevice *dev, int offset, + void *buf, int size) { - return stpmic1_nvm_rw(addr, buf, 1, SHADOW_READ); -} + enum pmic_nvm_op op = NVM_READ; -int stpmic1_shadow_write_byte(u8 addr, u8 *buf) -{ - return stpmic1_nvm_rw(addr, buf, 1, SHADOW_WRITE); -} + if (offset < 0) { + op = SHADOW_READ; + offset = -offset; + } -int stpmic1_nvm_read_byte(u8 addr, u8 *buf) -{ - return stpmic1_nvm_rw(addr, buf, 1, NVM_READ); + return stpmic1_nvm_rw(dev->parent, offset, buf, size, op); } -int stpmic1_nvm_write_byte(u8 addr, u8 *buf) +static int stpmic1_nvm_write(struct udevice *dev, int offset, + const void *buf, int size) { - return stpmic1_nvm_rw(addr, buf, 1, NVM_WRITE); -} + enum pmic_nvm_op op = NVM_WRITE; -int stpmic1_nvm_read_all(u8 *buf, int buf_len) -{ - if (buf_len != STPMIC1_NVM_SIZE) - return -EINVAL; + if (offset < 0) { + op = SHADOW_WRITE; + offset = -offset; + } - return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, - buf, buf_len, NVM_READ); + return stpmic1_nvm_rw(dev->parent, offset, (void *)buf, size, op); } -int stpmic1_nvm_write_all(u8 *buf, int buf_len) -{ - if (buf_len != STPMIC1_NVM_SIZE) - return -EINVAL; +static const struct misc_ops stpmic1_nvm_ops = { + .read = stpmic1_nvm_read, + .write = stpmic1_nvm_write, +}; - return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, - buf, buf_len, NVM_WRITE); -} +U_BOOT_DRIVER(stpmic1_nvm) = { + .name = "stpmic1-nvm", + .id = UCLASS_MISC, + .ops = &stpmic1_nvm_ops, +}; #endif /* CONFIG_SPL_BUILD */ #ifdef CONFIG_SYSRESET diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index 0e6721d..ea91b75 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -107,11 +107,4 @@ enum { STPMIC1_PWR_SW2, STPMIC1_MAX_PWR_SW, }; - -int stpmic1_shadow_read_byte(u8 addr, u8 *buf); -int stpmic1_shadow_write_byte(u8 addr, u8 *buf); -int stpmic1_nvm_read_byte(u8 addr, u8 *buf); -int stpmic1_nvm_write_byte(u8 addr, u8 *buf); -int stpmic1_nvm_read_all(u8 *buf, int buf_len); -int stpmic1_nvm_write_all(u8 *buf, int buf_len); #endif From patchwork Fri Aug 2 11:08:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141082 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="MlIRDX3C"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460PXr2x17z9sDB for ; Fri, 2 Aug 2019 21:08:28 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A59E2C21E49; Fri, 2 Aug 2019 11:08:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E463DC21BE5; Fri, 2 Aug 2019 11:08:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 71FA2C21C6A; Fri, 2 Aug 2019 11:08:16 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 1020FC21C2C for ; Fri, 2 Aug 2019 11:08:16 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B1JWV028843; Fri, 2 Aug 2019 13:08:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=3pPkBSfyo+YhBupp93HUrWVnIWPLyrM7bZjkwQkCpcQ=; b=MlIRDX3CcWdWSwXzZ1FoYTvfq5oSgMYDMD5RqkVXftD9p+ELti/GH+K4IkOvk6GnDMnR tPIJGIMeqVk4RsEW4vZlVrHoPSkxzIaVNd/OM8e3AWNupmZ7uRs/eoVkNEcK7AMUtj5L kJMPpO63MGa7vEKznwMKtOSUH8o1jogQCu9NBa/skX5schm3Otb5LMAZeFH05sxNCEDO HSzA3GKUJXw7c6Qu9hiny13V63E+oFLDmxss+7r70Q7kp4B8yjU1DbLpSHNzKsKzzBTl 2LPN3/NyJMaQy08V+VpUi8v6Z+Neefe+An+/NYQswvDPT0r8NMMryDINtQNjtCvutOWc Hw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2u3vd06vur-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:15 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3EDA631; Fri, 2 Aug 2019 11:08:15 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 351CC207409; Fri, 2 Aug 2019 13:08:15 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:15 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:14 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:04 +0200 Message-ID: <1564744088-16896-4-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: uboot-stm32@st-md-mailman.stormreply.com Subject: [U-Boot] [PATCH v2 3/7] stpmic1: simplify stpmic1_sysreset_request X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Retrieve parent device from dev->parent instead of calling uclass_get_device_by_driver() Signed-off-by: Patrick Delaunay --- Changes in v2: None drivers/power/pmic/stpmic1.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index 509baed..de31934 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -232,19 +232,12 @@ U_BOOT_DRIVER(stpmic1_nvm) = { #ifdef CONFIG_SYSRESET static int stpmic1_sysreset_request(struct udevice *dev, enum sysreset_t type) { - struct udevice *pmic_dev; + struct udevice *pmic_dev = dev->parent; int ret; if (type != SYSRESET_POWER && type != SYSRESET_POWER_OFF) return -EPROTONOSUPPORT; - ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmic1), - &pmic_dev); - - if (ret) - return -EOPNOTSUPP; - ret = pmic_reg_read(pmic_dev, STPMIC1_MAIN_CR); if (ret < 0) return ret; From patchwork Fri Aug 2 11:08:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141088 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="QUkIGiTm"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460PbB4NRdz9sBF for ; Fri, 2 Aug 2019 21:10:30 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 418BFC21E38; Fri, 2 Aug 2019 11:09:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 39474C21E57; Fri, 2 Aug 2019 11:08:20 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E40D9C21C3F; Fri, 2 Aug 2019 11:08:17 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 9B235C21BE5 for ; Fri, 2 Aug 2019 11:08:17 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72AvxrQ015163; Fri, 2 Aug 2019 13:08:17 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=VWon9aJsXaE/GPRvP+3XN+GX3pXk4L62+2daQIJkIaI=; b=QUkIGiTmH3fIer+hfO15MizEa7cpl7V9gQD0ylW7ZmaGJCuIYbt3K+pAbRBHCvXR7ke5 PJJCcVAC+UWeA82Fq78XMMtXnf6kv8HT53SPLrJ3lk8s7U3PTQGnThgiP71KWQWYxzIM bQjYlRo/NxVujycqsfur3EmC+Rph3DTOjnndiScOskY2GYP4ZQvv3NN/jcGlEZAlNxPS rbvoIEP1b0Zr2bBCKLwJeFjY3bpvDSegC3P6cxs3lbgUGs3guDs8oPKutEJpdqHqZqrW lepQT0ClwFbQuBKYjldDczKUlvTfh5o8UzoCIUAvQBhQAjD8TyCgLi84YSUq7VaZNf5b OA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2u0braft2f-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:17 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7BEA531; Fri, 2 Aug 2019 11:08:16 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 72C12207409; Fri, 2 Aug 2019 13:08:16 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:16 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:15 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:05 +0200 Message-ID: <1564744088-16896-5-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: U-Boot STM32 Subject: [U-Boot] [PATCH v2 4/7] stm32mp1: update test on misc_read result X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update the stm32mp1 baord after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index b99c6c0..ca20d85 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -101,7 +101,7 @@ int checkboard(void) if (!ret) ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), &otp, sizeof(otp)); - if (!ret && otp) { + if (ret > 0 && otp) { printf("Board: MB%04x Var%d Rev.%c-%02d\n", otp >> 16, (otp >> 12) & 0xF, From patchwork Fri Aug 2 11:08:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141085 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="o9VZbE7T"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460PZc5gmjz9s3Z for ; Fri, 2 Aug 2019 21:10:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 7D029C21EB1; Fri, 2 Aug 2019 11:09:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 34D14C21E53; Fri, 2 Aug 2019 11:09:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4898CC21E47; Fri, 2 Aug 2019 11:08:23 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 2D407C21D8E for ; Fri, 2 Aug 2019 11:08:21 +0000 (UTC) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B2MNs027558; Fri, 2 Aug 2019 13:08:20 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=6q1gilO+MnGq/+QMn7nis1w8U+vh+vxH6qO5IOJBrn0=; b=o9VZbE7TKnczjlFTzm6cGWfqXQWjfVrNkJb0BO0mPG2ZCXZ9dpqpXJpMqsvCEvZa95/c Td+iSr1O44400jp8F3vw9gI22XDqm48WZakT/3JAEkEmBqrkhYW5eCQnNwSUZfxTppkz P+Ka7tRXWtWTiSStD+PwBvzCy06TNdBPunosX6I2EUBw5hIMYZj7GACBj+crBTKcjC0S p2dNYvQAM7+Qb6EnqbA8hbf8AWVqfD2mjUV+fbadwUPtQlDdmSWNkZ4AMT0BoQTBg7D0 w/eW2eD6zy8EHYOuljwR+vgNxpwmLVv0Vf1LrSY1jeRxqGauymeut/rNLS3+oHhj6PNA 3Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2u2jp4u7rc-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:20 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9957038; Fri, 2 Aug 2019 11:08:17 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9115D207409; Fri, 2 Aug 2019 13:08:17 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:17 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:17 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:06 +0200 Message-ID: <1564744088-16896-6-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: U-Boot STM32 Subject: [U-Boot] [PATCH v2 5/7] stm32mp1: update sysconf_init on misc_read result X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update management of misc_read in sysconf_init, which now return length of data after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index ca20d85..5ab2226 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -464,7 +464,7 @@ static void sysconf_init(void) } ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4); - if (!ret) + if (ret > 0) otp = otp & BIT(13); /* get VDD = pwr-supply */ From patchwork Fri Aug 2 11:08:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141086 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="UZ9BlXfe"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460PZj6jjdz9s3Z for ; Fri, 2 Aug 2019 21:10:05 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 97844C21E29; Fri, 2 Aug 2019 11:09:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9C421C21E7F; Fri, 2 Aug 2019 11:08:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6DDB2C21DF9; Fri, 2 Aug 2019 11:08:22 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id AE848C21E76 for ; Fri, 2 Aug 2019 11:08:19 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B6fE0006427; Fri, 2 Aug 2019 13:08:19 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=LQZ9Qk+srqMghdwgap5kfiKUtzrhS+JMkuIRDXIYtbQ=; b=UZ9BlXfe177Bap4d0EUqerklQjkGTYr+98jDhFkCb0gwfvyRcvA05s6zmgpUt88Dmf6C DbcNHoBYBzbFehdxoBiRkrvxn5RWepT1V4/DUZk0L//Afr/Cvb7HmuZft4NA++jEPnQh HHbk1zrb29a6lRSLq6tKCxFhAywfvJ2m23lazVXfvYAETbDg09GUp4HOPycOt3ZbYWn9 APikEMugVwey25J1SA8N6dykadk6NswO8xbLsDKSCWraxw0WBzTBzayKORE2OhhGN/o9 Vc4TVEt7gVEa2DOxe1OSlP9ALqtBZ1x5jeRQx6fqtkzcFCs/y4m0ZGrYpBbgqhjIxYd4 Wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2u0c2yuycd-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:19 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BAFFA31; Fri, 2 Aug 2019 11:08:18 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B462A207409; Fri, 2 Aug 2019 13:08:18 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:18 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:18 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:07 +0200 Message-ID: <1564744088-16896-7-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: U-Boot STM32 Subject: [U-Boot] [PATCH v2 6/7] stm32mp1: board update command stboard on misc_read result X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update management of misc_read, which now return length of data after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- Changes in v2: - impact in added command stboard after rebase board/st/stm32mp1/cmd_stboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/cmd_stboard.c b/board/st/stm32mp1/cmd_stboard.c index f781c36..04352ae 100644 --- a/board/st/stm32mp1/cmd_stboard.c +++ b/board/st/stm32mp1/cmd_stboard.c @@ -60,7 +60,7 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc, ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), &otp, sizeof(otp)); - if (ret) { + if (ret < 0) { puts("OTP read error"); return CMD_RET_FAILURE; } From patchwork Fri Aug 2 11:08:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1141089 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="PMVy0rrc"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460Pcm0tCwz9s7T for ; Fri, 2 Aug 2019 21:11:51 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id B0CCAC21ECC; Fri, 2 Aug 2019 11:09:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 458D0C21C3F; Fri, 2 Aug 2019 11:08:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 14DB2C21E6A; Fri, 2 Aug 2019 11:08:24 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 42863C21E2C for ; Fri, 2 Aug 2019 11:08:21 +0000 (UTC) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x72B2M19027555; Fri, 2 Aug 2019 13:08:20 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=TCEjK7eU8HPSRAfRH3zooi+vmFjmVBABDOtSdMtwlRM=; b=PMVy0rrc1AsrCKrPukX/6Zs6qiH+te/p0xoFekvL08tR7v0xeuNwnNI7qLVrobhqhBQf t2Qxi176Tl+gFBAGw90azRAbtwTJjJmJbImeOIgiseH5yqPmujPwENXLGyHY4URDOEtv PD0XGdvflePb0WI4jMkwr4+d5inmi/MnlF3CPc6KoZuRgP7xRCja7UUo2AOKfElXhwaQ Vz9Q1YxaiNKCXjIWaPWHPJyHD2TNvRGd5DXgthjMjdr0UdPP7G6wwCIfUgDFBVetplNA 9KP4fgNnPUS/w5+CeCHVxKANx7HQIh5xUxEaNurLqdBADfiy74AEzBH6tWTJiUImH4zd Wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2u2jp4u7rm-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Aug 2019 13:08:20 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B61F231; Fri, 2 Aug 2019 11:08:19 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AD2A0207409; Fri, 2 Aug 2019 13:08:19 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:19 +0200 Received: from localhost (10.201.23.85) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 2 Aug 2019 13:08:19 +0200 From: Patrick Delaunay To: Date: Fri, 2 Aug 2019 13:08:08 +0200 Message-ID: <1564744088-16896-8-git-send-email-patrick.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> References: <1564744088-16896-1-git-send-email-patrick.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.85] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-02_05:, , signatures=0 Cc: uboot-stm32@st-md-mailman.stormreply.com Subject: [U-Boot] [PATCH v2 7/7] misc: change RCC form MISC to NOP uclass X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The RCC driver have no operation so the new NOP uclass is more appropriate. It only used as parent for clock and reset driver. Signed-off-by: Patrick Delaunay --- Changes in v2: - rebase v2019.10-rc1 drivers/misc/stm32_rcc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index 13d7069..e7efcde 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -68,8 +68,6 @@ static int stm32_rcc_bind(struct udevice *dev) dev_ofnode(dev), &child); } -static const struct misc_ops stm32_rcc_ops = { -}; static const struct udevice_id stm32_rcc_ids[] = { {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x }, @@ -82,8 +80,7 @@ static const struct udevice_id stm32_rcc_ids[] = { U_BOOT_DRIVER(stm32_rcc) = { .name = "stm32-rcc", - .id = UCLASS_MISC, + .id = UCLASS_NOP, .of_match = stm32_rcc_ids, .bind = stm32_rcc_bind, - .ops = &stm32_rcc_ops, };