From patchwork Mon Nov 6 16:02:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henrik Juul Pedersen X-Patchwork-Id: 834822 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=liab-dk.20150623.gappssmtp.com header.i=@liab-dk.20150623.gappssmtp.com header.b="LP16imDl"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yVy5L498hz9s7p for ; Tue, 7 Nov 2017 03:03:02 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753395AbdKFQDB (ORCPT ); Mon, 6 Nov 2017 11:03:01 -0500 Received: from mail-lf0-f66.google.com ([209.85.215.66]:56044 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753107AbdKFQDA (ORCPT ); Mon, 6 Nov 2017 11:03:00 -0500 Received: by mail-lf0-f66.google.com with SMTP id e143so11033629lfg.12 for ; Mon, 06 Nov 2017 08:03:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=liab-dk.20150623.gappssmtp.com; s=20150623; h=mime-version:from:date:message-id:subject:to:cc; bh=UMF/SqAduIe6/NPYB1j2P2onbt5JAcceZ4FcFSKXqpM=; b=LP16imDl0QthVLBC3jDfTVnslyO7vlkubdhaTC26SVa5Cn2kilqv+oa3W96rOQkzZf WnQS/kQdOleqgA7tcGuRjz6iUqm193+ahs9MIM1R8x5FUIR7kb13jyFiKXAodP87wfTH VeEcqPCs80Lh7i9629K9WMbbLWSg1pz5Gze8ujKQhRa6lTHcz50R7WkY4dXSoaRiOF0Y Ff7V4fN9NKzlE3YSVDV1aCuqVzyPo2YIg593q5viKwrMLUe8TBnAz00Ol0LiESY6ieFY Ej9kwQab9fB5UNsn1x8X1R6gZ+zOAhJdRrgzcYLT8Fv4xl2NYI9Doxyv983ptJ6jRQ6T IkTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=UMF/SqAduIe6/NPYB1j2P2onbt5JAcceZ4FcFSKXqpM=; b=MNBQncYvb8NK81ZgQU6TYKECvgPV5A2aH1YCdg9f7xI5dDVTuRSU2+mvjoLArjJjcf RuXWIXuLc/SWXP7JtBkmMN7dSt+JV0UsvDhvcZzO3AR0a7X/fNr7ynj4Z9fGZiswcZv6 SlhYaoHrVK7Sx2kVSCm+Ex9XfLtltiCGkIkEtU0IhdKhAThdvB66pW6GieVMws9nSPvl 9Gw81/MXmlttCtr2sKKW3qHLzLXdQM2CYXqgHRfewetNBc/jjT2UC5YV9u32CMKpoUWL CxvZ0utwJZKRgZkiKZ4tggxxPc3vXWciInF2i+ueaS/7kCovsbWZI210Az0CH18Hk2dz bi/A== X-Gm-Message-State: AJaThX6RZUcZxJ4HYGAsJ+2qacqgdzYo1BZ2vPj9quQxnL3hgNM9eicd Yw9KFrczM7IG7cjtL2oJnvqCNyDTsXJqlLunMbkNQw== X-Google-Smtp-Source: ABhQp+QGyza8w0GlR0QPQIaDJ23pU2x/TfMLdMeN4q039Ph5n/uSzqgNweI80J+VxcOxKIV7AMaeuVty0fKAmhhI5+I= X-Received: by 10.25.159.71 with SMTP id i68mr4650240lfe.37.1509984179514; Mon, 06 Nov 2017 08:02:59 -0800 (PST) MIME-Version: 1.0 Received: by 10.25.92.139 with HTTP; Mon, 6 Nov 2017 08:02:58 -0800 (PST) From: Henrik Juul Pedersen Date: Mon, 6 Nov 2017 17:02:58 +0100 Message-ID: Subject: [PATCH] pinctrl: Fix armada-37xx pmic pin group numbering To: Gregory Clement Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, Emil Vesterdahl Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Fix pin numbering in Marvell ARMADA 37xx pincontroller. The pmic0 and pmic1 pin groups start on pins 6 and 7 respectively. Signed-off-by: Henrik Juul Pedersen Acked-by: Gregory CLEMENT --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 71b94474..e223fac2 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -157,8 +157,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"), - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"), + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),