From patchwork Tue Jul 23 13:08:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135628 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK035qMNz9s4Y for ; Tue, 23 Jul 2019 23:22:27 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 13266C21ECE; Tue, 23 Jul 2019 13:19:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5582EC21DA1; Tue, 23 Jul 2019 13:19:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AB393C21C50; Tue, 23 Jul 2019 13:19:32 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 8DAA7C21C38 for ; Tue, 23 Jul 2019 13:19:32 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5DAE42002E4; Tue, 23 Jul 2019 15:19:32 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E0CF420001E; Tue, 23 Jul 2019 15:19:28 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4AC1F40309; Tue, 23 Jul 2019 21:19:24 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:52 +0800 Message-Id: <20190723130938.47805-2-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 01/47] powerpc: T208xRDB: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/t208xrdb/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/t208xrdb/pci.c b/board/freescale/t208xrdb/pci.c index 161b8cb..adc128d 100644 --- a/board/freescale/t208xrdb/pci.c +++ b/board/freescale/t208xrdb/pci.c @@ -11,6 +11,7 @@ #include #include +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; } +#endif From patchwork Tue Jul 23 13:08:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135629 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK0D0RgHz9s4Y for ; Tue, 23 Jul 2019 23:22:33 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 2E61BC21ECA; Tue, 23 Jul 2019 13:20:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DD1CEC21D9A; Tue, 23 Jul 2019 13:19:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E62DAC21C51; Tue, 23 Jul 2019 13:19:33 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 8A2D2C21C38 for ; Tue, 23 Jul 2019 13:19:33 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5A1AC1A014F; Tue, 23 Jul 2019 15:19:33 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A01731A0029; Tue, 23 Jul 2019 15:19:29 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 168DF40302; Tue, 23 Jul 2019 21:19:25 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:53 +0800 Message-Id: <20190723130938.47805-3-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 02/47] powerpc: T208xRDB: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/T208xRDB.h | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 1a5a93e..b1ae050 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -439,49 +439,51 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* controller 4, Base address 203000 */ #define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #ifdef CONFIG_PCI +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #define CONFIG_PCI_INDIRECT_BRIDGE +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif From patchwork Tue Jul 23 13:08:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135627 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tJz7732Pz9s4Y for ; Tue, 23 Jul 2019 23:21:39 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 83C52C21E08; Tue, 23 Jul 2019 13:20:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 640DEC21E30; Tue, 23 Jul 2019 13:19:41 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 663F6C21DCA; Tue, 23 Jul 2019 13:19:36 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 0F187C21C93 for ; Tue, 23 Jul 2019 13:19:34 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D436D20001E; Tue, 23 Jul 2019 15:19:33 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 62CA920006F; Tue, 23 Jul 2019 15:19:30 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id CCADD4030B; Tue, 23 Jul 2019 21:19:25 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:54 +0800 Message-Id: <20190723130938.47805-4-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 03/47] configs: T2080RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in T2080RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/T2080RDB_NAND_defconfig | 4 ++++ configs/T2080RDB_SDCARD_defconfig | 4 ++++ configs/T2080RDB_SPIFLASH_defconfig | 4 ++++ configs/T2080RDB_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 7eb7058..30ec72b 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -57,6 +57,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 9ea6698..22c2e05 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -56,6 +56,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 988897b..e70fa0d 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -56,6 +56,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 3f7e282..b620349 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -45,6 +45,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y From patchwork Tue Jul 23 13:08:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135678 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKKB56Dgz9s7T for ; Tue, 23 Jul 2019 23:37:18 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 73DCCC21D9A; Tue, 23 Jul 2019 13:20:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D43DFC21E44; Tue, 23 Jul 2019 13:19:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0B91BC21E35; Tue, 23 Jul 2019 13:19:39 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id E0752C21D8E for ; Tue, 23 Jul 2019 13:19:35 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AECFD20006F; Tue, 23 Jul 2019 15:19:35 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3FB1A2002CC; Tue, 23 Jul 2019 15:19:32 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8F14E4030C; Tue, 23 Jul 2019 21:19:26 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:55 +0800 Message-Id: <20190723130938.47805-5-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 04/47] powerpc: T4RDB: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/t4rdb/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/t4rdb/pci.c b/board/freescale/t4rdb/pci.c index 4100370..7d670e1 100644 --- a/board/freescale/t4rdb/pci.c +++ b/board/freescale/t4rdb/pci.c @@ -11,6 +11,7 @@ #include #include +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; } +#endif From patchwork Tue Jul 23 13:08:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135636 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK1w4n6Tz9s4Y for ; Tue, 23 Jul 2019 23:24:04 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 552F2C21E36; Tue, 23 Jul 2019 13:20:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 69934C21E3E; Tue, 23 Jul 2019 13:19:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 79376C21DB6; Tue, 23 Jul 2019 13:19:39 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id E1551C21E08 for ; Tue, 23 Jul 2019 13:19:35 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AD2951A0029; Tue, 23 Jul 2019 15:19:35 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3F6051A011C; Tue, 23 Jul 2019 15:19:32 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 5AF4C40310; Tue, 23 Jul 2019 21:19:27 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:56 +0800 Message-Id: <20190723130938.47805-6-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 05/47] dm: pcie_fsl: Add T4240 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for T4240 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index e13e5a6..961d8e3 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -616,6 +616,7 @@ static struct fsl_pcie_data t2080_data = { static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, + { .compatible = "fsl,pcie-t4240", .data = (ulong)&t2080_data }, { } }; From patchwork Tue Jul 23 13:08:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135666 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKCs2wxLz9s7T for ; Tue, 23 Jul 2019 23:32:41 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 24793C21E9F; Tue, 23 Jul 2019 13:22:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0209EC21C6A; Tue, 23 Jul 2019 13:20:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9D558C21E26; Tue, 23 Jul 2019 13:19:43 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 79460C21E1E for ; Tue, 23 Jul 2019 13:19:39 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 45B132002E8; Tue, 23 Jul 2019 15:19:39 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id CC31C2002A4; Tue, 23 Jul 2019 15:19:35 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 269E940319; Tue, 23 Jul 2019 21:19:28 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:57 +0800 Message-Id: <20190723130938.47805-7-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 06/47] t4240: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" T4240 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 3.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/t4240.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi index 4d8fc71..fc34974 100644 --- a/arch/powerpc/dts/t4240.dtsi +++ b/arch/powerpc/dts/t4240.dtsi @@ -99,4 +99,52 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe240000 { + compatible = "fsl,pcie-t4240", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe240000 0x0 0x4000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe250000 { + compatible = "fsl,pcie-t4240", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe250000 0x0 0x4000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe260000 { + compatible = "fsl,pcie-t4240", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe260000 0x0 0x4000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe270000 { + compatible = "fsl,pcie-t4240", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe270000 0x0 0x4000>; /* registers */ + law_trgt_if = <3>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8030000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x60000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:08:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135692 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKRh6PHVz9sBt for ; Tue, 23 Jul 2019 23:42:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 34970C21E57; Tue, 23 Jul 2019 13:21:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8ED49C21D8E; Tue, 23 Jul 2019 13:20:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E8CD1C21E1D; Tue, 23 Jul 2019 13:19:43 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id D3DE4C21DF8 for ; Tue, 23 Jul 2019 13:19:39 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A67592002A4; Tue, 23 Jul 2019 15:19:39 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id EC4BA2002CC; Tue, 23 Jul 2019 15:19:35 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id DD4074031B; Tue, 23 Jul 2019 21:19:28 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:58 +0800 Message-Id: <20190723130938.47805-8-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 07/47] powerpc: T4240RDB: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/T4240RDB.h | 35 +++++++++++++++++++---------------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a818f0c..8cdc17c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -63,7 +63,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_ENV_OVERWRITE @@ -178,44 +177,48 @@ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* controller 4, Base address 203000 */ #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #ifdef CONFIG_PCI +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #define CONFIG_PCI_INDIRECT_BRIDGE +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:08:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135662 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKBk3K0Mz9s7T for ; Tue, 23 Jul 2019 23:31:42 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 34F0EC21E89; Tue, 23 Jul 2019 13:21:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 83C15C21E60; Tue, 23 Jul 2019 13:20:10 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 031C0C21C38; Tue, 23 Jul 2019 13:19:44 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 46E40C21CB1 for ; Tue, 23 Jul 2019 13:19:40 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 18D5020006F; Tue, 23 Jul 2019 15:19:40 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9E57320001E; Tue, 23 Jul 2019 15:19:36 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9F3AA40326; Tue, 23 Jul 2019 21:19:29 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:08:59 +0800 Message-Id: <20190723130938.47805-9-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 08/47] configs: T4240RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in T4240RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/T4240RDB_SDCARD_defconfig | 4 ++++ configs/T4240RDB_defconfig | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index a70c237..cce4872 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -50,6 +50,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index d4ce176..bdadfa8 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -39,6 +39,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y From patchwork Tue Jul 23 13:09:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135635 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK1q6kVmz9s4Y for ; Tue, 23 Jul 2019 23:23:59 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 837F3C21E9F; Tue, 23 Jul 2019 13:21:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9EC43C21E31; Tue, 23 Jul 2019 13:20:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EBB6AC21C4A; Tue, 23 Jul 2019 13:19:45 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 43E3BC21C50 for ; Tue, 23 Jul 2019 13:19:41 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 157EE200125; Tue, 23 Jul 2019 15:19:41 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9B8372002D8; Tue, 23 Jul 2019 15:19:37 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 6AF4D40327; Tue, 23 Jul 2019 21:19:30 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:00 +0800 Message-Id: <20190723130938.47805-10-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 09/47] powerpc: T102xRDB: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/t102xrdb/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/t102xrdb/pci.c b/board/freescale/t102xrdb/pci.c index 161b8cb..adc128d 100644 --- a/board/freescale/t102xrdb/pci.c +++ b/board/freescale/t102xrdb/pci.c @@ -11,6 +11,7 @@ #include #include +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; } +#endif From patchwork Tue Jul 23 13:09:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135637 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK4K6cwmz9s4Y for ; Tue, 23 Jul 2019 23:26:09 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 7BAF5C21DE8; Tue, 23 Jul 2019 13:21:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8A5FCC21E4E; Tue, 23 Jul 2019 13:20:04 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DDCD0C21E08; Tue, 23 Jul 2019 13:19:44 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 1A69EC21DE8 for ; Tue, 23 Jul 2019 13:19:41 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DEACC2002A4; Tue, 23 Jul 2019 15:19:40 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6D825200125; Tue, 23 Jul 2019 15:19:37 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 364C44032A; Tue, 23 Jul 2019 21:19:31 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:01 +0800 Message-Id: <20190723130938.47805-11-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 10/47] dm: pcie_fsl: Add T102x PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for T102x PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 961d8e3..25df84d 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -615,6 +615,7 @@ static struct fsl_pcie_data t2080_data = { }; static const struct udevice_id fsl_pcie_ids[] = { + { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t4240", .data = (ulong)&t2080_data }, { } From patchwork Tue Jul 23 13:09:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135685 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKLc4CQgz9s7T for ; Tue, 23 Jul 2019 23:38:32 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 52598C21E29; Tue, 23 Jul 2019 13:22:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 57F39C21E74; Tue, 23 Jul 2019 13:20:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 82ECCC21E30; Tue, 23 Jul 2019 13:19:46 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id BE677C21E31 for ; Tue, 23 Jul 2019 13:19:41 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8F1BD20006F; Tue, 23 Jul 2019 15:19:41 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 208842002E4; Tue, 23 Jul 2019 15:19:38 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 01A3E40307; Tue, 23 Jul 2019 21:19:31 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:02 +0800 Message-Id: <20190723130938.47805-12-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 11/47] t102x: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" T102x integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/t102x.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/powerpc/dts/t102x.dtsi b/arch/powerpc/dts/t102x.dtsi index 2393e31..c49fd21 100644 --- a/arch/powerpc/dts/t102x.dtsi +++ b/arch/powerpc/dts/t102x.dtsi @@ -49,4 +49,40 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe240000 { + compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe240000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; + + pcie@ffe250000 { + compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe250000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; + + pcie@ffe260000 { + compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe260000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135641 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK5b1NMpz9s4Y for ; Tue, 23 Jul 2019 23:27:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 4D630C21C38; Tue, 23 Jul 2019 13:22:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F39E9C21E75; Tue, 23 Jul 2019 13:20:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CA2FDC21E77; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 5BDA2C21E35 for ; Tue, 23 Jul 2019 13:19:42 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2D03B2002D8; Tue, 23 Jul 2019 15:19:42 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B3F1B2002F2; Tue, 23 Jul 2019 15:19:38 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id B8ADF40309; Tue, 23 Jul 2019 21:19:32 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:03 +0800 Message-Id: <20190723130938.47805-13-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 12/47] powerpc: T102xRDB: Remove the useless macro CONFIG_ARCH_T1040 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and the PCIE4 related macros, as there are only 3 PCIe controllers on T102x SoCs. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/T102xRDB.h | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index cce65f5..3715e25 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -500,9 +500,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#ifdef CONFIG_ARCH_T1040 -#define CONFIG_PCIE4 /* PCIE controller 4 */ -#endif #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_PCI_INDIRECT_BRIDGE @@ -571,27 +568,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif -/* controller 4, Base address 203000, to be removed */ -#ifdef CONFIG_PCIE4 -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull -#else -#define CONFIG_SYS_PCIE4_MEM_BUS 0xb0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xb0000000 -#endif -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#else -#define CONFIG_SYS_PCIE4_IO_PHYS 0xf8030000 -#endif -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ -#endif - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135667 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKD52YCjz9s7T for ; Tue, 23 Jul 2019 23:32:53 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E5460C21E63; Tue, 23 Jul 2019 13:20:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E3EFBC21DF8; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 99EAFC21E4E; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id E22D9C21E3A for ; Tue, 23 Jul 2019 13:19:42 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A76BA1A0239; Tue, 23 Jul 2019 15:19:42 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ED1211A0235; Tue, 23 Jul 2019 15:19:38 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7B14840302; Tue, 23 Jul 2019 21:19:33 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:04 +0800 Message-Id: <20190723130938.47805-14-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 13/47] powerpc: T102xRDB: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/T102xRDB.h | 54 +++++++++++++--------------------------------- 1 file changed, 15 insertions(+), 39 deletions(-) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3715e25..4fb1709 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -500,72 +500,48 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_PCI_INDIRECT_BRIDGE #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #ifdef CONFIG_PCIE1 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 -#endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 -#endif -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #endif /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #ifdef CONFIG_PCIE2 #define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull -#else -#define CONFIG_SYS_PCIE2_MEM_BUS 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0x90000000 -#endif -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 -#endif -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ #endif /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #ifdef CONFIG_PCIE3 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull -#else -#define CONFIG_SYS_PCIE3_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xa0000000 -#endif -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#else -#define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000 #endif + +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_PCI_INDIRECT_BRIDGE #endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ From patchwork Tue Jul 23 13:09:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135659 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKBN5FDGz9s7T for ; Tue, 23 Jul 2019 23:31:24 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 73785C21E7F; Tue, 23 Jul 2019 13:21:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 45262C21E6A; Tue, 23 Jul 2019 13:20:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3EEA2C21E57; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id E2329C21E3E for ; Tue, 23 Jul 2019 13:19:42 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B4CC61A026D; Tue, 23 Jul 2019 15:19:42 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 46B011A0237; Tue, 23 Jul 2019 15:19:39 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3D1DB4030B; Tue, 23 Jul 2019 21:19:34 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:05 +0800 Message-Id: <20190723130938.47805-15-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 14/47] configs: T1024RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in T1024RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/T1024RDB_NAND_defconfig | 4 ++++ configs/T1024RDB_SDCARD_defconfig | 4 ++++ configs/T1024RDB_SPIFLASH_defconfig | 4 ++++ configs/T1024RDB_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 30acd0e..faea7d2 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -60,6 +60,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 7569e4e..bce2fc3 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -59,6 +59,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 470674b..55f80f8 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -60,6 +60,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 146551d..f8b3227 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -48,6 +48,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135690 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKPt07SMz9s4Y for ; Tue, 23 Jul 2019 23:41:21 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 6E1F9C21E96; Tue, 23 Jul 2019 13:22:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D6C05C21C38; Tue, 23 Jul 2019 13:20:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01ACFC21E77; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id E5F42C21E42 for ; Tue, 23 Jul 2019 13:19:42 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B617320006F; Tue, 23 Jul 2019 15:19:42 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 483052002F5; Tue, 23 Jul 2019 15:19:39 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id F3B73402F6; Tue, 23 Jul 2019 21:19:34 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:06 +0800 Message-Id: <20190723130938.47805-16-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 15/47] powerpc: T104xRDB: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/t104xrdb/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/t104xrdb/pci.c b/board/freescale/t104xrdb/pci.c index 9fd6659..6b666ba 100644 --- a/board/freescale/t104xrdb/pci.c +++ b/board/freescale/t104xrdb/pci.c @@ -11,6 +11,7 @@ #include #include +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; } +#endif From patchwork Tue Jul 23 13:09:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135660 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKBT6zQyz9s4Y for ; Tue, 23 Jul 2019 23:31:29 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A667CC21E63; Tue, 23 Jul 2019 13:21:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 12EBAC21E2C; Tue, 23 Jul 2019 13:20:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2F250C21C38; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 427B6C21E16 for ; Tue, 23 Jul 2019 13:19:44 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 130AE2002A4; Tue, 23 Jul 2019 15:19:44 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9901720001E; Tue, 23 Jul 2019 15:19:40 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id BEEC84030C; Tue, 23 Jul 2019 21:19:35 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:07 +0800 Message-Id: <20190723130938.47805-17-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 16/47] dm: pcie_fsl: Add T104x PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for T104x PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 25df84d..c4b4ace 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -616,6 +616,7 @@ static struct fsl_pcie_data t2080_data = { static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, + { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t4240", .data = (ulong)&t2080_data }, { } From patchwork Tue Jul 23 13:09:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135658 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK9w5mn1z9s4Y for ; Tue, 23 Jul 2019 23:31:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1DFD2C21E85; Tue, 23 Jul 2019 13:20:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 77307C21E36; Tue, 23 Jul 2019 13:19:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 87839C21E1E; Tue, 23 Jul 2019 13:19:49 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 512E9C21E29 for ; Tue, 23 Jul 2019 13:19:44 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 242951A0237; Tue, 23 Jul 2019 15:19:44 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AA3D91A0009; Tue, 23 Jul 2019 15:19:40 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8A33740310; Tue, 23 Jul 2019 21:19:36 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:08 +0800 Message-Id: <20190723130938.47805-18-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 17/47] t104x: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" T104x integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/t104x.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/powerpc/dts/t104x.dtsi b/arch/powerpc/dts/t104x.dtsi index ff0da93..5998967 100644 --- a/arch/powerpc/dts/t104x.dtsi +++ b/arch/powerpc/dts/t104x.dtsi @@ -59,4 +59,52 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe240000 { + compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe240000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; + + pcie@ffe250000 { + compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe250000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; + + pcie@ffe260000 { + compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe260000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; + + pcie@ffe270000 { + compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe270000 0x0 0x1000>; /* registers */ + law_trgt_if = <3>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8030000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x30000000 0x0 0x10000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135671 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKFJ4q74z9s7T for ; Tue, 23 Jul 2019 23:33:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5F8BCC21E8A; Tue, 23 Jul 2019 13:24:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CC883C21E2C; Tue, 23 Jul 2019 13:21:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D1279C21C51; Tue, 23 Jul 2019 13:19:50 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 0A209C21E34 for ; Tue, 23 Jul 2019 13:19:46 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CF1501A0009; Tue, 23 Jul 2019 15:19:45 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 201741A0029; Tue, 23 Jul 2019 15:19:42 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 519A440328; Tue, 23 Jul 2019 21:19:37 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:09 +0800 Message-Id: <20190723130938.47805-19-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 18/47] powerpc: T104xRDB: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/T104xRDB.h | 38 ++++++++++++++++++++------------------ 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 470f60a..5d9dd10 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -151,13 +151,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_ENV_OVERWRITE @@ -530,51 +528,55 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #ifdef CONFIG_PCIE1 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #endif /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #ifdef CONFIG_PCIE2 #define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ #endif /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #ifdef CONFIG_PCIE3 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif /* controller 4, Base address 203000 */ #ifdef CONFIG_PCIE4 #define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_PCI_INDIRECT_BRIDGE +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135686 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKMS0JHlz9s4Y for ; Tue, 23 Jul 2019 23:39:15 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id B3DCAC21E45; Tue, 23 Jul 2019 13:27:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9E299C21EDE; Tue, 23 Jul 2019 13:22:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D15E8C21EC9; Tue, 23 Jul 2019 13:19:51 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 2FE5FC21E4F for ; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 005141A00C6; Tue, 23 Jul 2019 15:19:47 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 86D0C1A011C; Tue, 23 Jul 2019 15:19:43 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 137C44032C; Tue, 23 Jul 2019 21:19:38 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:10 +0800 Message-Id: <20190723130938.47805-20-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 19/47] configs: T1042D4RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in T1042D4RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/T1042D4RDB_NAND_defconfig | 4 ++++ configs/T1042D4RDB_SDCARD_defconfig | 4 ++++ configs/T1042D4RDB_SPIFLASH_defconfig | 4 ++++ configs/T1042D4RDB_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 2edd3b3..e51124b 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index f5a8613..fa9b3e3 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -57,6 +57,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 945740a..fdec9a2 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 3be988c..86c0a7f 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -46,6 +46,10 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135645 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK8C681gz9s4Y for ; Tue, 23 Jul 2019 23:29:31 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 0E29DC21E3A; Tue, 23 Jul 2019 13:24:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AB1FBC21E29; Tue, 23 Jul 2019 13:21:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6179CC21E39; Tue, 23 Jul 2019 13:19:50 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id BD8E6C21C38 for ; Tue, 23 Jul 2019 13:19:46 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8E7D01A0029; Tue, 23 Jul 2019 15:19:46 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 2080C1A0235; Tue, 23 Jul 2019 15:19:43 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id CA3714032D; Tue, 23 Jul 2019 21:19:38 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:11 +0800 Message-Id: <20190723130938.47805-21-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 20/47] powerpc: p1_p2_rdb: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines for P1020, P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 4b151e8..5982a91 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -277,7 +277,7 @@ int checkboard(void) return 0; } -#ifdef CONFIG_PCI +#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -443,7 +443,9 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory(blob, (u64)base, (u64)size); +#if !defined(CONFIG_DM_PCI) FT_FSL_PCI_SETUP; +#endif #ifdef CONFIG_QE do_fixup_by_compat(blob, "fsl,qe", "status", "okay", From patchwork Tue Jul 23 13:09:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135665 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKCr3CCkz9s4Y for ; Tue, 23 Jul 2019 23:32:40 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 0DE04C21C50; Tue, 23 Jul 2019 13:25:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F3F29C21E5B; Tue, 23 Jul 2019 13:21:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0655AC21DA1; Tue, 23 Jul 2019 13:19:51 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 61A10C21DF8 for ; Tue, 23 Jul 2019 13:19:47 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 33C0F2002D8; Tue, 23 Jul 2019 15:19:47 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B9B3C200125; Tue, 23 Jul 2019 15:19:43 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9574C40319; Tue, 23 Jul 2019 21:19:39 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:12 +0800 Message-Id: <20190723130938.47805-22-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 21/47] dm: pcie_fsl: Add PCIe support for P1 and P2 series SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for PCIe of P1020, P1021, P1024, P1025 and P2020 SoCs. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index c4b4ace..c8b8e3b 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -608,6 +608,12 @@ static const struct dm_pci_ops fsl_pcie_ops = { .write_config = fsl_pcie_write_config, }; +static struct fsl_pcie_data p1_p2_data = { + .block_offset = 0xa000, + .block_offset_mask = 0xffff, + .stride = 0x1000, +}; + static struct fsl_pcie_data t2080_data = { .block_offset = 0x240000, .block_offset_mask = 0x3fffff, @@ -615,6 +621,7 @@ static struct fsl_pcie_data t2080_data = { }; static const struct udevice_id fsl_pcie_ids[] = { + { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, From patchwork Tue Jul 23 13:09:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135631 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK1236NNz9s4Y for ; Tue, 23 Jul 2019 23:23:18 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id F2690C21D9A; Tue, 23 Jul 2019 13:23:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5E100C21E7D; Tue, 23 Jul 2019 13:20:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 25394C21DA6; Tue, 23 Jul 2019 13:19:52 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 67632C21E16 for ; Tue, 23 Jul 2019 13:19:48 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3716D2002D8; Tue, 23 Jul 2019 15:19:48 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7C6FB20001E; Tue, 23 Jul 2019 15:19:44 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 60BB4402FC; Tue, 23 Jul 2019 21:19:40 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:13 +0800 Message-Id: <20190723130938.47805-23-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 22/47] P1020: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P1020 integrated 2 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p1020-post.dtsi | 20 ++++++++++++++++++++ arch/powerpc/dts/p1020rdb-pc.dts | 12 ++++++++++++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 12 ++++++++++++ arch/powerpc/dts/p1020rdb-pd.dts | 12 ++++++++++++ 4 files changed, 56 insertions(+) diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi index e1a4f50..1e5e678 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -25,3 +25,23 @@ last-interrupt-source = <255>; }; }; + +/* PCIe controller base address 0x9000 */ +&pci1 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; + +/* PCIe controller base address 0xa000 */ +&pci0 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts index fd68b8b..7ebaa61 100644 --- a/arch/powerpc/dts/p1020rdb-pc.dts +++ b/arch/powerpc/dts/p1020rdb-pc.dts @@ -18,6 +18,18 @@ soc: soc@ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; }; + + pci1: pcie@ffe09000 { + reg = <0x0 0xffe09000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pci0: pcie@ffe0a000 { + reg = <0x0 0xffe0a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts index a23d031..c0e5ef4 100644 --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts @@ -18,6 +18,18 @@ soc: soc@fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; }; + + pci1: pcie@fffe09000 { + reg = <0xf 0xffe09000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pci0: pcie@fffe0a000 { + reg = <0xf 0xffe0a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts index 81f25a3..21174a0 100644 --- a/arch/powerpc/dts/p1020rdb-pd.dts +++ b/arch/powerpc/dts/p1020rdb-pd.dts @@ -18,6 +18,18 @@ soc: soc@ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; }; + + pci1: pcie@ffe09000 { + reg = <0x0 0xffe09000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pci0: pcie@ffe0a000 { + reg = <0x0 0xffe0a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "p1020-post.dtsi" From patchwork Tue Jul 23 13:09:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135657 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK9C5Dn5z9sNF for ; Tue, 23 Jul 2019 23:30:23 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 616A8C21D72; Tue, 23 Jul 2019 13:24:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9B622C21E39; Tue, 23 Jul 2019 13:21:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5C87DC21E31; Tue, 23 Jul 2019 13:19:52 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id DAC89C21E0D for ; Tue, 23 Jul 2019 13:19:48 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AD67D2002E8; Tue, 23 Jul 2019 15:19:48 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3F4332002A4; Tue, 23 Jul 2019 15:19:45 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 2336B4031B; Tue, 23 Jul 2019 21:19:41 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:14 +0800 Message-Id: <20190723130938.47805-24-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 23/47] powerpc: p1_p2_rdb: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled for P1020, P1021, P1024, P1025 and P2020 RDB boards. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/p1_p2_rdb_pc.h | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index b1367a9..d3fb3da 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -215,8 +215,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_ENV_OVERWRITE @@ -580,44 +578,56 @@ */ /* controller 2, direct to uli, tgtid 2, Base address 9000 */ -#define CONFIG_SYS_PCIE2_NAME "PCIe SLOT" #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull #else #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 1, Slot 2, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_NAME "mini PCIe SLOT" #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull #else #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #endif + +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE +#define CONFIG_SYS_PCIE2_NAME "PCIe SLOT" +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 +#else +#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 +#endif +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ + +#define CONFIG_SYS_PCIE1_NAME "mini PCIe SLOT" +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#else +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#endif +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135697 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKT92ZQsz9s4Y for ; Tue, 23 Jul 2019 23:44:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D1A04C21EDE; Tue, 23 Jul 2019 13:24:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 73852C21DE8; Tue, 23 Jul 2019 13:21:26 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3901AC21E88; Tue, 23 Jul 2019 13:19:53 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 4B267C21E36 for ; Tue, 23 Jul 2019 13:19:50 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 1BAAE2002E8; Tue, 23 Jul 2019 15:19:50 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 00C372002E4; Tue, 23 Jul 2019 15:19:46 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id D9D7F40307; Tue, 23 Jul 2019 21:19:41 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:15 +0800 Message-Id: <20190723130938.47805-25-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 24/47] configs: P1020RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P1020RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P1020RDB-PC_36BIT_NAND_defconfig | 4 ++++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 4 ++++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 4 ++++ configs/P1020RDB-PC_36BIT_defconfig | 4 ++++ configs/P1020RDB-PC_NAND_defconfig | 4 ++++ configs/P1020RDB-PC_SDCARD_defconfig | 4 ++++ configs/P1020RDB-PC_SPIFLASH_defconfig | 4 ++++ configs/P1020RDB-PC_defconfig | 4 ++++ configs/P1020RDB-PD_NAND_defconfig | 4 ++++ configs/P1020RDB-PD_SDCARD_defconfig | 4 ++++ configs/P1020RDB-PD_SPIFLASH_defconfig | 4 ++++ configs/P1020RDB-PD_defconfig | 4 ++++ 12 files changed, 48 insertions(+) diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 8fce49d..557fb49 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -55,6 +55,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 80a4a0a..28ec227 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -52,6 +52,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index ee565d4..84b88ae 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -53,6 +53,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 7d7c55f..fea964d 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -42,6 +42,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index b729089..62199b9 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -54,6 +54,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 4622efd..f10e4fa 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -51,6 +51,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 9cd897f..bacae37 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -52,6 +52,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 595ff5f..0a6f974 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -41,6 +41,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index b45122d..2c41054 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index c559879..7f0c7d4 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -55,6 +55,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 1de88fc..d664a09 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -56,6 +56,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 0963553..db78cf4 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -45,6 +45,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y From patchwork Tue Jul 23 13:09:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135682 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKL85kJhz9s4Y for ; Tue, 23 Jul 2019 23:38:08 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 67196C21DF8; Tue, 23 Jul 2019 13:23:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 747E6C21EA6; Tue, 23 Jul 2019 13:20:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id ADF1DC21E7F; Tue, 23 Jul 2019 13:19:53 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 9FAE0C21E50 for ; Tue, 23 Jul 2019 13:19:50 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 718CB2002A4; Tue, 23 Jul 2019 15:19:50 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B722520006F; Tue, 23 Jul 2019 15:19:46 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9BCDA40309; Tue, 23 Jul 2019 21:19:42 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:16 +0800 Message-Id: <20190723130938.47805-26-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 25/47] P2020: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P2020 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p2020-post.dtsi | 30 ++++++++++++++++++++++++++++++ arch/powerpc/dts/p2020rdb-pc.dts | 17 +++++++++++++++++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 17 +++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index f20d1fa..f696f35 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -25,3 +25,33 @@ last-interrupt-source = <255>; }; }; + +/* PCIe controller base address 0x8000 */ +&pci2 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; + +/* PCIe controller base address 0x9000 */ +&pci1 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; + +/* PCIe controller base address 0xa000 */ +&pci0 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts index 4800b76..08befd4 100644 --- a/arch/powerpc/dts/p2020rdb-pc.dts +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -18,6 +18,23 @@ soc: soc@ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; }; + + pci2: pcie@ffe08000 { + reg = <0x0 0xffe08000 0x0 0x1000>; /* registers */ + status = "disabled"; + }; + + pci1: pcie@ffe09000 { + reg = <0x0 0xffe09000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pci0: pcie@ffe0a000 { + reg = <0x0 0xffe0a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts index 8323b90..04b2519 100644 --- a/arch/powerpc/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -18,6 +18,23 @@ soc: soc@fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; }; + + pci2: pcie@fffe08000 { + reg = <0xf 0xffe08000 0x0 0x1000>; /* registers */ + status = "disabled"; + }; + + pci1: pcie@fffe09000 { + reg = <0xf 0xffe09000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pci0: pcie@fffe0a000 { + reg = <0xf 0xffe0a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "p2020-post.dtsi" From patchwork Tue Jul 23 13:09:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135664 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKCc6RZcz9sBF for ; Tue, 23 Jul 2019 23:32:28 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 53590C21E90; Tue, 23 Jul 2019 13:26:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BD299C21E07; Tue, 23 Jul 2019 13:22:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 91DCCC21DF3; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 5C241C21E35 for ; Tue, 23 Jul 2019 13:19:51 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2CCB42002D8; Tue, 23 Jul 2019 15:19:51 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 792F0200125; Tue, 23 Jul 2019 15:19:47 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 5E44B402F6; Tue, 23 Jul 2019 21:19:43 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:17 +0800 Message-Id: <20190723130938.47805-27-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 26/47] configs: P2020RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P2020RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P2020RDB-PC_36BIT_NAND_defconfig | 4 ++++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 4 ++++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 4 ++++ configs/P2020RDB-PC_36BIT_defconfig | 4 ++++ configs/P2020RDB-PC_NAND_defconfig | 4 ++++ configs/P2020RDB-PC_SDCARD_defconfig | 4 ++++ configs/P2020RDB-PC_SPIFLASH_defconfig | 4 ++++ configs/P2020RDB-PC_defconfig | 4 ++++ 8 files changed, 32 insertions(+) diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index d8c04e2..a51a34c 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -60,6 +60,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 7c45996..9c97b3d 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -57,6 +57,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 5372d98..fee83e5 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 79f4f3c..bb5c6bd 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -47,6 +47,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 2f91691..610bd96 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -59,6 +59,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index a5cee06..46d430c 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -56,6 +56,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index a2f9d87..f3eb66e 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -57,6 +57,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 4000459..b94c67e 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -46,6 +46,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y From patchwork Tue Jul 23 13:09:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135672 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKGj17J7z9s4Y for ; Tue, 23 Jul 2019 23:35:09 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id CEDCFC21E29; Tue, 23 Jul 2019 13:22:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A9E6FC21E0B; Tue, 23 Jul 2019 13:20:28 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B18C0C21E1D; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id E525EC21D72 for ; Tue, 23 Jul 2019 13:19:51 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B5AFE200125; Tue, 23 Jul 2019 15:19:51 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 45BC72002F2; Tue, 23 Jul 2019 15:19:48 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 206DC40302; Tue, 23 Jul 2019 21:19:44 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:18 +0800 Message-Id: <20190723130938.47805-28-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 27/47] powerpc: p_corenet: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines for P2041RDB, P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/common/p_corenet/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/common/p_corenet/pci.c b/board/freescale/common/p_corenet/pci.c index a2df928..a6abe66 100644 --- a/board/freescale/common/p_corenet/pci.c +++ b/board/freescale/common/p_corenet/pci.c @@ -11,6 +11,7 @@ #include #include +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; } +#endif From patchwork Tue Jul 23 13:09:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135670 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKFB0djmz9s7T for ; Tue, 23 Jul 2019 23:33:49 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id B9FE1C21E77; Tue, 23 Jul 2019 13:25:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 946BEC21EBE; Tue, 23 Jul 2019 13:21:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 41B26C21EA1; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id AFBEAC21DF8 for ; Tue, 23 Jul 2019 13:19:52 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7F4A32002E6; Tue, 23 Jul 2019 15:19:52 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 108DF20001E; Tue, 23 Jul 2019 15:19:49 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E03814030B; Tue, 23 Jul 2019 21:19:44 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:19 +0800 Message-Id: <20190723130938.47805-29-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 28/47] dm: pcie_fsl: Add P2041 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for P2041 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index c8b8e3b..61f08e7 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -614,6 +614,12 @@ static struct fsl_pcie_data p1_p2_data = { .stride = 0x1000, }; +static struct fsl_pcie_data p2041_data = { + .block_offset = 0x200000, + .block_offset_mask = 0x3fffff, + .stride = 0x1000, +}; + static struct fsl_pcie_data t2080_data = { .block_offset = 0x240000, .block_offset_mask = 0x3fffff, @@ -622,6 +628,7 @@ static struct fsl_pcie_data t2080_data = { static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, + { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, From patchwork Tue Jul 23 13:09:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135684 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKLc0nDJz9s4Y for ; Tue, 23 Jul 2019 23:38:32 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C1772C21E44; Tue, 23 Jul 2019 13:24:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 1582DC21E30; Tue, 23 Jul 2019 13:21:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 740D0C21E38; Tue, 23 Jul 2019 13:19:55 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 71425C21E16 for ; Tue, 23 Jul 2019 13:19:53 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 41E881A014F; Tue, 23 Jul 2019 15:19:53 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C7B121A0009; Tue, 23 Jul 2019 15:19:49 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id AB6AC4030C; Tue, 23 Jul 2019 21:19:45 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:20 +0800 Message-Id: <20190723130938.47805-30-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 29/47] P2041: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P2041 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p2041.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/powerpc/dts/p2041.dtsi b/arch/powerpc/dts/p2041.dtsi index 9aa0422..55f7adc 100644 --- a/arch/powerpc/dts/p2041.dtsi +++ b/arch/powerpc/dts/p2041.dtsi @@ -60,4 +60,40 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe200000 { + compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe200000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe201000 { + compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe201000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe202000 { + compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe202000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135669 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKDs3JJtz9s7T for ; Tue, 23 Jul 2019 23:33:33 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 34230C21E9F; Tue, 23 Jul 2019 13:23:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DBD60C21E47; Tue, 23 Jul 2019 13:20:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6F718C21E47; Tue, 23 Jul 2019 13:19:56 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 74825C21E2C for ; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 457AC1A00C6; Tue, 23 Jul 2019 15:19:54 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8A5D31A0029; Tue, 23 Jul 2019 15:19:50 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 6E09C40310; Tue, 23 Jul 2019 21:19:46 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:21 +0800 Message-Id: <20190723130938.47805-31-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 30/47] powerpc: P2041RDB: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/P2041RDB.h | 55 +++++++++++++--------------------------------- 1 file changed, 15 insertions(+), 40 deletions(-) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b433308..ba670d7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -37,7 +37,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_SYS_SRIO @@ -354,60 +353,21 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 -#endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 -#endif -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#else -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 -#endif -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 -#endif -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#else -#define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc0000000 -#endif -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#else -#define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000 -#endif -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 @@ -489,7 +449,22 @@ unsigned long get_board_sys_clk(unsigned long dummy); #endif #ifdef CONFIG_PCI +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135699 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKWM3W67z9s4Y for ; Tue, 23 Jul 2019 23:46:07 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1387CC21EC9; Tue, 23 Jul 2019 13:27:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 20D93C21E0B; Tue, 23 Jul 2019 13:22:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BC8EBC21C6A; Tue, 23 Jul 2019 13:19:57 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id E945BC21E35 for ; Tue, 23 Jul 2019 13:19:54 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id BA3171A0029; Tue, 23 Jul 2019 15:19:54 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4C6E11A011C; Tue, 23 Jul 2019 15:19:51 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 30F8A40326; Tue, 23 Jul 2019 21:19:47 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:22 +0800 Message-Id: <20190723130938.47805-32-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 31/47] configs: P2041RDB: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P2041RDB defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P2041RDB_NAND_defconfig | 4 ++++ configs/P2041RDB_SDCARD_defconfig | 4 ++++ configs/P2041RDB_SPIFLASH_defconfig | 4 ++++ configs/P2041RDB_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 73baf49..43434aa 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -41,6 +41,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index d75f8b1..8d0efa4 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 925f0cd..eadb35b 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 1923b7a..8208907 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -39,6 +39,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135644 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK8D56rvz9s7T for ; Tue, 23 Jul 2019 23:29:32 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 531C5C21E31; Tue, 23 Jul 2019 13:25:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D3880C21EA2; Tue, 23 Jul 2019 13:21:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 19AACC21D9A; Tue, 23 Jul 2019 13:19:58 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id B3DA9C21E4E for ; Tue, 23 Jul 2019 13:19:55 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 86C512002D8; Tue, 23 Jul 2019 15:19:55 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 188F32002E4; Tue, 23 Jul 2019 15:19:52 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E776F40319; Tue, 23 Jul 2019 21:19:47 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:23 +0800 Message-Id: <20190723130938.47805-33-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 32/47] dm: pcie_fsl: Add P3041 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for P3041 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 61f08e7..a4e0cd1 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -629,6 +629,7 @@ static struct fsl_pcie_data t2080_data = { static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, + { .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, From patchwork Tue Jul 23 13:09:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135673 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKGm6mVbz9s7T for ; Tue, 23 Jul 2019 23:35:12 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id ACC0BC21E16; Tue, 23 Jul 2019 13:23:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 85D62C21E3E; Tue, 23 Jul 2019 13:20:40 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 19BFFC21E85; Tue, 23 Jul 2019 13:19:58 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 771DAC21E16 for ; Tue, 23 Jul 2019 13:19:56 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 493D42002A4; Tue, 23 Jul 2019 15:19:56 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id CEE462002E8; Tue, 23 Jul 2019 15:19:52 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id B33FA402FC; Tue, 23 Jul 2019 21:19:48 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:24 +0800 Message-Id: <20190723130938.47805-34-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 33/47] P3041: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P3041 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p3041.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/powerpc/dts/p3041.dtsi b/arch/powerpc/dts/p3041.dtsi index 7d5c713..197896d 100644 --- a/arch/powerpc/dts/p3041.dtsi +++ b/arch/powerpc/dts/p3041.dtsi @@ -60,4 +60,52 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe200000 { + compatible = "fsl,pcie-p3041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe200000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe201000 { + compatible = "fsl,pcie-p3041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe201000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe202000 { + compatible = "fsl,pcie-p3041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe202000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe203000 { + compatible = "fsl,pcie-p3041", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe203000 0x0 0x1000>; /* registers */ + law_trgt_if = <3>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8030000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x60000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135674 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKH95NW7z9s4Y for ; Tue, 23 Jul 2019 23:35:33 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id BFD0EC21E74; Tue, 23 Jul 2019 13:26:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7C488C21E45; Tue, 23 Jul 2019 13:22:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9BB6DC21DA1; Tue, 23 Jul 2019 13:20:00 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id EA3C7C21C38 for ; Tue, 23 Jul 2019 13:19:57 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BBB4A2002E6; Tue, 23 Jul 2019 15:19:57 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0C13020001E; Tue, 23 Jul 2019 15:19:54 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 75DAB4031B; Tue, 23 Jul 2019 21:19:49 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:25 +0800 Message-Id: <20190723130938.47805-35-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 34/47] powerpc: corenet_ds: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/corenet_ds.h | 63 +++++++++++++------------------------------- 1 file changed, 19 insertions(+), 44 deletions(-) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index f974291..07844c1 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_ENV_OVERWRITE @@ -362,68 +361,25 @@ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 -#endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 -#endif -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#else -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 -#endif -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 -#endif -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#else -#define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc0000000 -#endif -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#else -#define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000 -#endif -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 @@ -505,7 +461,26 @@ #endif #ifdef CONFIG_PCI +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ +#endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135677 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKK566Gwz9s4Y for ; Tue, 23 Jul 2019 23:37:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 64D01C21DF9; Tue, 23 Jul 2019 13:23:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 45B0FC21E44; Tue, 23 Jul 2019 13:20:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5A025C21E47; Tue, 23 Jul 2019 13:20:00 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id EF693C21C6A for ; Tue, 23 Jul 2019 13:19:57 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C204F2002F5; Tue, 23 Jul 2019 15:19:57 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5424220006F; Tue, 23 Jul 2019 15:19:54 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3834F40307; Tue, 23 Jul 2019 21:19:50 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:26 +0800 Message-Id: <20190723130938.47805-36-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 35/47] configs: P3041DS: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P3041DS defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P3041DS_NAND_defconfig | 4 ++++ configs/P3041DS_SDCARD_defconfig | 4 ++++ configs/P3041DS_SPIFLASH_defconfig | 4 ++++ configs/P3041DS_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index b315840..87958db 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -41,6 +41,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 50dee40..90a0efe 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 984ff5f..7682877 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 5728cbb..ce9289f 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -39,6 +39,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135647 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK8t2xFDz9s7T for ; Tue, 23 Jul 2019 23:30:06 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D8AEDC21E0B; Tue, 23 Jul 2019 13:25:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E1D7EC21DB6; Tue, 23 Jul 2019 13:21:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 480D6C21E31; Tue, 23 Jul 2019 13:20:00 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id BB9F5C21DFA for ; Tue, 23 Jul 2019 13:19:58 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8D3D720006F; Tue, 23 Jul 2019 15:19:58 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 1FAF2200125; Tue, 23 Jul 2019 15:19:55 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id EEE1740309; Tue, 23 Jul 2019 21:19:50 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:27 +0800 Message-Id: <20190723130938.47805-37-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 36/47] dm: pcie_fsl: Add P4080 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for P4080 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index a4e0cd1..f61e39e 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -630,6 +630,7 @@ static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data }, + { .compatible = "fsl,pcie-p4080", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, From patchwork Tue Jul 23 13:09:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135638 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK4n32sGz9s4Y for ; Tue, 23 Jul 2019 23:26:33 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E7149C21D8E; Tue, 23 Jul 2019 13:24:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 366F0C21E31; Tue, 23 Jul 2019 13:21:31 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AFA1AC21E3A; Tue, 23 Jul 2019 13:20:01 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 7D90AC21E0D for ; Tue, 23 Jul 2019 13:19:59 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5027520001E; Tue, 23 Jul 2019 15:19:59 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D5CEB2002E4; Tue, 23 Jul 2019 15:19:55 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id BA971402F6; Tue, 23 Jul 2019 21:19:51 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:28 +0800 Message-Id: <20190723130938.47805-38-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 37/47] P4080: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P4080 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p4080.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/powerpc/dts/p4080.dtsi b/arch/powerpc/dts/p4080.dtsi index 7c8dbae..ab76680 100644 --- a/arch/powerpc/dts/p4080.dtsi +++ b/arch/powerpc/dts/p4080.dtsi @@ -80,4 +80,40 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe200000 { + compatible = "fsl,pcie-p4080", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe200000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe201000 { + compatible = "fsl,pcie-p4080", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe201000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe202000 { + compatible = "fsl,pcie-p4080", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe202000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135675 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKJW2m2Vz9s4Y for ; Tue, 23 Jul 2019 23:36:43 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E5445C21E3E; Tue, 23 Jul 2019 13:26:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3ADD0C21EB4; Tue, 23 Jul 2019 13:22:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 77136C21E3A; Tue, 23 Jul 2019 13:20:02 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 3DCD9C21E1D for ; Tue, 23 Jul 2019 13:20:00 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 111902002A4; Tue, 23 Jul 2019 15:20:00 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 985CB2002F4; Tue, 23 Jul 2019 15:19:56 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7D2FC40302; Tue, 23 Jul 2019 21:19:52 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:29 +0800 Message-Id: <20190723130938.47805-39-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 38/47] configs: P4080DS: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P4080DS defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P4080DS_SDCARD_defconfig | 4 ++++ configs/P4080DS_SPIFLASH_defconfig | 4 ++++ configs/P4080DS_defconfig | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 0aaf09a..5e5b30c 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 3a91df2..29560f3 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index d89d69f..aa42a0b 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -39,6 +39,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135689 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKPQ4rGHz9sND for ; Tue, 23 Jul 2019 23:40:58 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 4C5B6C21EBB; Tue, 23 Jul 2019 13:22:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 83E3EC21E56; Tue, 23 Jul 2019 13:20:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 255E1C21E1D; Tue, 23 Jul 2019 13:20:04 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 0B387C21E16 for ; Tue, 23 Jul 2019 13:20:01 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D0F782002E6; Tue, 23 Jul 2019 15:20:00 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 644812002CC; Tue, 23 Jul 2019 15:19:57 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4004D4030B; Tue, 23 Jul 2019 21:19:53 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:30 +0800 Message-Id: <20190723130938.47805-40-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 39/47] dm: pcie_fsl: Add P5040 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for P5040 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index f61e39e..1411b1f 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -631,6 +631,7 @@ static const struct udevice_id fsl_pcie_ids[] = { { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-p4080", .data = (ulong)&p2041_data }, + { .compatible = "fsl,pcie-p5040", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-t102x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t104x", .data = (ulong)&t2080_data }, { .compatible = "fsl,pcie-t2080", .data = (ulong)&t2080_data }, From patchwork Tue Jul 23 13:09:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135688 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKP849pKz9sDQ for ; Tue, 23 Jul 2019 23:40:44 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 22AE7C21EA1; Tue, 23 Jul 2019 13:26:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EDC14C21E16; Tue, 23 Jul 2019 13:22:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7E927C21E16; Tue, 23 Jul 2019 13:20:05 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id C1226C21D72 for ; Tue, 23 Jul 2019 13:20:01 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 940951A02E9; Tue, 23 Jul 2019 15:20:01 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 26DC21A0009; Tue, 23 Jul 2019 15:19:58 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 0B5364030C; Tue, 23 Jul 2019 21:19:53 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:31 +0800 Message-Id: <20190723130938.47805-41-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 40/47] P5040: dts: Added PCIe DT nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" P5040 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/p5040.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi index b6f6c5d..8ab123d 100644 --- a/arch/powerpc/dts/p5040.dtsi +++ b/arch/powerpc/dts/p5040.dtsi @@ -59,4 +59,40 @@ clock-frequency = <0x0>; }; }; + + pcie@ffe200000 { + compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe200000 0x0 0x1000>; /* registers */ + law_trgt_if = <0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe201000 { + compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe201000 0x0 0x1000>; /* registers */ + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; + + pcie@ffe202000 { + compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq"; + reg = <0xf 0xfe202000 0x0 0x1000>; /* registers */ + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; From patchwork Tue Jul 23 13:09:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135687 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKP63Ctqz9sBt for ; Tue, 23 Jul 2019 23:40:42 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 0C0F9C21E0D; Tue, 23 Jul 2019 13:27:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5100FC21E13; Tue, 23 Jul 2019 13:22:32 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4BA7DC21C6A; Tue, 23 Jul 2019 13:20:05 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 78A36C21E26 for ; Tue, 23 Jul 2019 13:20:02 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4C79D1A0235; Tue, 23 Jul 2019 15:20:02 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id DDE551A0029; Tue, 23 Jul 2019 15:19:58 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C1EDD40310; Tue, 23 Jul 2019 21:19:54 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:32 +0800 Message-Id: <20190723130938.47805-42-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 41/47] configs: P5040DS: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in P5040DS defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/P5040DS_NAND_defconfig | 4 ++++ configs/P5040DS_SDCARD_defconfig | 4 ++++ configs/P5040DS_SPIFLASH_defconfig | 4 ++++ configs/P5040DS_defconfig | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index cbccb4c..bab7561 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -42,6 +42,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index cdefb2d..517708a 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -41,6 +41,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index c636b16..cb019f2 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -41,6 +41,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 6572ff1..31a8fca 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -40,6 +40,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From patchwork Tue Jul 23 13:09:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135663 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKC13Zdjz9s4Y for ; Tue, 23 Jul 2019 23:31:57 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 03651C21E79; Tue, 23 Jul 2019 13:27:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EA358C21ECF; Tue, 23 Jul 2019 13:22:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 047B3C21C38; Tue, 23 Jul 2019 13:20:06 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 39EEDC21E35 for ; Tue, 23 Jul 2019 13:20:03 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0EF88200306; Tue, 23 Jul 2019 15:20:03 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A025B200125; Tue, 23 Jul 2019 15:19:59 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 84E2240326; Tue, 23 Jul 2019 21:19:55 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:33 +0800 Message-Id: <20190723130938.47805-43-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 42/47] powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/mpc8548cds/mpc8548cds.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 7d819d8..2799b5b 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -164,7 +164,7 @@ void lbc_sdram_init(void) #endif /* enable SDRAM init */ } -#if defined(CONFIG_PCI) || defined(CONFIG_PCI1) +#if (defined(CONFIG_PCI) || defined(CONFIG_PCI1)) && !defined(CONFIG_DM_PCI) /* For some reason the Tundra PCI bridge shows up on itself as a * different device. Work around that by refusing to configure it. */ @@ -189,6 +189,7 @@ static struct pci_config_table pci_mpc85xxcds_config_table[] = { static struct pci_controller pci1_hose; #endif /* CONFIG_PCI */ +#if !defined(CONFIG_DM_PCI) void pci_init_board(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -268,6 +269,7 @@ void pci_init_board(void) fsl_pcie_init_board(first_free_busno); } +#endif void configure_rgmii(void) { @@ -349,7 +351,7 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } -#if defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_BOARD_SETUP) && !defined(CONFIG_DM_PCI) void ft_pci_setup(void *blob, bd_t *bd) { FT_FSL_PCI_SETUP; From patchwork Tue Jul 23 13:09:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135691 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKQ06TZjz9s7T for ; Tue, 23 Jul 2019 23:41:28 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 86CFCC21E7D; Tue, 23 Jul 2019 13:27:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 054FBC21ECE; Tue, 23 Jul 2019 13:22:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D47D8C21ED6; Tue, 23 Jul 2019 13:20:08 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 1F086C21C4A for ; Tue, 23 Jul 2019 13:20:04 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D865420031A; Tue, 23 Jul 2019 15:20:03 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6C0FB2002E4; Tue, 23 Jul 2019 15:20:00 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4756140319; Tue, 23 Jul 2019 21:19:56 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:34 +0800 Message-Id: <20190723130938.47805-44-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 43/47] powerpc: MPC85xxCDS: Disable legacy PCI fixup when DM_PCI is selected X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCI and PCIe fixup when CONFIG_DM_PCI is selected. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- board/freescale/common/cds_pci_ft.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c index 3ff2fa4..fb2e5c7 100644 --- a/board/freescale/common/cds_pci_ft.c +++ b/board/freescale/common/cds_pci_ft.c @@ -9,6 +9,7 @@ #include "cadmus.h" #if defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) static void cds_pci_fixup(void *blob) { int node; @@ -61,11 +62,12 @@ static void cds_pci_fixup(void *blob) } } } +#endif int ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); -#ifdef CONFIG_PCI +#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) ft_pci_setup(blob, bd); cds_pci_fixup(blob); #endif From patchwork Tue Jul 23 13:09:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135668 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKDr6gmXz9s4Y for ; Tue, 23 Jul 2019 23:33:32 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 8748FC21E70; Tue, 23 Jul 2019 13:26:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B6D96C21EB9; Tue, 23 Jul 2019 13:22:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 10EA4C21EB4; Tue, 23 Jul 2019 13:20:08 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id CCF61C21E56 for ; Tue, 23 Jul 2019 13:20:04 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9A96820030E; Tue, 23 Jul 2019 15:20:04 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 37B6D2002F2; Tue, 23 Jul 2019 15:20:01 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 13262402B4; Tue, 23 Jul 2019 21:19:57 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:35 +0800 Message-Id: <20190723130938.47805-45-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 44/47] dm: pcie_fsl: Add MPC8548 PCIe support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible string for MPC8548 PCIe. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- drivers/pci/pcie_fsl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 1411b1f..112f3b9 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -627,6 +627,7 @@ static struct fsl_pcie_data t2080_data = { }; static const struct udevice_id fsl_pcie_ids[] = { + { .compatible = "fsl,pcie-mpc8548", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, { .compatible = "fsl,pcie-p3041", .data = (ulong)&p2041_data }, From patchwork Tue Jul 23 13:09:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135698 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKTB12QJz9s7T for ; Tue, 23 Jul 2019 23:44:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id B6F94C21E2C; Tue, 23 Jul 2019 13:27:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 24042C21DF9; Tue, 23 Jul 2019 13:22:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B3534C21DA1; Tue, 23 Jul 2019 13:20:09 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 9CED9C21DA1 for ; Tue, 23 Jul 2019 13:20:05 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 70A32200303; Tue, 23 Jul 2019 15:20:05 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id F370B2002D8; Tue, 23 Jul 2019 15:20:01 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id D2D27402FC; Tue, 23 Jul 2019 21:19:57 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:36 +0800 Message-Id: <20190723130938.47805-46-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 45/47] MPC8548: dts: Added PCIe DT node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" MPC8548 integrated a PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for the PCIe controller. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- arch/powerpc/dts/mpc8548-post.dtsi | 9 +++++++++ arch/powerpc/dts/mpc8548cds.dts | 6 ++++++ arch/powerpc/dts/mpc8548cds_36b.dts | 6 ++++++ 3 files changed, 21 insertions(+) diff --git a/arch/powerpc/dts/mpc8548-post.dtsi b/arch/powerpc/dts/mpc8548-post.dtsi index 5533a4b..2206f2d 100644 --- a/arch/powerpc/dts/mpc8548-post.dtsi +++ b/arch/powerpc/dts/mpc8548-post.dtsi @@ -25,3 +25,12 @@ last-interrupt-source = <255>; }; }; + +&pcie { + compatible = "fsl,pcie-mpc8548", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; diff --git a/arch/powerpc/dts/mpc8548cds.dts b/arch/powerpc/dts/mpc8548cds.dts index cceea34..3b927bd 100644 --- a/arch/powerpc/dts/mpc8548cds.dts +++ b/arch/powerpc/dts/mpc8548cds.dts @@ -18,6 +18,12 @@ soc: soc8548@e0000000 { ranges = <0x0 0x0 0xe0000000 0x100000>; }; + + pcie: pcie@e000a000 { + reg = <0x0 0xe000a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0x0 0xe3000000 0x0 0x00100000 /* downstream I/O */ + 0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "mpc8548-post.dtsi" diff --git a/arch/powerpc/dts/mpc8548cds_36b.dts b/arch/powerpc/dts/mpc8548cds_36b.dts index faff35c..98d7c24 100644 --- a/arch/powerpc/dts/mpc8548cds_36b.dts +++ b/arch/powerpc/dts/mpc8548cds_36b.dts @@ -18,6 +18,12 @@ soc: soc8548@fe0000000 { ranges = <0x0 0xf 0xe0000000 0x100000>; }; + + pcie: pcie@fe000a000 { + reg = <0xf 0xe000a000 0x0 0x1000>; /* registers */ + ranges = <0x01000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x00100000 /* downstream I/O */ + 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */ + }; }; /include/ "mpc8548-post.dtsi" From patchwork Tue Jul 23 13:09:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135646 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tK8q4tZVz9s4Y for ; Tue, 23 Jul 2019 23:30:03 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 61F41C21E3B; Tue, 23 Jul 2019 13:23:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 1E37DC21E26; Tue, 23 Jul 2019 13:21:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 55565C21EA1; Tue, 23 Jul 2019 13:20:10 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 5E8C0C21E45 for ; Tue, 23 Jul 2019 13:20:06 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2BFBC2002E6; Tue, 23 Jul 2019 15:20:06 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B0B7A2002CC; Tue, 23 Jul 2019 15:20:02 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9588440307; Tue, 23 Jul 2019 21:19:58 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:37 +0800 Message-Id: <20190723130938.47805-47-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 46/47] powerpc: MPC8548CDS: Disable legacy PCIe driver when DM_PCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- include/configs/MPC8548CDS.h | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 4252fbe..4809bbd 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -18,8 +18,6 @@ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 -#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_ENV_OVERWRITE @@ -343,24 +341,18 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ #ifdef CONFIG_PCIE1 -#define CONFIG_SYS_PCIE1_NAME "Slot" #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xe3000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfe3000000ull #else #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 #endif -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */ #endif /* @@ -386,6 +378,20 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_EEPRO100 #undef CONFIG_TULIP +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE 1 +#define CONFIG_SYS_PCIE1_NAME "Slot" +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#else +#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 +#endif +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */ +#endif + #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ From patchwork Tue Jul 23 13:09:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1135681 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tKKy1svBz9s4Y for ; Tue, 23 Jul 2019 23:37:57 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A4627C21DF9; Tue, 23 Jul 2019 13:25:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4618FC21EA1; Tue, 23 Jul 2019 13:21:40 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 52D4CC21EBB; Tue, 23 Jul 2019 13:20:11 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 8853AC21C6A for ; Tue, 23 Jul 2019 13:20:07 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5B13D1A0235; Tue, 23 Jul 2019 15:20:07 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E29581A030F; Tue, 23 Jul 2019 15:20:03 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 5868740309; Tue, 23 Jul 2019 21:19:59 +0800 (SGT) From: Hou Zhiqiang To: u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de, priyanka.jain@nxp.com, Shengzhou.Liu@nxp.com Date: Tue, 23 Jul 2019 21:09:38 +0800 Message-Id: <20190723130938.47805-48-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> References: <20190723130938.47805-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 47/47] configs: MPC8548CDS: Enable PCIe driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the DM PCIe driver in MPC8548CDS defconfig. Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- configs/MPC8548CDS_36BIT_defconfig | 4 ++++ configs/MPC8548CDS_defconfig | 4 ++++ configs/MPC8548CDS_legacy_defconfig | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index f259f19..102716b 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -26,6 +26,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 72239da..9cccb60 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -25,6 +25,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index f2420c3..782f827 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -25,6 +25,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2