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[92.34.205.34]) by smtp.gmail.com with ESMTPSA id o17sm4607298ljg.71.2019.07.17.10.21.51 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 17 Jul 2019 10:21:52 -0700 (PDT) From: Linus Walleij To: Roman Yeryomin , Sebastian Luft , Hans Ulli Kroll , Hauke Mehrtens , Christian Lamparter Date: Wed, 17 Jul 2019 19:21:48 +0200 Message-Id: <20190717172148.7986-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190717_102157_704900_196A8297 X-CRM114-Status: GOOD ( 13.01 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:143 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid Subject: [OpenWrt-Devel] [PATCH] gemini: Fix up some confused pin config on SL93512r X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , Florian Fainelli , openwrt-devel@lists.openwrt.org Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Upstream patch fixing the errors in the device tree. Signed-off-by: Linus Walleij --- ...-gemini-Fix-up-confused-pin-settings.patch | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch diff --git a/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch b/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch new file mode 100644 index 000000000000..9ae2a79cbf50 --- /dev/null +++ b/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch @@ -0,0 +1,54 @@ +From 384ec5ed82845c2c81968743dde4a758f572c11b Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Sat, 13 Jul 2019 11:52:29 +0200 +Subject: [PATCH] ARM: dts: gemini: Fix up confused pin settings + +The SL93512r board has its pin muxing set up for the wrong +ASIC: SL3516 instead of SL3512 that it is using. Fix it +up and reference the right GPIO for the WPS button. + +Signed-off-by: Linus Walleij +--- + arch/arm/boot/dts/gemini-sl93512r.dts | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/gemini-sl93512r.dts ++++ b/arch/arm/boot/dts/gemini-sl93512r.dts +@@ -36,8 +36,8 @@ + wakeup-source; + linux,code = ; + label = "WPS"; +- /* Conflict with NAND flash */ +- gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; ++ /* Conflicts with TVC and extended flash */ ++ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + + button-setup { +@@ -153,17 +153,20 @@ + syscon: syscon@40000000 { + pinctrl { + /* +- * gpio0egrp cover line 16 used by HD LED +- * gpio0fgrp cover line 17, 18 used by wireless LED and reset button +- * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY +- * gpio0kgrp cover line 31 used by USB LED ++ * gpio0agrp cover line 0, used by WPS button ++ * gpio0fgrp cover line 16 used by HD LED ++ * gpio0ggrp cover line 17, 18 used by wireless LAN LED and ++ * reset button OR USB ID select on 17 and USB VBUS select ++ * on 18. (Confusing.) ++ * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY + */ + gpio0_default_pins: pinctrl-gpio0 { + mux { + function = "gpio0"; +- groups = "gpio0egrp", ++ groups = "gpio0agrp", + "gpio0fgrp", +- "gpio0hgrp"; ++ "gpio0ggrp", ++ "gpio0igrp"; + }; + }; + /*