From patchwork Wed Jul 17 15:10:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Marginean X-Patchwork-Id: 1133356 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45pgj46flCz9sLt for ; Thu, 18 Jul 2019 01:11:52 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 837BBC21DF9; Wed, 17 Jul 2019 15:11:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 731B6C21DDC; Wed, 17 Jul 2019 15:10:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3EFE6C21C3F; Wed, 17 Jul 2019 15:10:32 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id EDD5BC21C29 for ; Wed, 17 Jul 2019 15:10:31 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 7A0AD1A01EC; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6E3261A0088; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) Received: from fsr-ub1864-115.ea.freescale.net (fsr-ub1864-115.ea.freescale.net [10.171.82.26]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 2DCE4205C5; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) From: Alex Marginean To: u-boot@lists.denx.de Date: Wed, 17 Jul 2019 18:10:23 +0300 Message-Id: <20190717151026.27994-2-alexandru.marginean@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190717151026.27994-1-alexandru.marginean@nxp.com> References: <20190717151026.27994-1-alexandru.marginean@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Ken Ma , Joe Hershberger Subject: [U-Boot] [PATCH 1/4] net: mdio-uclass: name MDIO according to device-name property if preset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use the optional property device-name to name the MDIO bus. This works around limitations with using the DT node name on devices such as Armada-8040, which integrates two cp100 cores, both featuring MDIOs at the same relative offsets and with the same DT node names. The concept was originally proposed by Marvell as a custom property called mdio-name specific to Marvell driver. This patch uses the more generic property device-name and moves this into MDIO class code so other can use it as well. Signed-off-by: Alex Marginean Acked-by: Joe Hershberger Reviewed-by: Bin Meng --- net/mdio-uclass.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 36a404ff44..428f3a994f 100644 --- a/net/mdio-uclass.c +++ b/net/mdio-uclass.c @@ -23,6 +23,17 @@ void dm_mdio_probe_devices(void) static int dm_mdio_post_bind(struct udevice *dev) { + const char *dt_name; + + /* set a custom name for the MDIO device, if present in DT */ + if (ofnode_valid(dev->node)) { + dt_name = ofnode_read_string(dev->node, "device-name"); + if (dt_name) { + debug("renaming dev %s to %s\n", dev->name, dt_name); + device_set_name(dev, dt_name); + } + } + /* * MDIO command doesn't like spaces in names, don't allow them to keep * it happy From patchwork Wed Jul 17 15:10:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Marginean X-Patchwork-Id: 1133355 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45pgh15Z08z9s8m for ; Thu, 18 Jul 2019 01:10:57 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5FE27C21D4A; Wed, 17 Jul 2019 15:10:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E6A2AC21C29; Wed, 17 Jul 2019 15:10:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 31559C21C2C; Wed, 17 Jul 2019 15:10:32 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id F3499C21C3F for ; Wed, 17 Jul 2019 15:10:31 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C103C20010F; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B4C0E200046; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) Received: from fsr-ub1864-115.ea.freescale.net (fsr-ub1864-115.ea.freescale.net [10.171.82.26]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 7DE52205C5; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) From: Alex Marginean To: u-boot@lists.denx.de Date: Wed, 17 Jul 2019 18:10:24 +0300 Message-Id: <20190717151026.27994-3-alexandru.marginean@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190717151026.27994-1-alexandru.marginean@nxp.com> References: <20190717151026.27994-1-alexandru.marginean@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Ken Ma , Joe Hershberger Subject: [U-Boot] [PATCH 2/4] doc: bindings: add mdio.txt describing generic MDIO properties X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adds a binding document for mdio. A notable deviation from corresponding Linux binding is the introduction of device-name optional property, which can be used to name MDIO buses. Two reset optional properties described by Linux binding are also not present as they don't seem to be used in U-Boot at this time. Signed-off-by: Alex Marginean Acked-by: Joe Hershberger Reviewed-by: Bin Meng --- doc/device-tree-bindings/net/mdio.txt | 36 +++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 doc/device-tree-bindings/net/mdio.txt diff --git a/doc/device-tree-bindings/net/mdio.txt b/doc/device-tree-bindings/net/mdio.txt new file mode 100644 index 0000000000..1595325050 --- /dev/null +++ b/doc/device-tree-bindings/net/mdio.txt @@ -0,0 +1,36 @@ +Common MDIO bus properties. + +These are generic properties that can apply to any MDIO bus. + +Optional properties: + - device-name - If present it is used to name the device and MDIO bus. + The name must be unique and must not contain spaces. + +A list of child nodes, one per device on the bus is expected. These could be +PHYs, switches or similar devices and child nodes should follow the specific +binding for the device type. + +Example : +This example shows the structure used for the external MDIO bus on NXP LS1028A +RDB board. Note that this MDIO device is an integrated PCI function and +requires no compatible property for probing. + +/* definition in SoC dtsi file */ + pcie@1f0000000 { + + mdio0: pci@0,3 { + #address-cells=<0>; + #size-cells=<1>; + reg = <0x000300 0 0 0 0>; + status = "disabled"; + device-name = "emdio"; + }; + }; +/* definition of PHYs in RDB dts file */ +&mdio0 { + status = "okay"; + rdb_phy0: phy@2 { + reg = <2>; + }; +}; + From patchwork Wed Jul 17 15:10:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Marginean X-Patchwork-Id: 1133357 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45pgjj2TpNz9s8m for ; Thu, 18 Jul 2019 01:12:25 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id DD835C21C4A; Wed, 17 Jul 2019 15:11:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 64667C21E26; Wed, 17 Jul 2019 15:10:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3B62AC21C29; Wed, 17 Jul 2019 15:10:33 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 47022C21C4A for ; Wed, 17 Jul 2019 15:10:32 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 149051A01F8; Wed, 17 Jul 2019 17:10:32 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 078F41A0088; Wed, 17 Jul 2019 17:10:32 +0200 (CEST) Received: from fsr-ub1864-115.ea.freescale.net (fsr-ub1864-115.ea.freescale.net [10.171.82.26]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id C47EF205C5; Wed, 17 Jul 2019 17:10:31 +0200 (CEST) From: Alex Marginean To: u-boot@lists.denx.de Date: Wed, 17 Jul 2019 18:10:25 +0300 Message-Id: <20190717151026.27994-4-alexandru.marginean@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190717151026.27994-1-alexandru.marginean@nxp.com> References: <20190717151026.27994-1-alexandru.marginean@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Ken Ma , Joe Hershberger Subject: [U-Boot] [PATCH 3/4] drivers: net: add marvell MDIO driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well. This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45. This patch also adds device tree binding for marvell MDIO driver. Signed-off-by: Ken Ma Signed-off-by: Alex Marginean Acked-by: Joe Hershberger --- I would really appreciate some help with testing of this patch as I don't have access to a Marvell device this would run on. Probing works, it's easy to test that. Nevo Hed has also been kind enough to run an older version of this patch at his end and it was working for him. For what is worth the actual driver code is practically unchanged from the original version sent by Ken, but it's still a good idea to have someone else verify it. Thanks! doc/device-tree-bindings/net/marvell-mdio.txt | 15 ++ drivers/net/Kconfig | 10 + drivers/net/Makefile | 1 + drivers/net/mvmdio.c | 236 ++++++++++++++++++ 4 files changed, 262 insertions(+) create mode 100644 doc/device-tree-bindings/net/marvell-mdio.txt create mode 100644 drivers/net/mvmdio.c diff --git a/doc/device-tree-bindings/net/marvell-mdio.txt b/doc/device-tree-bindings/net/marvell-mdio.txt new file mode 100644 index 0000000000..e2038e2145 --- /dev/null +++ b/doc/device-tree-bindings/net/marvell-mdio.txt @@ -0,0 +1,15 @@ +* Marvell MDIO Ethernet Controller interface + +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k +have an identical unit that provides an interface with the MDIO bus. +This driver handles this MDIO interface. + +Mandatory properties: +SoC specific: + - #address-cells: Must be <1>. + - #size-cells: Must be <0>. + - compatible: Should be "marvell,orion-mdio" (for SMI) + "marvell,xmdio" (for XSMI) + - reg: Base address and size SMI/XMSI bus. + +Please refer to "mdio.txt" for generic MDIO bus bindings. diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4d85fb1716..a982bc3ac5 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -595,4 +595,14 @@ config FSL_ENETC This driver supports the NXP ENETC Ethernet controller found on some of the NXP SoCs. +config MVMDIO + bool "Marvell MDIO interface support" + depends on DM_MDIO + help + This driver supports the MDIO interface found in the network + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). + + This driver is used by the MVPP2 and MVNETA drivers. + endif # NETDEVICES diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 97119cec7c..5921fa3e9c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -80,3 +80,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o +obj-$(CONFIG_MVMDIO) += mvmdio.o diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c new file mode 100644 index 0000000000..ec6805e536 --- /dev/null +++ b/drivers/net/mvmdio.c @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Author: Ken Ma + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MVMDIO_SMI_DATA_SHIFT 0 +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16 +#define MVMDIO_SMI_PHY_REG_SHIFT 21 +#define MVMDIO_SMI_READ_OPERATION BIT(26) +#define MVMDIO_SMI_WRITE_OPERATION 0 +#define MVMDIO_SMI_READ_VALID BIT(27) +#define MVMDIO_SMI_BUSY BIT(28) + +#define MVMDIO_XSMI_MGNT_REG 0x0 +#define MVMDIO_XSMI_PHYADDR_SHIFT 16 +#define MVMDIO_XSMI_DEVADDR_SHIFT 21 +#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26) +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26) +#define MVMDIO_XSMI_READ_VALID BIT(29) +#define MVMDIO_XSMI_BUSY BIT(30) +#define MVMDIO_XSMI_ADDR_REG 0x8 + +enum mvmdio_bus_type { + BUS_TYPE_SMI, + BUS_TYPE_XSMI +}; + +struct mvmdio_priv { + void *mdio_base; + enum mvmdio_bus_type type; +}; + +static int mvmdio_smi_read(struct udevice *dev, int addr, + int devad, int reg) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + u32 val; + int ret; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_SMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) | + (reg << MVMDIO_SMI_PHY_REG_SHIFT) | + MVMDIO_SMI_READ_OPERATION), + priv->mdio_base); + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_SMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + val = readl(priv->mdio_base); + if (!(val & MVMDIO_SMI_READ_VALID)) { + pr_err("SMI bus read not valid\n"); + return -ENODEV; + } + + return val & GENMASK(15, 0); +} + +static int mvmdio_smi_write(struct udevice *dev, int addr, int devad, + int reg, u16 value) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + int ret; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_SMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) | + (reg << MVMDIO_SMI_PHY_REG_SHIFT) | + MVMDIO_SMI_WRITE_OPERATION | + (value << MVMDIO_SMI_DATA_SHIFT)), + priv->mdio_base); + + return 0; +} + +static int mvmdio_xsmi_read(struct udevice *dev, int addr, + int devad, int reg) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + int ret; + + if (devad == MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_XSMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG); + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) | + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) | + MVMDIO_XSMI_READ_OPERATION), + priv->mdio_base + MVMDIO_XSMI_MGNT_REG); + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_XSMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + if (!(readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & + MVMDIO_XSMI_READ_VALID)) { + pr_err("XSMI bus read not valid\n"); + return -ENODEV; + } + + return readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0); +} + +static int mvmdio_xsmi_write(struct udevice *dev, int addr, int devad, + int reg, u16 value) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + int ret; + + if (devad == MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = wait_for_bit_le32(priv->mdio_base, MVMDIO_XSMI_BUSY, + false, CONFIG_SYS_HZ, false); + if (ret < 0) + return ret; + + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG); + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) | + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) | + MVMDIO_XSMI_WRITE_OPERATION | value), + priv->mdio_base + MVMDIO_XSMI_MGNT_REG); + + return 0; +} + +static int mvmdio_read(struct udevice *dev, int addr, int devad, int reg) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + int err = -ENOTSUPP; + + switch (priv->type) { + case BUS_TYPE_SMI: + err = mvmdio_smi_read(dev, addr, devad, reg); + break; + case BUS_TYPE_XSMI: + err = mvmdio_xsmi_read(dev, addr, devad, reg); + break; + } + + return err; +} + +static int mvmdio_write(struct udevice *dev, int addr, int devad, int reg, + u16 value) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + int err = -ENOTSUPP; + + switch (priv->type) { + case BUS_TYPE_SMI: + err = mvmdio_smi_write(dev, addr, devad, reg, value); + break; + case BUS_TYPE_XSMI: + err = mvmdio_xsmi_write(dev, addr, devad, reg, value); + break; + } + + return err; +} + +/* + * Name the device, we use the device tree node name. + * This can be overwritten by MDIO class code if device-name property is + * present. + */ +static int mvmdio_bind(struct udevice *dev) +{ + if (ofnode_valid(dev->node)) + device_set_name(dev, ofnode_get_name(dev->node)); + + return 0; +} + +/* Get device base address and type, either C22 SMII or C45 XSMI */ +static int mvmdio_probe(struct udevice *dev) +{ + struct mvmdio_priv *priv = dev_get_priv(dev); + + priv->mdio_base = (void *)dev_read_addr(dev); + priv->type = (enum mvmdio_bus_type)dev_get_driver_data(dev); + + return 0; +} + +static const struct mdio_ops mvmdio_ops = { + .read = mvmdio_read, + .write = mvmdio_write, +}; + +static const struct udevice_id mvmdio_ids[] = { + { .compatible = "marvell,orion-mdio", .data = BUS_TYPE_SMI }, + { .compatible = "marvell,xmdio", .data = BUS_TYPE_XSMI }, + { } +}; + +U_BOOT_DRIVER(mvmdio) = { + .name = "mvmdio", + .id = UCLASS_MDIO, + .of_match = mvmdio_ids, + .bind = mvmdio_bind, + .probe = mvmdio_probe, + .ops = &mvmdio_ops, + .priv_auto_alloc_size = sizeof(struct mvmdio_priv), +}; + From patchwork Wed Jul 17 15:10:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Marginean X-Patchwork-Id: 1133358 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45pgk53Hyzz9s8m for ; Thu, 18 Jul 2019 01:12:45 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 31E0DC21E42; Wed, 17 Jul 2019 15:11:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DEA41C21DED; Wed, 17 Jul 2019 15:10:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C8F7DC21C2C; Wed, 17 Jul 2019 15:10:32 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 8ECFFC21C29 for ; Wed, 17 Jul 2019 15:10:32 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 63410200116; Wed, 17 Jul 2019 17:10:32 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 576A5200046; Wed, 17 Jul 2019 17:10:32 +0200 (CEST) Received: from fsr-ub1864-115.ea.freescale.net (fsr-ub1864-115.ea.freescale.net [10.171.82.26]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 171B6205C5; Wed, 17 Jul 2019 17:10:32 +0200 (CEST) From: Alex Marginean To: u-boot@lists.denx.de Date: Wed, 17 Jul 2019 18:10:26 +0300 Message-Id: <20190717151026.27994-5-alexandru.marginean@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190717151026.27994-1-alexandru.marginean@nxp.com> References: <20190717151026.27994-1-alexandru.marginean@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Ken Ma , Joe Hershberger Subject: [U-Boot] [PATCH 4/4] arm: dts: Set custom names for cp110 master/slave MDIO buses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Implicitly Marvell MDIO driver uses DT node names for devices, but in this case that is not unique. Set MDIO device names for master/slave to cpm/cps. Signed-off-by: Alex Marginean Acked-by: Joe Hershberger --- arch/arm/dts/armada-cp110-master.dtsi | 1 + arch/arm/dts/armada-cp110-slave.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index 551d00d774..6fb6166b79 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -96,6 +96,7 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x12a200 0x10>; + device-name = "cpm"; }; cpm_syscon0: system-controller@440000 { diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index 2ea9004f1d..53c796dad6 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -96,6 +96,7 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x12a200 0x10>; + device-name = "cps"; }; cps_syscon0: system-controller@440000 {