From patchwork Wed Jul 10 15:19:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130465 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNW34KC7z9sMQ for ; Thu, 11 Jul 2019 01:33:19 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PvPiNB6r"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNW32thnzDqWc for ; Thu, 11 Jul 2019 01:33:19 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PvPiNB6r"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNGt3CYCzDqQq for ; Thu, 11 Jul 2019 01:22:46 +1000 (AEST) Received: by mail-pg1-x542.google.com with SMTP id z75so1424935pgz.5 for ; Wed, 10 Jul 2019 08:22:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gJqecc7z/Wt3DHiADBssOtE0uLDjQM8bKcxpApRr0MA=; b=PvPiNB6rjy3aZD8s7Sb0ZMZ30jvW8oeBmdItAGSUJtwavhzBpkquU4g1VS5SM6QBN8 okh2/AQNlQhOiEGncwFUcWfbpGOnipBMNwX9Oe1QrlF4o9cKVZcfAYfgbxpcJX3SlyOp GM8NMch77Jzn8cIfUKvgXuEahpbTWUK7vtVExthL/wiRSnQJVNnzNBtPRq/QApyOJEGa j3cP4Z03wkZJMOniBKLYAkWrl9dkBuKzHSQinCDVoXqL+ntnRTygy5TyVl8WbtYX78xE /mGhUXjFCKYh/VfMgJw9kqN41NDhl2+LSmDFuNuTKJ8z3Jb0iJ1UP1I9tKs0fTvM1EeO uswQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gJqecc7z/Wt3DHiADBssOtE0uLDjQM8bKcxpApRr0MA=; b=XOcNKPSUB8UC9HelbGCXw9J1j5xNl9h43afKBeg3fbIgP8EVyKh59gCQALyLuMO08p X+sT+75Wbl84rNUiN5lhCPVCvzApQd101ICYJjQkaINhDwXP/HR2cY3QhLclX+7gibss NlynmZ/sNWtdRUMACnbx8aYD7C/ndmxN/yZLGKsf+aOGlQfkcRrH1FSP+t+lE4vOR67R M6mE7fF6OPr2tvj/vgVuhOtjVxLc6Kaj1m2SzoI7/wJJZ3tggMSkZzbmN0LtT/5lfZrc DGkO4r16GWNFHVW+10XV9QTaIAe0Xunk0AsZIT+F2t/yrg3aj21LHo16CSgS1kovgoeO duAA== X-Gm-Message-State: APjAAAX7UPFQPOE/6ZIvXZ0ZHb2CsFFLEA4guz2QIP57To0Z8JfCMeRP tjLwE646Gcm5dWNlFfdLoPzd7tP6atE= X-Google-Smtp-Source: APXvYqy0/0kX4gBIYsU/Z8E4kI3BNj857OKv6jLStnU6p1x++HyW8IKNFHs9khxLPBSQlx1J1Lp/Tg== X-Received: by 2002:a63:7114:: with SMTP id m20mr2251920pgc.439.1562772163429; Wed, 10 Jul 2019 08:22:43 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.40 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:42 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 01/16] powerpc/64s/exception: machine check fwnmi remove HV case Date: Thu, 11 Jul 2019 01:19:35 +1000 Message-Id: <20190710151950.31906-2-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" fwnmi does not trigger in HV mode, so remove always-true feature test. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 53c1b0a2ebce..db7ef8c8566f 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1026,9 +1026,8 @@ TRAMP_REAL_BEGIN(machine_check_pSeries) .globl machine_check_fwnmi machine_check_fwnmi: EXCEPTION_PROLOG_0 PACA_EXMC -BEGIN_FTR_SECTION b machine_check_common_early -END_FTR_SECTION_IFCLR(CPU_FTR_HVMODE) + machine_check_pSeries_0: EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 /* From patchwork Wed Jul 10 15:19:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130466 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNYg3gZ5z9sNg for ; Thu, 11 Jul 2019 01:35:35 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ef28I4m+"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNYZ5cqYzDqPB for ; Thu, 11 Jul 2019 01:35:30 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::541; helo=mail-pg1-x541.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ef28I4m+"; dkim-atps=neutral Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNGx2Bn6zDqKZ for ; Thu, 11 Jul 2019 01:22:49 +1000 (AEST) Received: by mail-pg1-x541.google.com with SMTP id q4so1418173pgj.8 for ; Wed, 10 Jul 2019 08:22:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ee9qLF/RJ+7mXd4GiTRK8Dspx6rtpH65SXbucIncObU=; b=ef28I4m++tWh/u+9/jmNG0rcwIUMycIp8OnNLgDbh8qLVEeDzAM55/yN4pkHur3kwh mLZgY+kWBoSfZcw2acZKKPDDMx7YyDgMTPEs0+nhOGlAC5nlBRcCB1S0SgfHoc6xyPQo NGy9tJ4Kuw2+zNSnhI5yy2RMTpfOZ402EeV9f1dlxdOXwekVrBoJbM080aZivwujAHha IJX4Uh/lOyy/qzK1f3ljvOpFLsD1mVwm9sJJN1bPqeTtZSsI911PZpuvF2YIupCM/sdS xfbO3yK69qXHL/sgWhTBUPflbtcqOniFHnmdJ0fu8Z1SKi0My8T+CnMuFueBtYiW6gbf 6XxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ee9qLF/RJ+7mXd4GiTRK8Dspx6rtpH65SXbucIncObU=; b=P46R3Q0K0N+9jrFrzxRIkzK7VrtMbIam7K1U6km/FJxmEAStjNWffpyATIGe6GVhTr 3sFx/vWVMGrtOg9aO3NtgiTOvKqWms4YrHIbuB9CwZyOPmvMzgGzWY3rXWBIVxUM6QxA a5eYeW8PZfPU4NGMy8xljHsoz/0xXqdSLRn8czxnBdo86l6yG184OCyjPmJr9AtDBYqk MCdLNy6z2F1Tx2OmeZtt1uQNcPOWFJtvVqSSX9/z0bqpMM3LFgDZZhz6jt38g0DCdGpB nTZJTNkC4UZzFTziwoywlcbyIyEprjScmEAWyxe0Ty2ktZX4uhjRj4Ris8jBNqZYgy8/ VY7w== X-Gm-Message-State: APjAAAU2EuRRvOkXbO1GlCXeooTcQn1n6cjamep6MXZeV+ubidheLXKD Bfkh8vVLuHKdYSPg4gSPF0XMQ2G1exI= X-Google-Smtp-Source: APXvYqzDZ5sBuxWekyJ+dj2iShMykAd2Fzua5kH/jnYpa0AMOiadI/noAn+D4ZzD0ARIrzcEURrvWA== X-Received: by 2002:a17:90a:8c92:: with SMTP id b18mr7433696pjo.97.1562772166431; Wed, 10 Jul 2019 08:22:46 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.43 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:45 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 02/16] powerpc/64s/exception: machine check remove bitrotted comment Date: Thu, 11 Jul 2019 01:19:36 +1000 Message-Id: <20190710151950.31906-3-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index db7ef8c8566f..e8734a1dfdb9 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -933,10 +933,6 @@ EXC_COMMON_BEGIN(system_reset_common) EXC_REAL_BEGIN(machine_check, 0x200, 0x100) - /* This is moved out of line as it can be patched by FW, but - * some code path might still want to branch into the original - * vector - */ EXCEPTION_PROLOG_0 PACA_EXMC BEGIN_FTR_SECTION b machine_check_common_early From patchwork Wed Jul 10 15:19:37 2019 Content-Type: text/plain; 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[14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.46 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:48 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 03/16] powerpc/64s/exception: machine check fix KVM guest test Date: Thu, 11 Jul 2019 01:19:37 +1000 Message-Id: <20190710151950.31906-4-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The machine_check_handle_early hypervisor guest test is skipped if !HVMODE or MSR[HV]=0, which is wrong for PR or nested hypervisors that could be running a guest in this state. Test HSTATE_IN_GUEST up front and use that to branch out to the KVM handler, then MSR[PR] alone can test for this kernel's userspace. This matches all other interrupt handling. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 33 +++++++++++----------------- 1 file changed, 13 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index e8734a1dfdb9..5789a00691f9 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1108,11 +1108,8 @@ EXC_COMMON_BEGIN(machine_check_handle_early) bl machine_check_early std r3,RESULT(r1) /* Save result */ ld r12,_MSR(r1) -BEGIN_FTR_SECTION - b 4f -END_FTR_SECTION_IFCLR(CPU_FTR_HVMODE) -#ifdef CONFIG_PPC_P7_NAP +#ifdef CONFIG_PPC_P7_NAP /* * Check if thread was in power saving mode. We come here when any * of the following is true: @@ -1128,30 +1125,26 @@ BEGIN_FTR_SECTION END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) #endif - /* - * Check if we are coming from hypervisor userspace. If yes then we - * continue in host kernel in V mode to deliver the MC event. - */ - rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ - beq 5f -4: andi. r11,r12,MSR_PR /* See if coming from user. */ - bne 9f /* continue in V mode if we are. */ - -5: #ifdef CONFIG_KVM_BOOK3S_64_HANDLER -BEGIN_FTR_SECTION /* - * We are coming from kernel context. Check if we are coming from - * guest. if yes, then we can continue. We will fall through - * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. + * Check if we are coming from guest. If yes, then run the normal + * exception handler which will take the do_kvm_200->kvmppc_interrupt + * branch to deliver the MC event to guest. */ lbz r11,HSTATE_IN_GUEST(r13) cmpwi r11,0 /* Check if coming from guest */ bne 9f /* continue if we are. */ -END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) #endif + + /* + * Check if we are coming from userspace. If yes, then run the normal + * exception handler which will deliver the MC event to this kernel. + */ + andi. r11,r12,MSR_PR /* See if coming from user. */ + bne 9f /* continue in V mode if we are. */ + /* - * At this point we are not sure about what context we come from. + * At this point we are coming from kernel context. * Queue up the MCE event and return from the interrupt. * But before that, check if this is an un-recoverable exception. * If yes, then stay on emergency stack and panic. From patchwork Wed Jul 10 15:19:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130477 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNg16jFdz9sMQ for ; Thu, 11 Jul 2019 01:40:13 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KLmWIkyd"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNg15TjlzDqnp for ; Thu, 11 Jul 2019 01:40:13 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KLmWIkyd"; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNH30fbjzDqKZ for ; Thu, 11 Jul 2019 01:22:54 +1000 (AEST) Received: by mail-pf1-x444.google.com with SMTP id r7so1268057pfl.3 for ; Wed, 10 Jul 2019 08:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GObua8H54fup3mM+gXxoZ439qwDeiSqF74A3rMTO8s0=; b=KLmWIkydT8DgUfFZSZQde34O4/Vq68V7cXjBhzyt+6Ojxv/VS12ImwVneZJ7AJEBrT KWBn+ZvY9PyEiZamOMu3AWZZtYUumXbUIrbRHuJk1tBl0GRNDR0DyopQRaGyS74jSaVx dpKxa+2aYiTr/OMzXgZ50jShnOxBl8aodIBnlziop0VccDCiGpCwLDyWPqQ+WIjbueAZ ThN7BsE9Dsll+ZfS3ljoX40g7pBBcIQsgoqECPA7xxRgGqZ855gZtaW65CkN45kjcVMZ Wu+SsXBhkCpuYpWcfXk+3XqbKoOGUO3+wQifIoXH1/J4Daz/hYe9dYYe4zP/HkNpzHO7 iyug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GObua8H54fup3mM+gXxoZ439qwDeiSqF74A3rMTO8s0=; b=Qx/xzqTjU7+HYSp1bOYhiFBfAXM2FB3Aovz682nGPmZ+BzKH9zU9iHd4o0KYt56+Cx rza1hYgWbTFv4tfwJiBJuWnASWbwDYZloLXzq+v05LNJldv5/AddR0vUv6/lvHdx1v6n XjHFA6Y9xaRSXMTDmlWxQ5xyj7+vASErzlbSyou4QcDT+QyULfd/AhN1QZeAM0KG80+5 C9+VRsoiKVzltUV+GsRZ/2A7xMKQfBONzpyLs6DSS6lCo/EXhMROHsmfwNGjzaE9brtl uJ6ptSNhlKZ+8/joww4rGrK9XNipkHE5uxqdrhOoeAHOqBFxN/24UK82UqJPJwqdgKUS obDg== X-Gm-Message-State: APjAAAVhx/fsV6n0NU0VforbNi3tSGmPSIUsS++cm9HwmmYAYvozEmAS pQt86s44Kho4hhf780yGmu1+ltY517Q= X-Google-Smtp-Source: APXvYqzUGRFfjoLJv7wNiNBD3Yib06Sey3PtreM+aTUWWZLuZ9n+xZWEY/OjVKqRveQ4qV3xA1UMIA== X-Received: by 2002:a17:90a:8a17:: with SMTP id w23mr7376928pjn.139.1562772171998; Wed, 10 Jul 2019 08:22:51 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.49 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:51 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 04/16] powerpc/64s/exception: machine check adjust RFI target Date: Thu, 11 Jul 2019 01:19:38 +1000 Message-Id: <20190710151950.31906-5-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The host kernel delivery case for powernv does RFI_TO_USER_OR_KERNEL, but should just use RFI_TO_KERNEL which makes it clear this is not a user case. This is not a bug because RFI_TO_USER_OR_KERNEL deals with kernel returns just fine. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 5789a00691f9..0186a44bb981 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1184,7 +1184,7 @@ BEGIN_FTR_SECTION */ bl machine_check_queue_event MACHINE_CHECK_HANDLER_WINDUP - RFI_TO_USER_OR_KERNEL + RFI_TO_KERNEL FTR_SECTION_ELSE /* * pSeries: Return from MC interrupt. Before that stay on emergency From patchwork Wed Jul 10 15:19:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130478 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNjH4fg1z9sMQ for ; Thu, 11 Jul 2019 01:42:11 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="aMvgeDzX"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNjH3dwczDqbG for ; Thu, 11 Jul 2019 01:42:11 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::643; helo=mail-pl1-x643.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="aMvgeDzX"; dkim-atps=neutral Received: from mail-pl1-x643.google.com (mail-pl1-x643.google.com [IPv6:2607:f8b0:4864:20::643]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNH51vZwzDqLt for ; Thu, 11 Jul 2019 01:22:57 +1000 (AEST) Received: by mail-pl1-x643.google.com with SMTP id a93so1402220pla.7 for ; Wed, 10 Jul 2019 08:22:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p+jjIAIMslx172lTxJVoXHhGXL+fIcfc+rKiQb14IpE=; b=aMvgeDzXO5r5K3P9Gtp+0OJxDh2MrLI08DdRTQVSFIyaRZK1t8UHAdMU94AIyTAzb6 ruHHwNTCNKVOi+6mBfiAew5ElMWsWXAriy1Zu/NLrErW5LlMPmNneJ3yiRtrfu/gFZd8 j3vVWzkqRVGrOTRjkaJVt6A31mr1dV2AN6AHuDnBVlStVz40XC+jIJp+sxdM3MuwYTw1 7sl/XJKoBJ1V87WuenOKPChVrWFD2A6oZ1UmupAdLetH3Z3imT76j2Qw7D5Ob2bN4PjP S4Zz2c95GwvVFFSu4HR2XauqkmBsnwIzRTF9U0mXOPXH9ZXov16BGd3paPpF1LLB1t3f ayVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p+jjIAIMslx172lTxJVoXHhGXL+fIcfc+rKiQb14IpE=; b=OBm3Go/dD4SbNisFuieyB3US6UVfv4/Gs6dcedEjEAf/z6B/6gDIujTXsBIvYRPixD AZHDaO9MtnHsULUxWP/7AGw1dPEvUcJBDrVX/eEon3XhEAVI59G/G7Q4oO4HFsmXdy1o SQnuvDShT4q05CPOuilBnKHDcasEUj8euHc19/Rw1s5FinlDbIFrykVcLeU6MI4FDIQu GqBv148xwkNbMJaOOeYvRmBQ4yuRrU2pBh5gR6vwf8A9NTR8BeEjgQEqQCEuvf5eSaIs lwNDBux+N1aScmtau45mlJE3fnYg/RCpn0tvaUpwZ4rBU/UK/1fMdQgoEe2zaJDzFXNT rDaw== X-Gm-Message-State: APjAAAUw6BlhgKI2C1hTVkftdhLgBzeZOv9nZMuZLBF9RytaDJKDUTsM GIed/Z0vOBwuXBUuvIwD4CBUjEVr7dg= X-Google-Smtp-Source: APXvYqyjYR0iuxiFzZDm5JYG/pZN+pw3yS/hQJ0X/KynkYVWBAzlcKXCb16+NcbpU0F+FMcFFIsHkA== X-Received: by 2002:a17:902:27a8:: with SMTP id d37mr39590137plb.150.1562772174697; Wed, 10 Jul 2019 08:22:54 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.52 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:54 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 05/16] powerpc/64s/exception: machine check pseries should always run the early handler Date: Thu, 11 Jul 2019 01:19:39 +1000 Message-Id: <20190710151950.31906-6-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Now that pseries with fwnmi registered runs the early machine check handler, there is no good reason to special case the non-fwnmi case and skip the early handler. Reducing the code and number of paths is a top priority for asm code, it's better to handle this in C where possible (and the pseries early handler is a no-op if fwnmi is not registered). Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 0186a44bb981..a69ceb28cf4c 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -934,11 +934,7 @@ EXC_COMMON_BEGIN(system_reset_common) EXC_REAL_BEGIN(machine_check, 0x200, 0x100) EXCEPTION_PROLOG_0 PACA_EXMC -BEGIN_FTR_SECTION b machine_check_common_early -FTR_SECTION_ELSE - b machine_check_pSeries_0 -ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) EXC_REAL_END(machine_check, 0x200, 0x100) EXC_VIRT_NONE(0x4200, 0x100) TRAMP_REAL_BEGIN(machine_check_common_early) From patchwork Wed Jul 10 15:19:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130482 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNlT2xm6z9sNC for ; Thu, 11 Jul 2019 01:44:05 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="M8UsyO7k"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNlS5ZRyzDqX6 for ; Thu, 11 Jul 2019 01:44:04 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="M8UsyO7k"; dkim-atps=neutral Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNH760qSzDqQq for ; Thu, 11 Jul 2019 01:22:59 +1000 (AEST) Received: by mail-pf1-x441.google.com with SMTP id y15so1266868pfn.5 for ; Wed, 10 Jul 2019 08:22:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Q5nzEZzoD8r4bBmmvSx3fN5G38mG8QhyHILVVojissE=; b=M8UsyO7kN2iS3GvbeNTBlWwKbtUG6X/xxNQz56ptd71hlBcBLLiEhK208LW/OSv+uX Bk0dfdMnl5r/YbXa6KZWsbmPedo9MeB8Qkl5QI8/txVzwtmJcdbIOZEFkKskgyR9SjRt fK+57w7kG8vkhHYNFBttp2vgWfiN2H7ct5UnUReZsyo9KnORq+8hKuybxHWKY5dKjNcP uUr9nN14qZvOT12SRY9gFu+4fCceXFFwoNZu/w3BL3eW+ti0/InT773WzhzROd7Jh6pS IF92JMwb9B3tq234h7frYycLTfLsTdGPAsm8EaXXLD6WQPDYTbxkdbEdpnvKPntZowVO jTvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q5nzEZzoD8r4bBmmvSx3fN5G38mG8QhyHILVVojissE=; b=hzZrI7urqxHjs0Kk3X/wWEeydjHiOJV9gX6LgnBectvx7MidSW8k2A9fIZS6fQboTm 4c3a1EGAuGfLp9zp7bF8kTMvRCgOL/VcJ5s2XcT+B8CpRCFmfq5Y41TaWa6QzHsd8D5C REKZl61BHmVrUrDpKcil4lOy6FqUmBlkmQQ3BDRgU0ICqt5Gi0swyPacsacV9+6cJ1XP ySIHZWDJh7d5OOkWOic+w3+/COQ3JAO4FEQsfeil3QVeDYGfpn37SBeBlDlTFeHFixQd d6TxVHyOa2BgNv2vxq0vFU/NOhD++gDR17KwVqD3vWY/qifSY30JXf4WhwcEcyxWn4Uf HdRQ== X-Gm-Message-State: APjAAAWJ3PsPsehsDsZDD7ON1nxXF8ztobkbJMVyCi0PW+ES1gq++oua JFk5VkV7X0MexKd+XIxO0PJWogiCeiI= X-Google-Smtp-Source: APXvYqwRpD2HACuBFdxWh00uiJ6h5N+hU6LOvHNi9WzllqRnX/6O1h+P5RFCKKrGmipmV588Ckdyfg== X-Received: by 2002:a63:595e:: with SMTP id j30mr35833529pgm.2.1562772177434; Wed, 10 Jul 2019 08:22:57 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.55 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:57 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 06/16] powerpc/64s/exception: machine check remove machine_check_pSeries_0 branch Date: Thu, 11 Jul 2019 01:19:40 +1000 Message-Id: <20190710151950.31906-7-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" This label has only one caller, so unwind the branch and move it inline. The location of the comment is adjusted to match similar one in system reset. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index a69ceb28cf4c..54ca2b189d43 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1014,20 +1014,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) b 1b b . /* prevent speculative execution */ -TRAMP_REAL_BEGIN(machine_check_pSeries) - .globl machine_check_fwnmi -machine_check_fwnmi: +#ifdef CONFIG_PPC_PSERIES +TRAMP_REAL_BEGIN(machine_check_fwnmi) EXCEPTION_PROLOG_0 PACA_EXMC b machine_check_common_early - -machine_check_pSeries_0: - EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 - /* - * MSR_RI is not enabled, because PACA_EXMC is being used, so a - * nested machine check corrupts it. machine_check_common enables - * MSR_RI. - */ - EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0 +#endif TRAMP_KVM_SKIP(PACA_EXMC, 0x200) @@ -1197,7 +1188,13 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) /* Deliver the machine check to host kernel in V mode. */ MACHINE_CHECK_HANDLER_WINDUP EXCEPTION_PROLOG_0 PACA_EXMC - b machine_check_pSeries_0 + EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 + EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0 + /* + * MSR_RI is not enabled, because PACA_EXMC is being used, so a + * nested machine check corrupts it. machine_check_common enables + * MSR_RI. + */ EXC_COMMON_BEGIN(unrecover_mce) /* Invoke machine_check_exception to print MCE event and panic. */ From patchwork Wed Jul 10 15:19:41 2019 Content-Type: text/plain; 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[14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.22.57 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:22:59 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 07/16] powerpc/64s/exception: machine check use correct cfar for late handler Date: Thu, 11 Jul 2019 01:19:41 +1000 Message-Id: <20190710151950.31906-8-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Bare metal machine checks run an "early" handler in real mode before running the main handler which reports the event. The main handler runs exactly as a normal interrupt handler, after the "windup" which sets registers back as they were at interrupt entry. CFAR does not get restored by the windup code, so that will be wrong when the handler is run. Restore the CFAR to the saved value before running the late handler. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 54ca2b189d43..f2c24a4ae723 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1186,6 +1186,10 @@ FTR_SECTION_ELSE ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 9: /* Deliver the machine check to host kernel in V mode. */ +BEGIN_FTR_SECTION + ld r10,ORIG_GPR3(r1) + mtspr SPRN_CFAR,r10 +END_FTR_SECTION_IFSET(CPU_FTR_CFAR) MACHINE_CHECK_HANDLER_WINDUP EXCEPTION_PROLOG_0 PACA_EXMC EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 From patchwork Wed Jul 10 15:19:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130484 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNsS3pCfz9s7T for ; Thu, 11 Jul 2019 01:49:16 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="oYpP1Mw6"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNsS0wDpzDqcD for ; Thu, 11 Jul 2019 01:49:16 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::543; helo=mail-pg1-x543.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="oYpP1Mw6"; dkim-atps=neutral Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHG5bbVzDqMp for ; Thu, 11 Jul 2019 01:23:06 +1000 (AEST) Received: by mail-pg1-x543.google.com with SMTP id i8so1405345pgm.13 for ; Wed, 10 Jul 2019 08:23:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tDmQH0iPLwTB1sV/35aHWimh5kfD3Kv9FC0WiuUyuIU=; b=oYpP1Mw6iNGnLd4FDi1LxjA3ZHbj15u5QEdty3Ej8gAj4RTQuCFDTsmuziOsDnAofL 4Wdm5+F8ZvDPqrSbixZs+u1C+00XdA00bD78G7b3SyoqQxxAx0VLmAIUffBJCoqKh4Tc EiND3PXvaH6oAaWX11SAyRMF7LKj9jyR/5Y5Od0n9jphPge3n1waypEVRsjBG+h+Ub3T aTXyMsqolnNhke7qLi3TIXo9V99rhM079wj9aQGbufBHq9dF4c/oXStEBz83jwOejLqF 9haxpksuWPxruXzDq6wjxoGIQQ7VgC/gJTqrn/H3++2Ow4OGa+Y/1lvqCNYBrjdDp6TR Kpmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tDmQH0iPLwTB1sV/35aHWimh5kfD3Kv9FC0WiuUyuIU=; b=Y/Q0kQyxHJQ0KmzLBsfov9SHR7v8QNYCWbeqdiFLWn/7jnoAPSC86iIqNY8NWPXWpH 3oZrRKBU8HPWjLJhnxCpjvjExKJCYQyvNlCWQYsM7S7WFCtaLwxgEHex6oSp0CfbBQfL Iiq83SsEA/uyGYqTlxgatfTNTCMcd4LUt6r7XIHenrExOBeMILEUD2Xbxx3+BBbrUkhq vRisfUen6PGqEx59hkXaGXFctD7/8wxzeYzM6raj3YI6Bt7+VSokoRIexFRYk29cKp5D SxGlzUDUlJNFLY45aZ1ULqYSBJAvKyksDQRX9Wo/RaM61X7duU/6CzoxlC/B+28FedB4 n3Tg== X-Gm-Message-State: APjAAAUW4185zx1gdmCdoEEaB6mNL8BZqrvyZ5mcsHdpk89cwdNQtkSW tblJiq00ykM+Qwyd9TgOpLyySR+zVgw= X-Google-Smtp-Source: APXvYqy2apX3YNbhgY9odgGlabNRsdfk9nvNZOd7rgdUkz+GiTdzK6fP5Lu/5DgZLFLJDiDVk9ihIg== X-Received: by 2002:a63:4554:: with SMTP id u20mr38677756pgk.406.1562772183080; Wed, 10 Jul 2019 08:23:03 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.00 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:02 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 08/16] powerpc/64s/powernv: machine check dump SLB contents Date: Thu, 11 Jul 2019 01:19:42 +1000 Message-Id: <20190710151950.31906-9-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Re-use the code introduced in pseries to save and dump the contents of the SLB in the case of an SLB involved machine check exception. This patch also avoids allocating the SLB save array on pseries radix. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/mce.c | 6 ++++++ arch/powerpc/kernel/mce_power.c | 4 ++++ arch/powerpc/platforms/powernv/setup.c | 9 +++++++++ arch/powerpc/platforms/pseries/setup.c | 24 +++++++++++++----------- 4 files changed, 32 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c index b18df633eae9..38b560f92d12 100644 --- a/arch/powerpc/kernel/mce.c +++ b/arch/powerpc/kernel/mce.c @@ -486,6 +486,12 @@ void machine_check_print_event_info(struct machine_check_event *evt, subtype = evt->error_class < ARRAY_SIZE(mc_error_class) ? mc_error_class[evt->error_class] : "Unknown"; printk("%sMCE: CPU%d: %s\n", level, evt->cpu, subtype); + +#ifdef CONFIG_PPC_BOOK3S_64 + /* Display faulty slb contents for SLB errors. */ + if (evt->error_type == MCE_ERROR_TYPE_SLB) + slb_dump_contents(local_paca->mce_faulty_slbs); +#endif } EXPORT_SYMBOL_GPL(machine_check_print_event_info); diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c index e39536aad30d..c4d0e0c6e7d3 100644 --- a/arch/powerpc/kernel/mce_power.c +++ b/arch/powerpc/kernel/mce_power.c @@ -398,6 +398,8 @@ static int mce_handle_ierror(struct pt_regs *regs, /* attempt to correct the error */ switch (table[i].error_type) { case MCE_ERROR_TYPE_SLB: + if (local_paca->in_mce == 1) + slb_save_contents(local_paca->mce_faulty_slbs); handled = mce_flush(MCE_FLUSH_SLB); break; case MCE_ERROR_TYPE_ERAT: @@ -483,6 +485,8 @@ static int mce_handle_derror(struct pt_regs *regs, /* attempt to correct the error */ switch (table[i].error_type) { case MCE_ERROR_TYPE_SLB: + if (local_paca->in_mce == 1) + slb_save_contents(local_paca->mce_faulty_slbs); if (mce_flush(MCE_FLUSH_SLB)) handled = 1; break; diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index a5e52f9eed3c..83498604d322 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -166,6 +167,14 @@ static void __init pnv_init(void) else #endif add_preferred_console("hvc", 0, NULL); + + if (!radix_enabled()) { + int i; + + /* Allocate per cpu area to save old slb contents during MCE */ + for_each_possible_cpu(i) + paca_ptrs[i]->mce_faulty_slbs = memblock_alloc_node(mmu_slb_size, __alignof__(*paca_ptrs[i]->mce_faulty_slbs), cpu_to_node(i)); + } } static void __init pnv_init_IRQ(void) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index ab38a6c8dffb..637d59f4c5ce 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -139,17 +139,19 @@ static void __init fwnmi_init(void) } #ifdef CONFIG_PPC_BOOK3S_64 - /* Allocate per cpu slb area to save old slb contents during MCE */ - size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; - slb_ptr = memblock_alloc_try_nid_raw(size, sizeof(struct slb_entry), - MEMBLOCK_LOW_LIMIT, ppc64_rma_size, - NUMA_NO_NODE); - if (!slb_ptr) - panic("Failed to allocate %zu bytes below %pa for slb area\n", - size, &ppc64_rma_size); - - for_each_possible_cpu(i) - paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); + if (!radix_enabled()) { + /* Allocate per cpu area to save old slb contents during MCE */ + size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; + slb_ptr = memblock_alloc_try_nid_raw(size, + sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, + ppc64_rma_size, NUMA_NO_NODE); + if (!slb_ptr) + panic("Failed to allocate %zu bytes below %pa for slb area\n", + size, &ppc64_rma_size); + + for_each_possible_cpu(i) + paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); + } #endif } From patchwork Wed Jul 10 15:19:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130485 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNx24ZBQz9sMr for ; Thu, 11 Jul 2019 01:52:22 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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[14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.03 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:05 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 09/16] powerpc/64s/pseries: machine check convert to use common event code Date: Thu, 11 Jul 2019 01:19:43 +1000 Message-Id: <20190710151950.31906-10-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The common machine_check_event data structures and queues are mostly platform independent, with powernv decoding SRR1/DSISR/etc., into machine_check_event objects. This patch converts pseries to use this infrastructure by decoding fwnmi/rtas data into machine_check_event objects. This allows queueing to be used by a subsequent change to delay the virtual mode handling of machine checks that occur in kernel space where it is unsafe to switch immediately to virtual mode, similarly to powernv. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/mce.h | 6 + arch/powerpc/kernel/mce.c | 34 +- arch/powerpc/platforms/pseries/ras.c | 457 +++++++++++---------------- 3 files changed, 230 insertions(+), 267 deletions(-) diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h index a4c6a74ad2fb..6f56b2d350b2 100644 --- a/arch/powerpc/include/asm/mce.h +++ b/arch/powerpc/include/asm/mce.h @@ -30,6 +30,10 @@ enum MCE_Disposition { enum MCE_Initiator { MCE_INITIATOR_UNKNOWN = 0, MCE_INITIATOR_CPU = 1, + MCE_INITIATOR_PCI = 2, + MCE_INITIATOR_ISA = 3, + MCE_INITIATOR_MEMORY= 4, + MCE_INITIATOR_POWERMGM = 5, }; enum MCE_ErrorType { @@ -41,6 +45,8 @@ enum MCE_ErrorType { MCE_ERROR_TYPE_USER = 5, MCE_ERROR_TYPE_RA = 6, MCE_ERROR_TYPE_LINK = 7, + MCE_ERROR_TYPE_DCACHE = 8, + MCE_ERROR_TYPE_ICACHE = 9, }; enum MCE_ErrorClass { diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c index 38b560f92d12..5b4f766a68e9 100644 --- a/arch/powerpc/kernel/mce.c +++ b/arch/powerpc/kernel/mce.c @@ -300,7 +300,7 @@ static void machine_check_process_queued_event(struct irq_work *work) void machine_check_print_event_info(struct machine_check_event *evt, bool user_mode, bool in_guest) { - const char *level, *sevstr, *subtype, *err_type; + const char *level, *sevstr, *subtype, *err_type, *initiator; uint64_t ea = 0, pa = 0; int n = 0; char dar_str[50]; @@ -385,6 +385,28 @@ void machine_check_print_event_info(struct machine_check_event *evt, break; } + switch(evt->initiator) { + case MCE_INITIATOR_CPU: + initiator = "CPU"; + break; + case MCE_INITIATOR_PCI: + initiator = "PCI"; + break; + case MCE_INITIATOR_ISA: + initiator = "ISA"; + break; + case MCE_INITIATOR_MEMORY: + initiator = "Memory"; + break; + case MCE_INITIATOR_POWERMGM: + initiator = "Power Management"; + break; + case MCE_INITIATOR_UNKNOWN: + default: + initiator = "Unknown"; + break; + } + switch (evt->error_type) { case MCE_ERROR_TYPE_UE: err_type = "UE"; @@ -451,6 +473,14 @@ void machine_check_print_event_info(struct machine_check_event *evt, if (evt->u.link_error.effective_address_provided) ea = evt->u.link_error.effective_address; break; + case MCE_ERROR_TYPE_DCACHE: + err_type = "D-Cache"; + subtype = "Unknown"; + break; + case MCE_ERROR_TYPE_ICACHE: + err_type = "I-Cache"; + subtype = "Unknown"; + break; default: case MCE_ERROR_TYPE_UNKNOWN: err_type = "Unknown"; @@ -483,6 +513,8 @@ void machine_check_print_event_info(struct machine_check_event *evt, level, evt->cpu, evt->srr0, (void *)evt->srr0, pa_str); } + printk("%sMCE: CPU%d: Initiator %s\n", level, evt->cpu, initiator); + subtype = evt->error_class < ARRAY_SIZE(mc_error_class) ? mc_error_class[evt->error_class] : "Unknown"; printk("%sMCE: CPU%d: %s\n", level, evt->cpu, subtype); diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index f16fdd0f71f7..e03c3389692e 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c @@ -76,6 +76,7 @@ struct pseries_mc_errorlog { #define MC_ERROR_TYPE_UE 0x00 #define MC_ERROR_TYPE_SLB 0x01 #define MC_ERROR_TYPE_ERAT 0x02 +#define MC_ERROR_TYPE_UNKNOWN 0x03 #define MC_ERROR_TYPE_TLB 0x04 #define MC_ERROR_TYPE_D_CACHE 0x05 #define MC_ERROR_TYPE_I_CACHE 0x07 @@ -87,6 +88,9 @@ struct pseries_mc_errorlog { #define MC_ERROR_UE_LOAD_STORE 3 #define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE 4 +#define UE_EFFECTIVE_ADDR_PROVIDED 0x40 +#define UE_LOGICAL_ADDR_PROVIDED 0x20 + #define MC_ERROR_SLB_PARITY 0 #define MC_ERROR_SLB_MULTIHIT 1 #define MC_ERROR_SLB_INDETERMINATE 2 @@ -113,27 +117,6 @@ static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog) } } -static -inline u64 rtas_mc_get_effective_addr(const struct pseries_mc_errorlog *mlog) -{ - __be64 addr = 0; - - switch (mlog->error_type) { - case MC_ERROR_TYPE_UE: - if (mlog->sub_err_type & 0x40) - addr = mlog->effective_address; - break; - case MC_ERROR_TYPE_SLB: - case MC_ERROR_TYPE_ERAT: - case MC_ERROR_TYPE_TLB: - if (mlog->sub_err_type & 0x80) - addr = mlog->effective_address; - default: - break; - } - return be64_to_cpu(addr); -} - /* * Enable the hotplug interrupt late because processing them may touch other * devices or systems (e.g. hugepages) that have not been initialized at the @@ -511,160 +494,162 @@ int pSeries_system_reset_exception(struct pt_regs *regs) return 0; /* need to perform reset */ } -#define VAL_TO_STRING(ar, val) \ - (((val) < ARRAY_SIZE(ar)) ? ar[(val)] : "Unknown") -static void pseries_print_mce_info(struct pt_regs *regs, - struct rtas_error_log *errp) +static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log *errp) { - const char *level, *sevstr; + struct mce_error_info mce_err = { 0 }; + unsigned long eaddr = 0, paddr = 0; struct pseries_errorlog *pseries_log; struct pseries_mc_errorlog *mce_log; - u8 error_type, err_sub_type; - u64 addr; - u8 initiator = rtas_error_initiator(errp); int disposition = rtas_error_disposition(errp); + int initiator = rtas_error_initiator(errp); + int severity = rtas_error_severity(errp); + u8 error_type, err_sub_type; - static const char * const initiators[] = { - [0] = "Unknown", - [1] = "CPU", - [2] = "PCI", - [3] = "ISA", - [4] = "Memory", - [5] = "Power Mgmt", - }; - static const char * const mc_err_types[] = { - [0] = "UE", - [1] = "SLB", - [2] = "ERAT", - [3] = "Unknown", - [4] = "TLB", - [5] = "D-Cache", - [6] = "Unknown", - [7] = "I-Cache", - }; - static const char * const mc_ue_types[] = { - [0] = "Indeterminate", - [1] = "Instruction fetch", - [2] = "Page table walk ifetch", - [3] = "Load/Store", - [4] = "Page table walk Load/Store", - }; - - /* SLB sub errors valid values are 0x0, 0x1, 0x2 */ - static const char * const mc_slb_types[] = { - [0] = "Parity", - [1] = "Multihit", - [2] = "Indeterminate", - }; - - /* TLB and ERAT sub errors valid values are 0x1, 0x2, 0x3 */ - static const char * const mc_soft_types[] = { - [0] = "Unknown", - [1] = "Parity", - [2] = "Multihit", - [3] = "Indeterminate", - }; - - if (!rtas_error_extended(errp)) { - pr_err("Machine check interrupt: Missing extended error log\n"); - return; - } + if (initiator == RTAS_INITIATOR_UNKNOWN) + mce_err.initiator = MCE_INITIATOR_UNKNOWN; + else if (initiator == RTAS_INITIATOR_CPU) + mce_err.initiator = MCE_INITIATOR_CPU; + else if (initiator == RTAS_INITIATOR_PCI) + mce_err.initiator = MCE_INITIATOR_PCI; + else if (initiator == RTAS_INITIATOR_ISA) + mce_err.initiator = MCE_INITIATOR_ISA; + else if (initiator == RTAS_INITIATOR_MEMORY) + mce_err.initiator = MCE_INITIATOR_MEMORY; + else if (initiator == RTAS_INITIATOR_POWERMGM) + mce_err.initiator = MCE_INITIATOR_POWERMGM; + else + mce_err.initiator = MCE_INITIATOR_UNKNOWN; + + if (severity == RTAS_SEVERITY_NO_ERROR) + mce_err.severity = MCE_SEV_NO_ERROR; + else if (severity == RTAS_SEVERITY_EVENT) + mce_err.severity = MCE_SEV_WARNING; + else if (severity == RTAS_SEVERITY_WARNING) + mce_err.severity = MCE_SEV_WARNING; + else if (severity == RTAS_SEVERITY_ERROR_SYNC) + mce_err.severity = MCE_SEV_SEVERE; + else if (severity == RTAS_SEVERITY_ERROR) + mce_err.severity = MCE_SEV_SEVERE; + else if (severity == RTAS_SEVERITY_FATAL) + mce_err.severity = MCE_SEV_FATAL; + else + mce_err.severity = MCE_SEV_FATAL; + + if (severity <= RTAS_SEVERITY_ERROR_SYNC) + mce_err.sync_error = true; + else + mce_err.sync_error = false; + + mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; + mce_err.error_class = MCE_ECLASS_UNKNOWN; + + if (!rtas_error_extended(errp)) + goto out; pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE); if (pseries_log == NULL) - return; + goto out; mce_log = (struct pseries_mc_errorlog *)pseries_log->data; - error_type = mce_log->error_type; err_sub_type = rtas_mc_error_sub_type(mce_log); - switch (rtas_error_severity(errp)) { - case RTAS_SEVERITY_NO_ERROR: - level = KERN_INFO; - sevstr = "Harmless"; - break; - case RTAS_SEVERITY_WARNING: - level = KERN_WARNING; - sevstr = ""; - break; - case RTAS_SEVERITY_ERROR: - case RTAS_SEVERITY_ERROR_SYNC: - level = KERN_ERR; - sevstr = "Severe"; - break; - case RTAS_SEVERITY_FATAL: - default: - level = KERN_ERR; - sevstr = "Fatal"; - break; - } + switch (mce_log->error_type) { + case MC_ERROR_TYPE_UE: + mce_err.error_type = MCE_ERROR_TYPE_UE; + switch (err_sub_type) { + case MC_ERROR_UE_IFETCH: + mce_err.u.ue_error_type = MCE_UE_ERROR_IFETCH; + case MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH: + mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH; + case MC_ERROR_UE_LOAD_STORE: + mce_err.u.ue_error_type = MCE_UE_ERROR_LOAD_STORE; + case MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE: + mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE; + case MC_ERROR_UE_INDETERMINATE: + default: + mce_err.u.ue_error_type = MCE_UE_ERROR_INDETERMINATE; + break; + } + if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) + eaddr = be64_to_cpu(mce_log->effective_address); -#ifdef CONFIG_PPC_BOOK3S_64 - /* Display faulty slb contents for SLB errors. */ - if (error_type == MC_ERROR_TYPE_SLB) - slb_dump_contents(local_paca->mce_faulty_slbs); -#endif + if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) { + paddr = be64_to_cpu(mce_log->logical_address); + } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) { + unsigned long pfn; + + pfn = addr_to_pfn(regs, eaddr); + if (pfn != ULONG_MAX) + paddr = pfn << PAGE_SHIFT; + } - printk("%s%s Machine check interrupt [%s]\n", level, sevstr, - disposition == RTAS_DISP_FULLY_RECOVERED ? - "Recovered" : "Not recovered"); - if (user_mode(regs)) { - printk("%s NIP: [%016lx] PID: %d Comm: %s\n", level, - regs->nip, current->pid, current->comm); - } else { - printk("%s NIP [%016lx]: %pS\n", level, regs->nip, - (void *)regs->nip); - } - printk("%s Initiator: %s\n", level, - VAL_TO_STRING(initiators, initiator)); - switch (error_type) { - case MC_ERROR_TYPE_UE: - printk("%s Error type: %s [%s]\n", level, - VAL_TO_STRING(mc_err_types, error_type), - VAL_TO_STRING(mc_ue_types, err_sub_type)); break; case MC_ERROR_TYPE_SLB: - printk("%s Error type: %s [%s]\n", level, - VAL_TO_STRING(mc_err_types, error_type), - VAL_TO_STRING(mc_slb_types, err_sub_type)); + mce_err.error_type = MCE_ERROR_TYPE_SLB; + switch (err_sub_type) { + case MC_ERROR_SLB_PARITY: + mce_err.u.slb_error_type = MCE_SLB_ERROR_PARITY; + break; + case MC_ERROR_SLB_MULTIHIT: + mce_err.u.slb_error_type = MCE_SLB_ERROR_MULTIHIT; + break; + case MC_ERROR_SLB_INDETERMINATE: + default: + mce_err.u.slb_error_type = MCE_SLB_ERROR_INDETERMINATE; + break; + } + if (mce_log->sub_err_type & 0x80) + eaddr = be64_to_cpu(mce_log->effective_address); break; case MC_ERROR_TYPE_ERAT: + mce_err.error_type = MCE_ERROR_TYPE_ERAT; + switch (err_sub_type) { + case MC_ERROR_ERAT_PARITY: + mce_err.u.erat_error_type = MCE_ERAT_ERROR_PARITY; + break; + case MC_ERROR_ERAT_MULTIHIT: + mce_err.u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT; + break; + case MC_ERROR_ERAT_INDETERMINATE: + default: + mce_err.u.erat_error_type = MCE_ERAT_ERROR_INDETERMINATE; + break; + } + if (mce_log->sub_err_type & 0x80) + eaddr = be64_to_cpu(mce_log->effective_address); + break; case MC_ERROR_TYPE_TLB: - printk("%s Error type: %s [%s]\n", level, - VAL_TO_STRING(mc_err_types, error_type), - VAL_TO_STRING(mc_soft_types, err_sub_type)); + mce_err.error_type = MCE_ERROR_TYPE_TLB; + switch (err_sub_type) { + case MC_ERROR_TLB_PARITY: + mce_err.u.tlb_error_type = MCE_TLB_ERROR_PARITY; + break; + case MC_ERROR_TLB_MULTIHIT: + mce_err.u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT; + break; + case MC_ERROR_TLB_INDETERMINATE: + default: + mce_err.u.tlb_error_type = MCE_TLB_ERROR_INDETERMINATE; + break; + } + if (mce_log->sub_err_type & 0x80) + eaddr = be64_to_cpu(mce_log->effective_address); break; + case MC_ERROR_TYPE_D_CACHE: + mce_err.error_type = MCE_ERROR_TYPE_DCACHE; + break; + case MC_ERROR_TYPE_I_CACHE: + mce_err.error_type = MCE_ERROR_TYPE_DCACHE; + break; + case MC_ERROR_TYPE_UNKNOWN: default: - printk("%s Error type: %s\n", level, - VAL_TO_STRING(mc_err_types, error_type)); + mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; break; } - addr = rtas_mc_get_effective_addr(mce_log); - if (addr) - printk("%s Effective address: %016llx\n", level, addr); -} - -static int mce_handle_error(struct rtas_error_log *errp) -{ - struct pseries_errorlog *pseries_log; - struct pseries_mc_errorlog *mce_log; - int disposition = rtas_error_disposition(errp); - u8 error_type; - - if (!rtas_error_extended(errp)) - goto out; - - pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE); - if (pseries_log == NULL) - goto out; - - mce_log = (struct pseries_mc_errorlog *)pseries_log->data; - error_type = mce_log->error_type; - #ifdef CONFIG_PPC_BOOK3S_64 if (disposition == RTAS_DISP_NOT_RECOVERED) { switch (error_type) { @@ -682,98 +667,24 @@ static int mce_handle_error(struct rtas_error_log *errp) slb_save_contents(local_paca->mce_faulty_slbs); flush_and_reload_slb(); disposition = RTAS_DISP_FULLY_RECOVERED; - rtas_set_disposition_recovered(errp); break; default: break; } + } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) { + /* Platform corrected itself but could be degraded */ + printk(KERN_ERR "MCE: limited recovery, system may " + "be degraded\n"); + disposition = RTAS_DISP_FULLY_RECOVERED; } #endif out: - return disposition; -} - -#ifdef CONFIG_MEMORY_FAILURE - -static DEFINE_PER_CPU(int, rtas_ue_count); -static DEFINE_PER_CPU(unsigned long, rtas_ue_paddr[MAX_MC_EVT]); - -#define UE_EFFECTIVE_ADDR_PROVIDED 0x40 -#define UE_LOGICAL_ADDR_PROVIDED 0x20 - - -static void pseries_hwpoison_work_fn(struct work_struct *work) -{ - unsigned long paddr; - int index; - - while (__this_cpu_read(rtas_ue_count) > 0) { - index = __this_cpu_read(rtas_ue_count) - 1; - paddr = __this_cpu_read(rtas_ue_paddr[index]); - memory_failure(paddr >> PAGE_SHIFT, 0); - __this_cpu_dec(rtas_ue_count); - } -} + save_mce_event(regs, disposition == RTAS_DISP_FULLY_RECOVERED, + &mce_err, regs->nip, eaddr, paddr); -static DECLARE_WORK(hwpoison_work, pseries_hwpoison_work_fn); - -static void queue_ue_paddr(unsigned long paddr) -{ - int index; - - index = __this_cpu_inc_return(rtas_ue_count) - 1; - if (index >= MAX_MC_EVT) { - __this_cpu_dec(rtas_ue_count); - return; - } - this_cpu_write(rtas_ue_paddr[index], paddr); - schedule_work(&hwpoison_work); -} - -static void pseries_do_memory_failure(struct pt_regs *regs, - struct pseries_mc_errorlog *mce_log) -{ - unsigned long paddr; - - if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) { - paddr = be64_to_cpu(mce_log->logical_address); - } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) { - unsigned long pfn; - - pfn = addr_to_pfn(regs, - be64_to_cpu(mce_log->effective_address)); - if (pfn == ULONG_MAX) - return; - paddr = pfn << PAGE_SHIFT; - } else { - return; - } - queue_ue_paddr(paddr); -} - -static void pseries_process_ue(struct pt_regs *regs, - struct rtas_error_log *errp) -{ - struct pseries_errorlog *pseries_log; - struct pseries_mc_errorlog *mce_log; - - if (!rtas_error_extended(errp)) - return; - - pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE); - if (!pseries_log) - return; - - mce_log = (struct pseries_mc_errorlog *)pseries_log->data; - - if (mce_log->error_type == MC_ERROR_TYPE_UE) - pseries_do_memory_failure(regs, mce_log); + return disposition; } -#else -static inline void pseries_process_ue(struct pt_regs *regs, - struct rtas_error_log *errp) { } -#endif /*CONFIG_MEMORY_FAILURE */ /* * Process MCE rtas errlog event. @@ -795,49 +706,51 @@ static void mce_process_errlog_event(struct irq_work *work) * Return 1 if corrected (or delivered a signal). * Return 0 if there is nothing we can do. */ -static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err) +static int recover_mce(struct pt_regs *regs, struct machine_check_event *evt) { int recovered = 0; - int disposition = rtas_error_disposition(err); - - pseries_print_mce_info(regs, err); if (!(regs->msr & MSR_RI)) { /* If MSR_RI isn't set, we cannot recover */ pr_err("Machine check interrupt unrecoverable: MSR(RI=0)\n"); recovered = 0; - - } else if (disposition == RTAS_DISP_FULLY_RECOVERED) { + } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) { /* Platform corrected itself */ recovered = 1; + } else if (evt->severity == MCE_SEV_FATAL) { + /* Fatal machine check */ + pr_err("Machine check interrupt is fatal\n"); + recovered = 0; + } - } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) { - /* Platform corrected itself but could be degraded */ - printk(KERN_ERR "MCE: limited recovery, system may " - "be degraded\n"); - recovered = 1; - - } else if (user_mode(regs) && !is_global_init(current) && - rtas_error_severity(err) == RTAS_SEVERITY_ERROR_SYNC) { - + if (!recovered && evt->sync_error) { /* - * If we received a synchronous error when in userspace - * kill the task. Firmware may report details of the fail - * asynchronously, so we can't rely on the target and type - * fields being valid here. + * Try to kill processes if we get a synchronous machine check + * (e.g., one caused by execution of this instruction). This + * will devolve into a panic if we try to kill init or are in + * an interrupt etc. + * + * TODO: Queue up this address for hwpoisioning later. + * TODO: This is not quite right for d-side machine + * checks ->nip is not necessarily the important + * address. */ - printk(KERN_ERR "MCE: uncorrectable error, killing task " - "%s:%d\n", current->comm, current->pid); - - _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); - recovered = 1; + if ((user_mode(regs))) { + _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); + recovered = 1; + } else if (die_will_crash()) { + /* + * die() would kill the kernel, so better to go via + * the platform reboot code that will log the + * machine check. + */ + recovered = 0; + } else { + die("Machine check", regs, SIGBUS); + recovered = 1; + } } - pseries_process_ue(regs, err); - - /* Queue irq work to log this rtas event later. */ - irq_work_queue(&mce_errlog_process_work); - return recovered; } @@ -853,14 +766,21 @@ static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err) */ int pSeries_machine_check_exception(struct pt_regs *regs) { - struct rtas_error_log *errp; + struct machine_check_event evt; - if (fwnmi_active) { - fwnmi_release_errinfo(); - errp = fwnmi_get_errlog(); - if (errp && recover_mce(regs, errp)) - return 1; + if (!get_mce_event(&evt, MCE_EVENT_RELEASE)) + return 0; + + /* Print things out */ + if (evt.version != MCE_V1) { + pr_err("Machine Check Exception, Unknown event version %d !\n", + evt.version); + return 0; } + machine_check_print_event_info(&evt, user_mode(regs), false); + + if (recover_mce(regs, &evt)) + return 1; return 0; } @@ -877,7 +797,12 @@ long pseries_machine_check_realmode(struct pt_regs *regs) * to panic. Hence we will call it as soon as we go into * virtual mode. */ - disposition = mce_handle_error(errp); + disposition = mce_handle_error(regs, errp); + fwnmi_release_errinfo(); + + /* Queue irq work to log this rtas event later. */ + irq_work_queue(&mce_errlog_process_work); + if (disposition == RTAS_DISP_FULLY_RECOVERED) return 1; } From patchwork Wed Jul 10 15:19:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130486 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kNzL6MkVz9s3l for ; Thu, 11 Jul 2019 01:54:22 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JJQgfxev"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kNzL0VjbzDqcq for ; Thu, 11 Jul 2019 01:54:22 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JJQgfxev"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHM4vS2zDqkX for ; Thu, 11 Jul 2019 01:23:11 +1000 (AEST) Received: by mail-pg1-x542.google.com with SMTP id w10so1421122pgj.7 for ; Wed, 10 Jul 2019 08:23:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=i6zXHqdz8hmEZ9yIOE9VYTMPvF4UPstKWHj2r1mxwjI=; b=JJQgfxevlDOTApxoNnPOGg/Z8XKr11LRi4OaJhbveAfzu0eQxRC4r+Du4b8nB79A7N 7YBScbysnfhEDA1ARaTLTsElBSrgQuqcj2bSBMYwpMHjU1LnqgYwY+QMuCyru4dHQTFM z9zpRIS6MQivKBd6itLjO7+Rdhy3Z42Cj4Mxj0nPd7PwOL9p7xYFxY0rXoBJryeizbKh b9gmklA7inOI25EdHSQXBz2TPm8WL1E2kZrYAoeicJhQlJt7jqds32ne3iEzosJmQegK hliXqf7iginrBxqjnYNlfJfzoG2KNp60RB8/S91VHOyQ/TttCeNMAT98Sf2FNsHfvk24 k68g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=i6zXHqdz8hmEZ9yIOE9VYTMPvF4UPstKWHj2r1mxwjI=; b=psvDFtmgpDyXYvs/UYlblAyPhcQEE9jsUkvpfB2packeqbirBojmDdtqa6UfR0qNlW lJI1UgsEUVAW7ajYxFips1z90R5M7zt7azlyaO4k5qe5dkdSuUjEDm+h3bVSaj06AF9M h2e2MtIxhoNN4+3xzNU8JgKUdfg5Hncgt1qsiaNFz89V/CO9eISahjnHJCxNYXgdOSNG /q3uN85oQmXSinfi3iNXe1qcBFUEPPZ2GIhY3cbN/FdrFoeDODJVCeDMeBQo51JvD4yN YTc53fExggJewHFdIzNhf2A8a+7TFwkDd9hsmc6Vso8vKwyDgTBwMfOq3XnvTa286JNc u5yA== X-Gm-Message-State: APjAAAX+xra5vJ7fA6tgQpMSYAYOnLw2U5/PI4fuuwAf0upr2rF77/Qa FG8QgkKZZz94wC0JYfk/+tRPhvbu3LI= X-Google-Smtp-Source: APXvYqzztKCQFNQlcSDaZpNS7EO5mRU4yPrgjsrlCFP4G2M2gX81gWEdMIF10SERMAeCXXiKW1n95w== X-Received: by 2002:a17:90a:2648:: with SMTP id l66mr7468200pje.65.1562772189227; Wed, 10 Jul 2019 08:23:09 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.06 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:08 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 10/16] powerpc/64s/exception: machine check pseries should skip the late handler for host kernel MCEs Date: Thu, 11 Jul 2019 01:19:44 +1000 Message-Id: <20190710151950.31906-11-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The powernv machine check handler copes with taking a MCE from one of three contexts, guest, host kernel, and host user. In each case the early handler runs first on a special stack. Then: - The guest case branches to the KVM interrupt handler (via standard interrupt macros). - The host user case will run the "late" handler which is like a normal interrupt that runs in virtual mode and uses the regular kernel stack. - The host kernel case queues the event and schedules it for processing with irq work. The last case is important, it must not enable virtual memory because the MMU state may not be set up to deal with that (e.g., SLB might be clear), it must not use the regular kernel stack for similar reasons (e.g., might be in OPAL with OPAL stack in r1), and the kernel does not expect anything to touch its stack if interrupts are disabled. The pseries handler does not do this queueing, but instead it always runs the late handler for host MCEs, which has some of the same problems. Now that pseries is using machine_check_events, it can just do the same as powernv and queue up kernel-mode MCE events. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index f2c24a4ae723..ac7b5bb614d9 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1163,7 +1163,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) cmpdi r3,0 /* see if we handled MCE successfully */ beq 1b /* if !handled then panic */ -BEGIN_FTR_SECTION + /* * Return from MC interrupt. * Queue up the MCE event so that we can log it later, while @@ -1172,18 +1172,7 @@ BEGIN_FTR_SECTION bl machine_check_queue_event MACHINE_CHECK_HANDLER_WINDUP RFI_TO_KERNEL -FTR_SECTION_ELSE - /* - * pSeries: Return from MC interrupt. Before that stay on emergency - * stack and call machine_check_exception to log the MCE event. - */ - LOAD_HANDLER(r10,mce_return) - mtspr SPRN_SRR0,r10 - ld r10,PACAKMSR(r13) - mtspr SPRN_SRR1,r10 - RFI_TO_KERNEL - b . -ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) + 9: /* Deliver the machine check to host kernel in V mode. */ BEGIN_FTR_SECTION @@ -1212,13 +1201,6 @@ EXC_COMMON_BEGIN(unrecover_mce) bl unrecoverable_exception b 1b -EXC_COMMON_BEGIN(mce_return) - /* Invoke machine_check_exception to print MCE event and return. */ - addi r3,r1,STACK_FRAME_OVERHEAD - bl machine_check_exception - MACHINE_CHECK_HANDLER_WINDUP - RFI_TO_KERNEL - b . EXC_REAL_BEGIN(data_access, 0x300, 0x80) EXCEPTION_PROLOG_0 PACA_EXGEN From patchwork Wed Jul 10 15:19:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130487 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kP216KyJz9s7T for ; Thu, 11 Jul 2019 01:56:41 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qJf605BQ"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kP2148pJzDqTk for ; Thu, 11 Jul 2019 01:56:41 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::544; helo=mail-pg1-x544.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qJf605BQ"; dkim-atps=neutral Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHQ4855zDqjp for ; Thu, 11 Jul 2019 01:23:14 +1000 (AEST) Received: by mail-pg1-x544.google.com with SMTP id f25so1412221pgv.10 for ; Wed, 10 Jul 2019 08:23:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PCs8eSgWybCHSB1nMZu06bU5YDzW3YpvI3lD71aJLwU=; b=qJf605BQ+JZ+Oe9U4APde5UA6POYq5xwNFd33bVeqlmRoqUcep9+Bd7sx9Kdl47Qc9 DNNIsWbrqJJHNPzKV8rDdScrNKrlOSq9I02fGeupHN7eoUIgwuSs4VhISPd7Fmkv7mmf yVqh9gL4jKlKwmnleC5zYxnb8ovRN8S77i+0jWuMDrrgWmt9okf3NHdNJRsBs6E+8Zv9 EEIY/YggWLaEevTKNv38IJFzX3oBSczp0tmgRTZGHL7HRCLmubkzanL8YREjetTbNeQU nn1Dww3J4+/gs28EJ7e0HL0gDGmFwctCrBmyRaqF6QZMG7cID/zZ9P/OkjYCry7CpWJ+ TOTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PCs8eSgWybCHSB1nMZu06bU5YDzW3YpvI3lD71aJLwU=; b=j2/Z69CQW/yiFwqem/zC6n4hSPd+zng10qdfgYOVOZIPpmDp4GtOGELVfrF9QgjpaC xlXjQ19Hc6cRgTwKSauklbjgvGk3HQhIbl3wwSglps5BF11JcH3aG4pSbI76GUiC/sTV Ja79TruonXpBDSVkgXY54Lg2Yw88nfYKwOkUavfvO+L18yoRblx5Cx/fZaQwZcNUs2uU VSkufshLYttFO7igsyaoSLK2SC1EUyqjuK9N1Id9z0EDI3WzV/txs+JWAgAQqAJshQ1Z W8ycxkarwhvD8JyCBONw79MLsKt0ZV0WUl0HupjNzxgfZlNBRnZqmdejYivLQ0GTUI/0 t+Pg== X-Gm-Message-State: APjAAAXiCYW7NeC2S0cR9ITi88WzolI0xZOCSBeuJ63SSSPiY+4LFlcu 0L0jWcnk+RwFL/czff99Tbc2Qz7K88I= X-Google-Smtp-Source: APXvYqzio0O6Pt0O6fOSAWpIHikkU1inrZjyzw6+9m+thhLvwRIdNaTnHe8hY145SXHJkcCfyIi31A== X-Received: by 2002:a63:5247:: with SMTP id s7mr36289894pgl.29.1562772191986; Wed, 10 Jul 2019 08:23:11 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.09 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:11 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 11/16] powerpc/64s/exception: machine check restructure to reuse common macros Date: Thu, 11 Jul 2019 01:19:45 +1000 Message-Id: <20190710151950.31906-12-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Follow the pattern of sreset and HMI handlers more closely: use EXCEPTION_PROLOG_COMMON_1 rather than open-coding it, and run the handler at the relocated location. This helps later simplification and code sharing. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 71 ++++++++++++++-------------- 1 file changed, 36 insertions(+), 35 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index ac7b5bb614d9..3cc5ee6e4b56 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -934,17 +934,23 @@ EXC_COMMON_BEGIN(system_reset_common) EXC_REAL_BEGIN(machine_check, 0x200, 0x100) EXCEPTION_PROLOG_0 PACA_EXMC - b machine_check_common_early + EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 1, 1, 0 + mfctr r10 /* save ctr, even for !RELOCATABLE */ + BRANCH_TO_C000(r11, machine_check_early_common) + /* + * MSR_RI is not enabled, because PACA_EXMC is being used, so a + * nested machine check corrupts it. machine_check_common enables + * MSR_RI. + */ EXC_REAL_END(machine_check, 0x200, 0x100) EXC_VIRT_NONE(0x4200, 0x100) -TRAMP_REAL_BEGIN(machine_check_common_early) - EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 0, 0, 0 + +EXC_COMMON_BEGIN(machine_check_early_common) + mtctr r10 /* Restore ctr */ + mfspr r11,SPRN_SRR0 + mfspr r12,SPRN_SRR1 + /* - * Register contents: - * R13 = PACA - * R9 = CR - * Original R9 to R13 is saved on PACA_EXMC - * * Switch to mc_emergency stack and handle re-entrancy (we limit * the nested MCE upto level 4 to avoid stack overflow). * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 @@ -965,32 +971,30 @@ TRAMP_REAL_BEGIN(machine_check_common_early) * the machine check is handled then the idle wakeup code is called * to restore state. */ - mr r11,r1 /* Save r1 */ lhz r10,PACA_IN_MCE(r13) cmpwi r10,0 /* Are we in nested machine check */ - bne 0f /* Yes, we are. */ - /* First machine check entry */ - ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ -0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ + cmpwi cr1,r10,MAX_MCE_DEPTH /* Are we at maximum nesting */ addi r10,r10,1 /* increment paca->in_mce */ sth r10,PACA_IN_MCE(r13) + + mr r10,r1 /* Save r1 */ + bne 1f + /* First machine check entry */ + ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ +1: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ /* Limit nested MCE to level 4 to avoid stack overflow */ - cmpwi r10,MAX_MCE_DEPTH - bgt 2f /* Check if we hit limit of 4 */ - std r11,GPR1(r1) /* Save r1 on the stack. */ - std r11,0(r1) /* make stack chain pointer */ - mfspr r11,SPRN_SRR0 /* Save SRR0 */ - std r11,_NIP(r1) - mfspr r11,SPRN_SRR1 /* Save SRR1 */ - std r11,_MSR(r1) - mfspr r11,SPRN_DAR /* Save DAR */ - std r11,_DAR(r1) - mfspr r11,SPRN_DSISR /* Save DSISR */ - std r11,_DSISR(r1) - std r9,_CCR(r1) /* Save CR in stackframe */ + bge cr1,2f /* Check if we hit limit of 4 */ + + EXCEPTION_PROLOG_COMMON_1() /* We don't touch AMR here, we never go to virtual mode */ - /* Save r9 through r13 from EXMC save area to stack frame. */ EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) + EXCEPTION_PROLOG_COMMON_3(0x200) + + ld r3,PACA_EXMC+EX_DAR(r13) + lwz r4,PACA_EXMC+EX_DSISR(r13) + std r3,_DAR(r1) + std r4,_DSISR(r1) + mfmsr r11 /* get MSR value */ BEGIN_FTR_SECTION ori r11,r11,MSR_ME /* turn on ME bit */ @@ -1016,8 +1020,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) #ifdef CONFIG_PPC_PSERIES TRAMP_REAL_BEGIN(machine_check_fwnmi) + /* See comment at machine_check exception, don't turn on RI */ EXCEPTION_PROLOG_0 PACA_EXMC - b machine_check_common_early + EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 1, 1, 0 + mfctr r10 /* save ctr */ + BRANCH_TO_C000(r11, machine_check_early_common) #endif TRAMP_KVM_SKIP(PACA_EXMC, 0x200) @@ -1088,8 +1095,6 @@ EXC_COMMON_BEGIN(machine_check_idle_common) * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. */ EXC_COMMON_BEGIN(machine_check_handle_early) - std r0,GPR0(r1) /* Save r0 */ - EXCEPTION_PROLOG_COMMON_3(0x200) bl save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD bl machine_check_early @@ -1180,14 +1185,10 @@ BEGIN_FTR_SECTION mtspr SPRN_CFAR,r10 END_FTR_SECTION_IFSET(CPU_FTR_CFAR) MACHINE_CHECK_HANDLER_WINDUP + /* See comment at machine_check exception, don't turn on RI */ EXCEPTION_PROLOG_0 PACA_EXMC EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0 - /* - * MSR_RI is not enabled, because PACA_EXMC is being used, so a - * nested machine check corrupts it. machine_check_common enables - * MSR_RI. - */ EXC_COMMON_BEGIN(unrecover_mce) /* Invoke machine_check_exception to print MCE event and panic. */ From patchwork Wed Jul 10 15:19:46 2019 Content-Type: text/plain; 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[14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.12 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:14 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 12/16] powerpc/64s/exception: machine check move tramp code Date: Thu, 11 Jul 2019 01:19:46 +1000 Message-Id: <20190710151950.31906-13-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Following convention, move the tramp code (unrelocated) above the common handlers (relocated). Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 3cc5ee6e4b56..9bb8c89e9e77 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -945,6 +945,17 @@ EXC_REAL_BEGIN(machine_check, 0x200, 0x100) EXC_REAL_END(machine_check, 0x200, 0x100) EXC_VIRT_NONE(0x4200, 0x100) +#ifdef CONFIG_PPC_PSERIES +TRAMP_REAL_BEGIN(machine_check_fwnmi) + /* See comment at machine_check exception, don't turn on RI */ + EXCEPTION_PROLOG_0 PACA_EXMC + EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 1, 1, 0 + mfctr r10 /* save ctr */ + BRANCH_TO_C000(r11, machine_check_early_common) +#endif + +TRAMP_KVM_SKIP(PACA_EXMC, 0x200) + EXC_COMMON_BEGIN(machine_check_early_common) mtctr r10 /* Restore ctr */ mfspr r11,SPRN_SRR0 @@ -1018,17 +1029,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) b 1b b . /* prevent speculative execution */ -#ifdef CONFIG_PPC_PSERIES -TRAMP_REAL_BEGIN(machine_check_fwnmi) - /* See comment at machine_check exception, don't turn on RI */ - EXCEPTION_PROLOG_0 PACA_EXMC - EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 1, 1, 0 - mfctr r10 /* save ctr */ - BRANCH_TO_C000(r11, machine_check_early_common) -#endif - -TRAMP_KVM_SKIP(PACA_EXMC, 0x200) - EXC_COMMON_BEGIN(machine_check_common) /* * Machine check is different because we use a different From patchwork Wed Jul 10 15:19:47 2019 Content-Type: text/plain; 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[14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.15 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:17 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 13/16] powerpc/64s/exception: simplify machine check early path Date: Thu, 11 Jul 2019 01:19:47 +1000 Message-Id: <20190710151950.31906-14-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" machine_check_handle_early_common can reach machine_check_handle_early directly now that it runs at the relocated address, so just branch directly. The rfi sequence is required to enable MSR[ME] but that step is moved into a helper function, making the code easier to follow. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 31 ++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 9bb8c89e9e77..2a17275296d5 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1006,16 +1006,13 @@ EXC_COMMON_BEGIN(machine_check_early_common) std r3,_DAR(r1) std r4,_DSISR(r1) - mfmsr r11 /* get MSR value */ BEGIN_FTR_SECTION - ori r11,r11,MSR_ME /* turn on ME bit */ + bl enable_machine_check END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) - ori r11,r11,MSR_RI /* turn on RI bit */ - LOAD_HANDLER(r12, machine_check_handle_early) -1: mtspr SPRN_SRR0,r12 - mtspr SPRN_SRR1,r11 - RFI_TO_KERNEL - b . /* prevent speculative execution */ + li r10,MSR_RI + mtmsrd r10,1 + b machine_check_handle_early + 2: /* Stack overflow. Stay on emergency stack and panic. * Keep the ME bit off while panic-ing, so that if we hit @@ -1026,7 +1023,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) LOAD_HANDLER(r12, unrecover_mce) li r10,MSR_ME andc r11,r11,r10 /* Turn off MSR_ME */ - b 1b + mtspr SPRN_SRR0,r12 + mtspr SPRN_SRR1,r11 + RFI_TO_KERNEL b . /* prevent speculative execution */ EXC_COMMON_BEGIN(machine_check_common) @@ -2270,6 +2269,20 @@ CLOSE_FIXED_SECTION(virt_trampolines); USE_TEXT_SECTION() +/* MSR[RI] should be clear because this uses SRR[01] */ +enable_machine_check: + mflr r0 + bcl 20,31,$+4 +0: mflr r3 + addi r3,r3,(1f - 0b) + mtspr SPRN_SRR0,r3 + mfmsr r3 + ori r3,r3,MSR_ME + mtspr SPRN_SRR1,r3 + RFI_TO_KERNEL +1: mtlr r0 + blr + /* * Hash table stuff */ From patchwork Wed Jul 10 15:19:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130491 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kPDC6kXjz9s3l for ; Thu, 11 Jul 2019 02:05:31 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="faVomjO9"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kPDB6J6BzDqq3 for ; Thu, 11 Jul 2019 02:05:30 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::62d; helo=mail-pl1-x62d.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="faVomjO9"; dkim-atps=neutral Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHb0y2mzDqCh for ; Thu, 11 Jul 2019 01:23:22 +1000 (AEST) Received: by mail-pl1-x62d.google.com with SMTP id b7so1408212pls.6 for ; Wed, 10 Jul 2019 08:23:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s4SmQ6O7Ul+0V5pEPZadNSvis52cy2Vc0rTotcGREWI=; b=faVomjO9xrOiaN2qhxTVXLmsFpd/0gIt5v1QLI7+TyCUY2dUz0+jy8tMhro4yoDO3P RzN7pyj5KYgSwI9mJrvV8NQ7VXryH6Ci07FdFok6pkl6w5TANxaenyijaSj4TBt/QwUc IlGdlfHIzMP+/vV+VTILBHFT9PTB4y7+pZmKFMr0ZQibUZV+4eqHFsOhGW9QEFoybopH HOCVFj9DEdCwTBsZBsuz/r4sdUfafK7/5wBQs38YasD1E4YxwRVAFatT5IE7vbAB2+pT ktB5Yq1wrYHFE/P7Dq7QkxGD4Ozv2bmvVfL+eBQzVI9PxlHEvJKGgMrjqfkJsaOMzGeu AUjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s4SmQ6O7Ul+0V5pEPZadNSvis52cy2Vc0rTotcGREWI=; b=rG6sz2pcR3mHZ2oXGIfQRgjaSrhHKTajOIimGkO6MBqNqSoG9t62+tOVCGw1rwMJdu baxdDQ4+pvpbYBj5tGnJNAe7EyTei0mfpITqaEFD3MondXjpR6zyCElD5AEmAGW7cUmY B3YEMhOOHNRipEkMHLOQfOoq8hUSEFEB8wqmTqnBo+J0NNiYCi4C09o85dJJ/nhzSHrZ 47n4NTrvVR126OPaDD/LSpElylVXVJbS9qmHwV6L/4IGiitYFy0pyQA5MhRY5ednri+P QkqWH9KyLCiq4cQy9NupGtJJMAUavGr/m6HRgEhieHhByoGsRRwCZSjyYgQwi13NVMLZ vY2w== X-Gm-Message-State: APjAAAUmme3vY2JFJ5+sJ8PeOThDMQ+bnXH3zUyJpyhYm4gvkD/z++9Q sOfjPYpH8+qYXQCC37F82CrrTGSQvhE= X-Google-Smtp-Source: APXvYqw8KPoOnEE3tEq2RwtnLGwV0gg5NIBl3l7x5PUTpLqMR3YcYG+ys2r0lZzuLsK/RhfwDCTYFw== X-Received: by 2002:a17:902:583:: with SMTP id f3mr39354603plf.137.1562772200201; Wed, 10 Jul 2019 08:23:20 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.17 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:19 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 14/16] powerpc/64s/exception: machine check move unrecoverable handling out of line Date: Thu, 11 Jul 2019 01:19:48 +1000 Message-Id: <20190710151950.31906-15-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Similarly to the previous change, all callers of the unrecoverable handler run relocated so can reach it with a direct branch. This makes it easy to move out of line, which makes the "normal" path less cluttered and easier to follow. MSR[ME] manipulation still requires the rfi, so that is moved out of line to its own function. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 87 ++++++++++++++-------------- 1 file changed, 44 insertions(+), 43 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 2a17275296d5..95dd7ff3ef04 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -992,9 +992,9 @@ EXC_COMMON_BEGIN(machine_check_early_common) bne 1f /* First machine check entry */ ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ -1: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ - /* Limit nested MCE to level 4 to avoid stack overflow */ - bge cr1,2f /* Check if we hit limit of 4 */ +1: /* Limit nested MCE to level 4 to avoid stack overflow */ + bgt cr1,unrecoverable_mce /* Check if we hit limit of 4 */ + subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ EXCEPTION_PROLOG_COMMON_1() /* We don't touch AMR here, we never go to virtual mode */ @@ -1013,21 +1013,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) mtmsrd r10,1 b machine_check_handle_early -2: - /* Stack overflow. Stay on emergency stack and panic. - * Keep the ME bit off while panic-ing, so that if we hit - * another machine check we checkstop. - */ - addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ - ld r11,PACAKMSR(r13) - LOAD_HANDLER(r12, unrecover_mce) - li r10,MSR_ME - andc r11,r11,r10 /* Turn off MSR_ME */ - mtspr SPRN_SRR0,r12 - mtspr SPRN_SRR1,r11 - RFI_TO_KERNEL - b . /* prevent speculative execution */ - EXC_COMMON_BEGIN(machine_check_common) /* * Machine check is different because we use a different @@ -1141,32 +1126,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) * If yes, then stay on emergency stack and panic. */ andi. r11,r12,MSR_RI - bne 2f -1: mfspr r11,SPRN_SRR0 - LOAD_HANDLER(r10,unrecover_mce) - mtspr SPRN_SRR0,r10 - ld r10,PACAKMSR(r13) - /* - * We are going down. But there are chances that we might get hit by - * another MCE during panic path and we may run into unstable state - * with no way out. Hence, turn ME bit off while going down, so that - * when another MCE is hit during panic path, system will checkstop - * and hypervisor will get restarted cleanly by SP. - */ - li r3,MSR_ME - andc r10,r10,r3 /* Turn off MSR_ME */ - mtspr SPRN_SRR1,r10 - RFI_TO_KERNEL - b . -2: + beq unrecoverable_mce + /* * Check if we have successfully handled/recovered from error, if not * then stay on emergency stack and panic. */ ld r3,RESULT(r1) /* Load result */ cmpdi r3,0 /* see if we handled MCE successfully */ - - beq 1b /* if !handled then panic */ + beq unrecoverable_mce /* if !handled then panic */ /* * Return from MC interrupt. @@ -1189,17 +1157,35 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR) EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0 -EXC_COMMON_BEGIN(unrecover_mce) +EXC_COMMON_BEGIN(unrecoverable_mce) + /* + * We are going down. But there are chances that we might get hit by + * another MCE during panic path and we may run into unstable state + * with no way out. Hence, turn ME bit off while going down, so that + * when another MCE is hit during panic path, system will checkstop + * and hypervisor will get restarted cleanly by SP. + */ +BEGIN_FTR_SECTION + li r10,0 /* clear MSR_RI */ + mtmsrd r10,1 + bl disable_machine_check +END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) + ld r10,PACAKMSR(r13) + li r3,MSR_ME + andc r10,r10,r3 + mtmsrd r10 + /* Invoke machine_check_exception to print MCE event and panic. */ addi r3,r1,STACK_FRAME_OVERHEAD bl machine_check_exception + /* - * We will not reach here. Even if we did, there is no way out. Call - * unrecoverable_exception and die. + * We will not reach here. Even if we did, there is no way out. + * Call unrecoverable_exception and die. */ -1: addi r3,r1,STACK_FRAME_OVERHEAD + addi r3,r1,STACK_FRAME_OVERHEAD bl unrecoverable_exception - b 1b + b . EXC_REAL_BEGIN(data_access, 0x300, 0x80) @@ -2283,6 +2269,21 @@ enable_machine_check: 1: mtlr r0 blr +/* MSR[RI] should be clear because this uses SRR[01] */ +disable_machine_check: + mflr r0 + bcl 20,31,$+4 +0: mflr r3 + addi r3,r3,(1f - 0b) + mtspr SPRN_SRR0,r3 + mfmsr r3 + li r4,MSR_ME + andc r3,r3,r4 + mtspr SPRN_SRR1,r3 + RFI_TO_KERNEL +1: mtlr r0 + blr + /* * Hash table stuff */ From patchwork Wed Jul 10 15:19:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130492 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kPGt4Mtzz9s3l for ; Thu, 11 Jul 2019 02:07:50 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="i18s4Q66"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kPGt3WtYzDqrW for ; Thu, 11 Jul 2019 02:07:50 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="i18s4Q66"; dkim-atps=neutral Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHc6lxyzDqLY for ; Thu, 11 Jul 2019 01:23:24 +1000 (AEST) Received: by mail-pf1-x441.google.com with SMTP id c73so1248820pfb.13 for ; Wed, 10 Jul 2019 08:23:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f5CDkJVHhGOH438kLGYlAq4B7MBYR/8fF3+pSKCnpUI=; b=i18s4Q66owJAIDbeft9X1RlknK6VRYvbHAx1V3f2MhDjM9ZCRC/enqd/dyEQ6ou68p TU7eL6xs8D+VErgCda4/X+4bybYRo4sp2FERxqXKkfs2D/9AQrrO4HyDIO/UR6FZK1oc Bg5UFC2rGZsY4NQNmVyfU0UxgydInPUQV1UgXCJDZjd7x25UQEqYNBv+tkVqNxH7OR8N 4Iq2c+YHj36pZvMj8o2n5MJfIogopLJ2e/Ums5zod/6qdhWsBBPAhj8+vwbiZK0nxCYM xz0iuYKhQHP5c3egFtQuxtBl8w4Zfu58OxxvZ25TfpYfoWZyz+m0tUbtqwPNxk6HL9rR gwdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f5CDkJVHhGOH438kLGYlAq4B7MBYR/8fF3+pSKCnpUI=; b=ZsO5ma6f08TRxzoMHaEh4vKqYQPUWNnwi1ZjFgkd7WPYQ0rKFizU6huiC/D6Uvg57i 2/phXtyIG+9jW58TWTvLRdTZVJmQ8fhdLRtthlW9SKW60AgHjjObuxJIvgJifnWmQKiS NtgeQxk49VvydE5kXOdvjhj5dbgV7Wxv5qE/kq20t/XFTt56NjKWkvoNBG36H5hXOFOH FKQ3WJ2rZEEMTUBWlqy5Kc/q6wN1quZ9saWsDQnGzMwxDs909NsKFVQHsmiELpe4jJZu gVhnqEsrVeiu7MXeblf5Q0VtgbMCabYrZDtlTVh2Ko7FvD8S2BEO19w2MVTQRAs01Md5 q1+w== X-Gm-Message-State: APjAAAVaiw+B/O2A2p/5aPPWfGp1xd2uy5opw53x6nMYHtZoZb5f/xrC wMiO++kwpF9EKJsR/XMlFq+ePR5yHm8= X-Google-Smtp-Source: APXvYqxMzuadD5PogzArT2670C2guWr0G6+0llWJQU/4GIFb4l4B/smj5s/eSDuI07HREkJwyyXF/w== X-Received: by 2002:a63:1657:: with SMTP id 23mr35450624pgw.98.1562772202891; Wed, 10 Jul 2019 08:23:22 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.20 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:22 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 15/16] powerpc/64s/exception: untangle early machine check handler branch Date: Thu, 11 Jul 2019 01:19:49 +1000 Message-Id: <20190710151950.31906-16-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" machine_check_early_common now branches to machine_check_handle_early which is its only caller. Move interleaving code out of the way, and remove the branch. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 129 +++++++++++++-------------- 1 file changed, 62 insertions(+), 67 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 95dd7ff3ef04..d196558d4243 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -956,6 +956,16 @@ TRAMP_REAL_BEGIN(machine_check_fwnmi) TRAMP_KVM_SKIP(PACA_EXMC, 0x200) +#define MACHINE_CHECK_HANDLER_WINDUP \ + /* Clear MSR_RI before setting SRR0 and SRR1. */\ + li r9,0; \ + mtmsrd r9,1; /* Clear MSR_RI */ \ + /* Decrement paca->in_mce now RI is clear. */ \ + lhz r12,PACA_IN_MCE(r13); \ + subi r12,r12,1; \ + sth r12,PACA_IN_MCE(r13); \ + EXCEPTION_RESTORE_REGS EXC_STD + EXC_COMMON_BEGIN(machine_check_early_common) mtctr r10 /* Restore ctr */ mfspr r11,SPRN_SRR0 @@ -1011,74 +1021,7 @@ BEGIN_FTR_SECTION END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) li r10,MSR_RI mtmsrd r10,1 - b machine_check_handle_early -EXC_COMMON_BEGIN(machine_check_common) - /* - * Machine check is different because we use a different - * save area: PACA_EXMC instead of PACA_EXGEN. - */ - EXCEPTION_COMMON(PACA_EXMC, 0x200) - FINISH_NAP - RECONCILE_IRQ_STATE(r10, r11) - ld r3,PACA_EXMC+EX_DAR(r13) - lwz r4,PACA_EXMC+EX_DSISR(r13) - /* Enable MSR_RI when finished with PACA_EXMC */ - li r10,MSR_RI - mtmsrd r10,1 - std r3,_DAR(r1) - std r4,_DSISR(r1) - bl save_nvgprs - addi r3,r1,STACK_FRAME_OVERHEAD - bl machine_check_exception - b ret_from_except - -#define MACHINE_CHECK_HANDLER_WINDUP \ - /* Clear MSR_RI before setting SRR0 and SRR1. */\ - li r9,0; \ - mtmsrd r9,1; /* Clear MSR_RI */ \ - /* Decrement paca->in_mce now RI is clear. */ \ - lhz r12,PACA_IN_MCE(r13); \ - subi r12,r12,1; \ - sth r12,PACA_IN_MCE(r13); \ - EXCEPTION_RESTORE_REGS EXC_STD - -#ifdef CONFIG_PPC_P7_NAP -/* - * This is an idle wakeup. Low level machine check has already been - * done. Queue the event then call the idle code to do the wake up. - */ -EXC_COMMON_BEGIN(machine_check_idle_common) - bl machine_check_queue_event - - /* - * We have not used any non-volatile GPRs here, and as a rule - * most exception code including machine check does not. - * Therefore PACA_NAPSTATELOST does not need to be set. Idle - * wakeup will restore volatile registers. - * - * Load the original SRR1 into r3 for pnv_powersave_wakeup_mce. - * - * Then decrement MCE nesting after finishing with the stack. - */ - ld r3,_MSR(r1) - ld r4,_LINK(r1) - - lhz r11,PACA_IN_MCE(r13) - subi r11,r11,1 - sth r11,PACA_IN_MCE(r13) - - mtlr r4 - rlwinm r10,r3,47-31,30,31 - cmpwi cr1,r10,2 - bltlr cr1 /* no state loss, return to idle caller */ - b idle_return_gpr_loss -#endif - /* - * Handle machine check early in real mode. We come here with - * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. - */ -EXC_COMMON_BEGIN(machine_check_handle_early) bl save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD bl machine_check_early @@ -1157,6 +1100,58 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR) EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0 EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0 +EXC_COMMON_BEGIN(machine_check_common) + /* + * Machine check is different because we use a different + * save area: PACA_EXMC instead of PACA_EXGEN. + */ + EXCEPTION_COMMON(PACA_EXMC, 0x200) + FINISH_NAP + RECONCILE_IRQ_STATE(r10, r11) + ld r3,PACA_EXMC+EX_DAR(r13) + lwz r4,PACA_EXMC+EX_DSISR(r13) + /* Enable MSR_RI when finished with PACA_EXMC */ + li r10,MSR_RI + mtmsrd r10,1 + std r3,_DAR(r1) + std r4,_DSISR(r1) + bl save_nvgprs + addi r3,r1,STACK_FRAME_OVERHEAD + bl machine_check_exception + b ret_from_except + +#ifdef CONFIG_PPC_P7_NAP +/* + * This is an idle wakeup. Low level machine check has already been + * done. Queue the event then call the idle code to do the wake up. + */ +EXC_COMMON_BEGIN(machine_check_idle_common) + bl machine_check_queue_event + + /* + * We have not used any non-volatile GPRs here, and as a rule + * most exception code including machine check does not. + * Therefore PACA_NAPSTATELOST does not need to be set. Idle + * wakeup will restore volatile registers. + * + * Load the original SRR1 into r3 for pnv_powersave_wakeup_mce. + * + * Then decrement MCE nesting after finishing with the stack. + */ + ld r3,_MSR(r1) + ld r4,_LINK(r1) + + lhz r11,PACA_IN_MCE(r13) + subi r11,r11,1 + sth r11,PACA_IN_MCE(r13) + + mtlr r4 + rlwinm r10,r3,47-31,30,31 + cmpwi cr1,r10,2 + bltlr cr1 /* no state loss, return to idle caller */ + b idle_return_gpr_loss +#endif + EXC_COMMON_BEGIN(unrecoverable_mce) /* * We are going down. But there are chances that we might get hit by From patchwork Wed Jul 10 15:19:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1130493 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45kPKZ3G0hz9sML for ; Thu, 11 Jul 2019 02:10:10 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bXavKvnO"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45kPKX6tLDzDqpv for ; Thu, 11 Jul 2019 02:10:08 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bXavKvnO"; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45kNHg6dfkzDqMp for ; Thu, 11 Jul 2019 01:23:27 +1000 (AEST) Received: by mail-pf1-x444.google.com with SMTP id m30so1261881pff.8 for ; Wed, 10 Jul 2019 08:23:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=h3RpgZg7l5Mw/UErfRA7q9dEnYsBtxC9E2h1H4UC6Os=; b=bXavKvnOq3kZ8sccUhlDtx++tqW6Kty9/8ZS9816p3N8lKm6JzokxP2dpsuNy02PrU GRyybIPTTvqaiFKQna78x6+27yc9A3o1krw3NY5gpiVspdgT1wRHEpZiaFcGIBONbFZ7 PrFxOXw/NcAhyKgsRg7ZaCjofCNjgMTiBbtO0592YQFRjqKyvJ5CJlGwubmPZ3RvOFXD x5oq8l9vk1CPU1hi1qLL4Z2JRe1LW0iXRgt1BDBupCuPz43I4tz7ZPsnsVlqGivQTgvf vbx1gdxQezPX5kpdP5uXjYeYZkFNXcvQkDhuxHclTzVm60Ue46gsdw7pErW2ZMTNHeVo KUog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h3RpgZg7l5Mw/UErfRA7q9dEnYsBtxC9E2h1H4UC6Os=; b=J3ZXtShM8R1v6DjVPXdtfcsS9eo9XFv4IPJEgPvCD52PBaT5hbhD73CdQEROS6XvXG KJgBjoixURArT//H9hyxj8XeP3FAolGP1ZyGewx20YKQct0ipIYmsA63sRtpHyy4SCgM iLsUKQ9/METHTDXkqGKIguCWVUwMDLqX75tW2UwaueBO9kReDfA7wq76/JsH94eVTBi0 kbrZeeAw0o7ftSuSrQ5wVHWvvLx+qO0pKZnHVCKauYjYOvgxQq3K89E33er/e74BHwlb hn2j3ZbOKsnTZOM2Hep3iwaMa6MWBrn0um8uab+ojZ6aa97URYCZIneDcMV5TG1UhTLt FP8w== X-Gm-Message-State: APjAAAVweGSGJGSmDl07ovMLrgY4AgMOS4oukxKgQrUw8bmst+C2Z7fZ sieNZJF4IScJIg5u2II2uwLhBABSpxo= X-Google-Smtp-Source: APXvYqwvP5CeFCMnWmSyRYSnerDOoG8z7l0j1cO1Msz6lUdFrLq1+afZVQyOZLkYDSsUC0oXJONG1w== X-Received: by 2002:a63:ab08:: with SMTP id p8mr38873767pgf.340.1562772205804; Wed, 10 Jul 2019 08:23:25 -0700 (PDT) Received: from bobo.local0.net (14-203-207-157.tpgi.com.au. [14.203.207.157]) by smtp.gmail.com with ESMTPSA id s22sm2699212pfh.107.2019.07.10.08.23.23 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 08:23:25 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 16/16] powerpc/64s/exception: machine check improve labels and comments Date: Thu, 11 Jul 2019 01:19:50 +1000 Message-Id: <20190710151950.31906-17-npiggin@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190710151950.31906-1-npiggin@gmail.com> References: <20190710151950.31906-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahesh Salgaonkar , Nicholas Piggin , Aravinda Prasad Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Short forward and backward branches can be given number labels, but larger significant divergences in code path a more readable if they're given descriptive names. Also adjusts a comment to account for guest delivery. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index d196558d4243..a69f4599e304 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1052,7 +1052,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) */ lbz r11,HSTATE_IN_GUEST(r13) cmpwi r11,0 /* Check if coming from guest */ - bne 9f /* continue if we are. */ + bne mce_deliver /* continue if we are. */ #endif /* @@ -1060,7 +1060,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) * exception handler which will deliver the MC event to this kernel. */ andi. r11,r12,MSR_PR /* See if coming from user. */ - bne 9f /* continue in V mode if we are. */ + bne mce_deliver /* continue in V mode if we are. */ /* * At this point we are coming from kernel context. @@ -1088,8 +1088,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) MACHINE_CHECK_HANDLER_WINDUP RFI_TO_KERNEL -9: - /* Deliver the machine check to host kernel in V mode. */ +mce_deliver: + /* + * This is a host user or guest MCE. Restore all registers, then + * run the "late" handler. For host user, this will run the + * machine_check_exception handler in virtual mode like a normal + * interrupt handler. For guest, this will trigger the KVM test + * and branch to the KVM interrupt similarly to other interrupts. + */ BEGIN_FTR_SECTION ld r10,ORIG_GPR3(r1) mtspr SPRN_CFAR,r10