From patchwork Mon Jul 1 13:35:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125361 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cpvc5vZvz9sPM for ; Tue, 2 Jul 2019 00:01:48 +1000 (AEST) Received: from localhost ([::1]:59106 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwsM-0008Vj-S1 for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:01:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43318) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTQ-0002OA-Lc for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTO-0008Po-P9 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41218) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTM-0008Jz-Tw for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:35:58 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 856883086268; Mon, 1 Jul 2019 13:35:50 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 28512608BA; Mon, 1 Jul 2019 13:35:46 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:22 +0200 Message-Id: <20190701133536.28946-2-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Mon, 01 Jul 2019 13:35:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 01/15] hw/i386/pc: Use e820_get_num_entries() to access e820_entries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Li Qiang , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" To be able to extract the e820* code out of this file (in the next patch), access e820_entries with its correct helper. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e96360b47a..691726b85b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1020,7 +1020,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms) fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, &e820_reserve, sizeof(e820_reserve)); fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, - sizeof(struct e820_entry) * e820_entries); + sizeof(struct e820_entry) * e820_get_num_entries()); fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); /* allocate memory for the NUMA channel: one (64bit) word for the number From patchwork Mon Jul 1 13:35:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125358 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cpnl6cDqz9sPM for ; Mon, 1 Jul 2019 23:56:43 +1000 (AEST) Received: from localhost ([::1]:59068 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwnO-0004lm-Rh for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 09:56:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43382) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTY-0002R3-D9 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTW-00005C-8k for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41684) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTU-0008Pe-9h for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:04 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6F1DE4DB11; Mon, 1 Jul 2019 13:35:54 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 116F0608C2; Mon, 1 Jul 2019 13:35:50 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:23 +0200 Message-Id: <20190701133536.28946-3-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 01 Jul 2019 13:35:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 02/15] hw/i386/pc: Extract e820 memory layout code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Li Qiang , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Suggested-by: Samuel Ortiz Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daudé --- v3: KISS, do not use unsigned, do not add broken documentation --- hw/i386/Makefile.objs | 2 +- hw/i386/e820_memory_layout.c | 59 ++++++++++++++++++++++++++++++++++ hw/i386/e820_memory_layout.h | 42 +++++++++++++++++++++++++ hw/i386/pc.c | 61 +----------------------------------- include/hw/i386/pc.h | 11 ------- target/i386/kvm.c | 1 + 6 files changed, 104 insertions(+), 72 deletions(-) create mode 100644 hw/i386/e820_memory_layout.c create mode 100644 hw/i386/e820_memory_layout.h diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs index 5d9c9efd5f..d3374e0831 100644 --- a/hw/i386/Makefile.objs +++ b/hw/i386/Makefile.objs @@ -1,5 +1,5 @@ obj-$(CONFIG_KVM) += kvm/ -obj-y += multiboot.o +obj-y += e820_memory_layout.o multiboot.o obj-y += pc.o obj-$(CONFIG_I440FX) += pc_piix.o obj-$(CONFIG_Q35) += pc_q35.o diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c new file mode 100644 index 0000000000..bcf9eaf837 --- /dev/null +++ b/hw/i386/e820_memory_layout.c @@ -0,0 +1,59 @@ +/* + * QEMU BIOS e820 routines + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#include "qemu/osdep.h" +#include "qemu/bswap.h" +#include "e820_memory_layout.h" + +static size_t e820_entries; +struct e820_table e820_reserve; +struct e820_entry *e820_table; + +int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) +{ + int index = le32_to_cpu(e820_reserve.count); + struct e820_entry *entry; + + if (type != E820_RAM) { + /* old FW_CFG_E820_TABLE entry -- reservations only */ + if (index >= E820_NR_ENTRIES) { + return -EBUSY; + } + entry = &e820_reserve.entry[index++]; + + entry->address = cpu_to_le64(address); + entry->length = cpu_to_le64(length); + entry->type = cpu_to_le32(type); + + e820_reserve.count = cpu_to_le32(index); + } + + /* new "etc/e820" file -- include ram too */ + e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1); + e820_table[e820_entries].address = cpu_to_le64(address); + e820_table[e820_entries].length = cpu_to_le64(length); + e820_table[e820_entries].type = cpu_to_le32(type); + e820_entries++; + + return e820_entries; +} + +int e820_get_num_entries(void) +{ + return e820_entries; +} + +bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length) +{ + if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) { + *address = le64_to_cpu(e820_table[idx].address); + *length = le64_to_cpu(e820_table[idx].length); + return true; + } + return false; +} diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h new file mode 100644 index 0000000000..2a0ceb8b9c --- /dev/null +++ b/hw/i386/e820_memory_layout.h @@ -0,0 +1,42 @@ +/* + * QEMU BIOS e820 routines + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#ifndef HW_I386_E820_H +#define HW_I386_E820_H + +/* e820 types */ +#define E820_RAM 1 +#define E820_RESERVED 2 +#define E820_ACPI 3 +#define E820_NVS 4 +#define E820_UNUSABLE 5 + +#define E820_NR_ENTRIES 16 + +struct e820_entry { + uint64_t address; + uint64_t length; + uint32_t type; +} QEMU_PACKED __attribute((__aligned__(4))); + +struct e820_table { + uint32_t count; + struct e820_entry entry[E820_NR_ENTRIES]; +} QEMU_PACKED __attribute((__aligned__(4))); + +extern struct e820_table e820_reserve; +extern struct e820_entry *e820_table; + +int e820_add_entry(uint64_t address, uint64_t length, uint32_t type); +int e820_get_num_entries(void); +bool e820_get_entry(int index, uint32_t type, + uint64_t *address, uint64_t *length); + + + +#endif diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 691726b85b..8ac85eadf1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -79,6 +79,7 @@ #include "hw/i386/intel_iommu.h" #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" +#include "e820_memory_layout.h" /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -90,22 +91,6 @@ #define DPRINTF(fmt, ...) #endif -#define E820_NR_ENTRIES 16 - -struct e820_entry { - uint64_t address; - uint64_t length; - uint32_t type; -} QEMU_PACKED __attribute((__aligned__(4))); - -struct e820_table { - uint32_t count; - struct e820_entry entry[E820_NR_ENTRIES]; -} QEMU_PACKED __attribute((__aligned__(4))); - -static struct e820_table e820_reserve; -static struct e820_entry *e820_table; -static unsigned e820_entries; struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; /* Physical Address of PVH entry point read from kernel ELF NOTE */ @@ -869,50 +854,6 @@ static void handle_a20_line_change(void *opaque, int irq, int level) x86_cpu_set_a20(cpu, level); } -int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) -{ - int index = le32_to_cpu(e820_reserve.count); - struct e820_entry *entry; - - if (type != E820_RAM) { - /* old FW_CFG_E820_TABLE entry -- reservations only */ - if (index >= E820_NR_ENTRIES) { - return -EBUSY; - } - entry = &e820_reserve.entry[index++]; - - entry->address = cpu_to_le64(address); - entry->length = cpu_to_le64(length); - entry->type = cpu_to_le32(type); - - e820_reserve.count = cpu_to_le32(index); - } - - /* new "etc/e820" file -- include ram too */ - e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1); - e820_table[e820_entries].address = cpu_to_le64(address); - e820_table[e820_entries].length = cpu_to_le64(length); - e820_table[e820_entries].type = cpu_to_le32(type); - e820_entries++; - - return e820_entries; -} - -int e820_get_num_entries(void) -{ - return e820_entries; -} - -bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length) -{ - if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) { - *address = le64_to_cpu(e820_table[idx].address); - *length = le64_to_cpu(e820_table[idx].length); - return true; - } - return false; -} - /* Enables contiguous-apic-ID mode, for compatibility */ static bool compat_apic_id_mode; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index c54cc54a47..99b0a2e705 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -282,17 +282,6 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); -/* e820 types */ -#define E820_RAM 1 -#define E820_RESERVED 2 -#define E820_ACPI 3 -#define E820_NVS 4 -#define E820_UNUSABLE 5 - -int e820_add_entry(uint64_t, uint64_t, uint32_t); -int e820_get_num_entries(void); -bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); - extern GlobalProperty pc_compat_4_0[]; extern const size_t pc_compat_4_0_len; diff --git a/target/i386/kvm.c b/target/i386/kvm.c index e4b4f5756a..cd4eb1ed0d 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -38,6 +38,7 @@ #include "hw/i386/apic-msidef.h" #include "hw/i386/intel_iommu.h" #include "hw/i386/x86-iommu.h" +#include "hw/i386/e820_memory_layout.h" #include "hw/pci/pci.h" #include "hw/pci/msi.h" From patchwork Mon Jul 1 13:35:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125367 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cq2P3v6gz9sPM for ; Tue, 2 Jul 2019 00:07:41 +1000 (AEST) Received: from localhost ([::1]:59138 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwy3-0003vq-JJ for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:07:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43348) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTU-0002PM-FF for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTS-0008T0-Is for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42692) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTQ-0008Pb-NI for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:01 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 512023082A49; Mon, 1 Jul 2019 13:35:58 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E0531691A3; Mon, 1 Jul 2019 13:35:54 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:24 +0200 Message-Id: <20190701133536.28946-4-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 01 Jul 2019 13:35:58 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 03/15] hw/i386/pc: Use address_space_memory in place X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Li Qiang , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The address_space_memory variable is used once. Use it in place and remove the argument. Suggested-by: Samuel Ortiz Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8ac85eadf1..ea7422b16c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } -static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms) +static FWCfgState *bochs_bios_init(PCMachineState *pcms) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -937,7 +937,8 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms) const CPUArchIdList *cpus; MachineClass *mc = MACHINE_GET_CLASS(pcms); - fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as); + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, + &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: @@ -1762,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = bochs_bios_init(&address_space_memory, pcms); + fw_cfg = bochs_bios_init(pcms); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125362 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cpvc5gfmz9sPF for ; Tue, 2 Jul 2019 00:01:48 +1000 (AEST) Received: from localhost ([::1]:59104 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwsI-0008MA-Ta for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:01:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43404) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTa-0002Rk-9U for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTZ-00009M-6R for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56756) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTY-000069-5E for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:08 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A59EDC1EB210; Mon, 1 Jul 2019 13:36:06 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id CADFC608BA; Mon, 1 Jul 2019 13:35:58 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:25 +0200 Message-Id: <20190701133536.28946-5-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 01 Jul 2019 13:36:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 04/15] hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Li Qiang , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The bochs_bios_init() function is not restricted to the Bochs BIOS and is useful to other BIOS. Since it is not specific to the PC machine, and can be reused by other machines of the X86 architecture, rename it as fw_cfg_arch_create(). Suggested-by: Samuel Ortiz Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daudé --- v2: Rename x86_create_fw_cfg() -> fw_cfg_arch_create() (MST) --- hw/i386/pc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ea7422b16c..5fc52f6a0e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } -static FWCfgState *bochs_bios_init(PCMachineState *pcms) +static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -1509,7 +1509,7 @@ void pc_cpus_init(PCMachineState *pcms) * Limit for the APIC ID value, so that all * CPU APIC IDs are < pcms->apic_id_limit. * - * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init(). + * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create(). */ pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1; possible_cpus = mc->possible_cpu_arch_ids(ms); @@ -1763,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = bochs_bios_init(pcms); + fw_cfg = fw_cfg_arch_create(pcms); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125364 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cpxD2q66z9sPH for ; Tue, 2 Jul 2019 00:03:12 +1000 (AEST) Received: from localhost ([::1]:59120 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwti-0001Xs-CW for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:03:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43422) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTc-0002W2-7N for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTb-0000B1-8R for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:12 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53192) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTb-0000AO-2w for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:11 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 55E9F308794D; Mon, 1 Jul 2019 13:36:10 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 2D56D6085B; Mon, 1 Jul 2019 13:36:06 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:26 +0200 Message-Id: <20190701133536.28946-6-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 01 Jul 2019 13:36:10 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 05/15] hw/i386/pc: Pass the boot_cpus value by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The boot_cpus is used once. Pass it by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 5fc52f6a0e..eaeb7891dd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -929,7 +929,8 @@ static void pc_build_smbios(PCMachineState *pcms) } } -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms) +static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, + uint16_t boot_cpus) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -939,7 +940,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms) fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, &address_space_memory); - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: * @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = fw_cfg_arch_create(pcms); + fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125368 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cq4m4dgtz9sPF for ; Tue, 2 Jul 2019 00:09:44 +1000 (AEST) Received: from localhost ([::1]:59150 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhx02-0005g2-Nm for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:09:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43437) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTf-0002eM-UJ for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTf-0000DI-0I for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41616) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTe-0000D2-Qo for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:14 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0D50B308626C; Mon, 1 Jul 2019 13:36:14 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D536C6085B; Mon, 1 Jul 2019 13:36:10 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:27 +0200 Message-Id: <20190701133536.28946-7-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Mon, 01 Jul 2019 13:36:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 06/15] hw/i386/pc: Pass the apic_id_limit value by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass the apic_id_limit value by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index eaeb7891dd..0248c8dc17 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -930,7 +930,8 @@ static void pc_build_smbios(PCMachineState *pcms) } static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, - uint16_t boot_cpus) + uint16_t boot_cpus, + uint16_t apic_id_limit) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -1764,7 +1765,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus); + fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125375 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cq8p18XQz9sPF for ; Tue, 2 Jul 2019 00:13:14 +1000 (AEST) Received: from localhost ([::1]:59166 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhx3Q-0007Rs-5X for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:13:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43504) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTl-0002o8-23 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTj-0000HJ-Pr for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45616) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTj-0000Gi-Hv for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:19 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C1693307D860; Mon, 1 Jul 2019 13:36:18 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 907906085B; Mon, 1 Jul 2019 13:36:15 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:28 +0200 Message-Id: <20190701133536.28946-8-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Mon, 01 Jul 2019 13:36:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 07/15] hw/i386/pc: Pass the CPUArchIdList array by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass the CPUArchIdList array by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0248c8dc17..1e856704e1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -930,14 +930,13 @@ static void pc_build_smbios(PCMachineState *pcms) } static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, + const CPUArchIdList *cpus, uint16_t boot_cpus, uint16_t apic_id_limit) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; int i; - const CPUArchIdList *cpus; - MachineClass *mc = MACHINE_GET_CLASS(pcms); fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, &address_space_memory); @@ -955,7 +954,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, * So for compatibility reasons with old BIOSes we are stuck with * "etc/max-cpus" actually being apic_id_limit */ - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit); + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, acpi_tables, acpi_tables_len); @@ -971,20 +970,19 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, * of nodes, one word for each VCPU->node and one word for each node to * hold the amount of memory. */ - numa_fw_cfg = g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nodes); + numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes); - cpus = mc->possible_cpu_arch_ids(MACHINE(pcms)); for (i = 0; i < cpus->len; i++) { unsigned int apic_id = cpus->cpus[i].arch_id; - assert(apic_id < pcms->apic_id_limit); + assert(apic_id < apic_id_limit); numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); } for (i = 0; i < nb_numa_nodes; i++) { - numa_fw_cfg[pcms->apic_id_limit + 1 + i] = + numa_fw_cfg[apic_id_limit + 1 + i] = cpu_to_le64(numa_info[i].node_mem); } fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, - (1 + pcms->apic_id_limit + nb_numa_nodes) * + (1 + apic_id_limit + nb_numa_nodes) * sizeof(*numa_fw_cfg)); return fw_cfg; @@ -1765,7 +1763,8 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit); + fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine), + pcms->boot_cpus, pcms->apic_id_limit); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125372 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cq8Z1wfZz9sPV for ; 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Mon, 1 Jul 2019 13:36:26 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 493C96085B; Mon, 1 Jul 2019 13:36:19 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:29 +0200 Message-Id: <20190701133536.28946-9-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Mon, 01 Jul 2019 13:36:26 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We removed the PCMachineState access, we can now let the fw_cfg_init() function to take a generic MachineState object. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1e856704e1..60ee71924a 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, +static FWCfgState *fw_cfg_arch_create(MachineState *ms, const CPUArchIdList *cpus, uint16_t boot_cpus, uint16_t apic_id_limit) @@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *ram_below_4g, *ram_above_4g; FWCfgState *fw_cfg; MachineState *machine = MACHINE(pcms); + MachineClass *mc = MACHINE_GET_CLASS(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); assert(machine->ram_size == pcms->below_4g_mem_size + @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); - fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine), + fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine), pcms->boot_cpus, pcms->apic_id_limit); rom_set_fw(fw_cfg); From patchwork Mon Jul 1 13:35:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125379 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqFv1KQ6z9s4V for ; Tue, 2 Jul 2019 00:17:39 +1000 (AEST) Received: from localhost ([::1]:59200 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhx7h-0002hP-2K for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:17:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43560) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwTw-0003HV-H2 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTv-0000Oa-F3 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35164) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTv-0000Ni-9m for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:31 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8480E81F12; Mon, 1 Jul 2019 13:36:30 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 537BD6085B; Mon, 1 Jul 2019 13:36:27 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:30 +0200 Message-Id: <20190701133536.28946-10-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 01 Jul 2019 13:36:30 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 09/15] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 60ee71924a..2b6502a38c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) } } -static void pc_build_smbios(PCMachineState *pcms) +static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; @@ -901,7 +901,7 @@ static void pc_build_smbios(PCMachineState *pcms) smbios_tables = smbios_get_table_legacy(&smbios_tables_len); if (smbios_tables) { - fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES, + fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, smbios_tables, smbios_tables_len); } @@ -922,9 +922,9 @@ static void pc_build_smbios(PCMachineState *pcms) g_free(mem_array); if (smbios_anchor) { - fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables", + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", smbios_tables, smbios_tables_len); - fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor", + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", smbios_anchor, smbios_anchor_len); } } @@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(pcms); + pc_build_smbios(pcms, pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); From patchwork Mon Jul 1 13:35:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125382 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqMg1zfFz9sPF for ; Tue, 2 Jul 2019 00:22:39 +1000 (AEST) Received: from localhost ([::1]:59230 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhxCX-0006bj-B7 for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:22:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43582) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwU0-0003Om-6H for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwTz-0000Ue-4p for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35226) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwTy-0000Te-Uz for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:35 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 33ED481F25; Mon, 1 Jul 2019 13:36:34 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 057D8608BA; Mon, 1 Jul 2019 13:36:30 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:31 +0200 Message-Id: <20190701133536.28946-11-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 01 Jul 2019 13:36:34 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 10/15] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Let the pc_build_smbios() function take a generic MachineState argument. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2b6502a38c..1195394694 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -887,13 +887,12 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) } } -static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg) +static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; struct smbios_phys_mem_area *mem_array; unsigned i, array_count; - MachineState *ms = MACHINE(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); /* tell smbios about cpuid version and features */ @@ -1590,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(pcms, pcms->fw_cfg); + pc_build_smbios(MACHINE(pcms), pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); From patchwork Mon Jul 1 13:35:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125391 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqRs4bs2z9s4V for ; Tue, 2 Jul 2019 00:26:17 +1000 (AEST) Received: from localhost ([::1]:59286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhxG3-0002LR-NP for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:26:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43605) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwU5-0003Us-N3 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwU3-0000YC-1G for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53338) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwU2-0000XZ-K7 for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:38 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CCE6130842D1; Mon, 1 Jul 2019 13:36:37 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9FE1F6085B; Mon, 1 Jul 2019 13:36:34 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:32 +0200 Message-Id: <20190701133536.28946-12-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Mon, 01 Jul 2019 13:36:37 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 11/15] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now that the pc_build_smbios() function has been refactored to not depend of PC specific types, rename it to a more generic name. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1195394694..ba476fab7e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) } } -static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg) +static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; @@ -1589,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(MACHINE(pcms), pcms->fw_cfg); + fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); From patchwork Mon Jul 1 13:35:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125377 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqBV50Mmz9s00 for ; Tue, 2 Jul 2019 00:14:42 +1000 (AEST) Received: from localhost ([::1]:59178 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhx4q-0000wk-Ob for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:14:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43633) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwUO-0003YN-Pt for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwUM-0000ll-Sf for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33668) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwUL-0000it-IT for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:36:58 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C4813811DC; Mon, 1 Jul 2019 13:36:45 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5193C6085B; Mon, 1 Jul 2019 13:36:38 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:33 +0200 Message-Id: <20190701133536.28946-13-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 01 Jul 2019 13:36:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 12/15] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ba476fab7e..c49617a3f1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1518,7 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms) } } -static void pc_build_feature_control_file(PCMachineState *pcms) +static void pc_build_feature_control_file(PCMachineState *pcms, + FWCfgState *fw_cfg) { MachineState *ms = MACHINE(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); @@ -1544,7 +1545,7 @@ static void pc_build_feature_control_file(PCMachineState *pcms) val = g_malloc(sizeof(*val)); *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); - fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); + fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); } static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) @@ -1590,7 +1591,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(pcms); + pc_build_feature_control_file(pcms, pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } From patchwork Mon Jul 1 13:35:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125383 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqMs6Jgxz9sPF for ; Tue, 2 Jul 2019 00:22:49 +1000 (AEST) Received: from localhost ([::1]:59244 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhxCh-00073Y-U7 for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:22:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43679) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwUS-0003cn-5C for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwUR-0000oH-3m for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46068) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwUQ-0000mp-RQ for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:02 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9CED7307D860; Mon, 1 Jul 2019 13:36:51 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 467D8608BA; Mon, 1 Jul 2019 13:36:46 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:34 +0200 Message-Id: <20190701133536.28946-14-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Mon, 01 Jul 2019 13:37:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 13/15] hw/i386/pc: Let pc_build_feature_control() take a MachineState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Let the pc_build_feature_control_file() function take a generic MachineState argument. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index c49617a3f1..2ab2c637fd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1518,10 +1518,9 @@ void pc_cpus_init(PCMachineState *pcms) } } -static void pc_build_feature_control_file(PCMachineState *pcms, +static void pc_build_feature_control_file(MachineState *ms, FWCfgState *fw_cfg) { - MachineState *ms = MACHINE(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env = &cpu->env; uint32_t unused, ecx, edx; @@ -1591,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(pcms, pcms->fw_cfg); + pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } From patchwork Mon Jul 1 13:35:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125381 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqKd2PqZz9s4V for ; Tue, 2 Jul 2019 00:20:53 +1000 (AEST) Received: from localhost ([::1]:59216 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhxAp-0004dJ-Dx for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:20:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43690) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwUS-0003dV-Dy for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwUR-0000oY-9t for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53640) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwUR-0000ni-3P for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:03 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 484A83087926; Mon, 1 Jul 2019 13:36:57 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1B6976A94D; Mon, 1 Jul 2019 13:36:51 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:35 +0200 Message-Id: <20190701133536.28946-15-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 01 Jul 2019 13:37:02 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 14/15] hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now that the pc_build_feature_control_file() function has been refactored to not depend of PC specific types, rename it to a more generic name. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2ab2c637fd..ea895d0192 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1518,8 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms) } } -static void pc_build_feature_control_file(MachineState *ms, - FWCfgState *fw_cfg) +static void fw_cfg_build_feature_control(MachineState *ms, + FWCfgState *fw_cfg) { X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env = &cpu->env; @@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg); + fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } From patchwork Mon Jul 1 13:35:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1125396 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45cqW5560rz9sPF for ; Tue, 2 Jul 2019 00:29:04 +1000 (AEST) Received: from localhost ([::1]:59314 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhxIj-0006PL-KQ for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2019 10:29:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43762) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwUi-0003wD-Tz for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwUh-0000w0-0C for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53970) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwUe-0000uR-Uy for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:37:18 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B58E830C4F41; Mon, 1 Jul 2019 13:37:09 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BEC2B6085B; Mon, 1 Jul 2019 13:36:57 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:35:36 +0200 Message-Id: <20190701133536.28946-16-philmd@redhat.com> In-Reply-To: <20190701133536.28946-1-philmd@redhat.com> References: <20190701133536.28946-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Mon, 01 Jul 2019 13:37:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 15/15] hw/i386/pc: Extract the x86 generic fw_cfg code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Samuel Ortiz , kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , Rob Bradford , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Extract all the functions that are not PC-machine specific into the (arch-specific) fw_cfg.c file. This will allow other X86-machine to reuse these functions. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++ hw/i386/fw_cfg.h | 8 +++ hw/i386/pc.c | 130 +------------------------------------------- 3 files changed, 146 insertions(+), 129 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 380a819230..b033d99bc4 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -13,8 +13,15 @@ */ #include "qemu/osdep.h" +#include "sysemu/numa.h" +#include "hw/acpi/acpi.h" +#include "hw/firmware/smbios.h" +#include "hw/i386/pc.h" #include "hw/i386/fw_cfg.h" +#include "hw/timer/hpet.h" #include "hw/nvram/fw_cfg.h" +#include "e820_memory_layout.h" +#include "kvm_i386.h" const char *fw_cfg_arch_key_name(uint16_t key) { @@ -36,3 +43,133 @@ const char *fw_cfg_arch_key_name(uint16_t key) } return NULL; } + +FWCfgState *fw_cfg_arch_create(MachineState *ms, + const CPUArchIdList *cpus, + uint16_t boot_cpus, + uint16_t apic_id_limit) +{ + FWCfgState *fw_cfg; + uint64_t *numa_fw_cfg; + int i; + + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, + &address_space_memory); + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); + + /* + * FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: + * + * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for + * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table, + * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface + * for CPU hotplug also uses APIC ID and not "CPU index". + * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs", + * but the "limit to the APIC ID values SeaBIOS may see". + * + * So for compatibility reasons with old BIOSes we are stuck with + * "etc/max-cpus" actually being apic_id_limit + */ + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); + fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, + acpi_tables, acpi_tables_len); + fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); + + fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, + &e820_reserve, sizeof(e820_reserve)); + fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, + sizeof(struct e820_entry) * e820_get_num_entries()); + + fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); + /* + * allocate memory for the NUMA channel: one (64bit) word for the number + * of nodes, one word for each VCPU->node and one word for each node to + * hold the amount of memory. + */ + numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); + numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes); + for (i = 0; i < cpus->len; i++) { + unsigned int apic_id = cpus->cpus[i].arch_id; + assert(apic_id < apic_id_limit); + numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); + } + for (i = 0; i < nb_numa_nodes; i++) { + numa_fw_cfg[apic_id_limit + 1 + i] = + cpu_to_le64(numa_info[i].node_mem); + } + fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, + (1 + apic_id_limit + nb_numa_nodes) * + sizeof(*numa_fw_cfg)); + + return fw_cfg; +} + +void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) +{ + uint8_t *smbios_tables, *smbios_anchor; + size_t smbios_tables_len, smbios_anchor_len; + struct smbios_phys_mem_area *mem_array; + unsigned i, array_count; + X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); + + /* tell smbios about cpuid version and features */ + smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); + + smbios_tables = smbios_get_table_legacy(&smbios_tables_len); + if (smbios_tables) { + fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, + smbios_tables, smbios_tables_len); + } + + /* build the array of physical mem area from e820 table */ + mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries()); + for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) { + uint64_t addr, len; + + if (e820_get_entry(i, E820_RAM, &addr, &len)) { + mem_array[array_count].address = addr; + mem_array[array_count].length = len; + array_count++; + } + } + smbios_get_tables(mem_array, array_count, + &smbios_tables, &smbios_tables_len, + &smbios_anchor, &smbios_anchor_len); + g_free(mem_array); + + if (smbios_anchor) { + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", + smbios_tables, smbios_tables_len); + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", + smbios_anchor, smbios_anchor_len); + } +} + +void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg) +{ + X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); + CPUX86State *env = &cpu->env; + uint32_t unused, ecx, edx; + uint64_t feature_control_bits = 0; + uint64_t *val; + + cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx); + if (ecx & CPUID_EXT_VMX) { + feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; + } + + if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) == + (CPUID_EXT2_MCE | CPUID_EXT2_MCA) && + (env->mcg_cap & MCG_LMCE_P)) { + feature_control_bits |= FEATURE_CONTROL_LMCE; + } + + if (!feature_control_bits) { + return; + } + + val = g_malloc(sizeof(*val)); + *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); + fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); +} diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index 17a4bc32f2..f9047a74e8 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -9,6 +9,7 @@ #ifndef HW_I386_FW_CFG_H #define HW_I386_FW_CFG_H +#include "hw/boards.h" #include "hw/nvram/fw_cfg.h" #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) @@ -17,4 +18,11 @@ #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) +FWCfgState *fw_cfg_arch_create(MachineState *ms, + const CPUArchIdList *cpus, + uint16_t boot_cpus, + uint16_t apic_id_limit); +void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg); +void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); + #endif diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ea895d0192..d00279bf22 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -80,6 +80,7 @@ #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" #include "e820_memory_layout.h" +#include "fw_cfg.h" /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -887,106 +888,6 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) } } -static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) -{ - uint8_t *smbios_tables, *smbios_anchor; - size_t smbios_tables_len, smbios_anchor_len; - struct smbios_phys_mem_area *mem_array; - unsigned i, array_count; - X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - - /* tell smbios about cpuid version and features */ - smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); - - smbios_tables = smbios_get_table_legacy(&smbios_tables_len); - if (smbios_tables) { - fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, - smbios_tables, smbios_tables_len); - } - - /* build the array of physical mem area from e820 table */ - mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries()); - for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) { - uint64_t addr, len; - - if (e820_get_entry(i, E820_RAM, &addr, &len)) { - mem_array[array_count].address = addr; - mem_array[array_count].length = len; - array_count++; - } - } - smbios_get_tables(mem_array, array_count, - &smbios_tables, &smbios_tables_len, - &smbios_anchor, &smbios_anchor_len); - g_free(mem_array); - - if (smbios_anchor) { - fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", - smbios_tables, smbios_tables_len); - fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", - smbios_anchor, smbios_anchor_len); - } -} - -static FWCfgState *fw_cfg_arch_create(MachineState *ms, - const CPUArchIdList *cpus, - uint16_t boot_cpus, - uint16_t apic_id_limit) -{ - FWCfgState *fw_cfg; - uint64_t *numa_fw_cfg; - int i; - - fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, - &address_space_memory); - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); - - /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: - * - * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for - * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table, - * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface - * for CPU hotplug also uses APIC ID and not "CPU index". - * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs", - * but the "limit to the APIC ID values SeaBIOS may see". - * - * So for compatibility reasons with old BIOSes we are stuck with - * "etc/max-cpus" actually being apic_id_limit - */ - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); - fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); - fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, - acpi_tables, acpi_tables_len); - fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); - - fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, - &e820_reserve, sizeof(e820_reserve)); - fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, - sizeof(struct e820_entry) * e820_get_num_entries()); - - fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); - /* allocate memory for the NUMA channel: one (64bit) word for the number - * of nodes, one word for each VCPU->node and one word for each node to - * hold the amount of memory. - */ - numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); - numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes); - for (i = 0; i < cpus->len; i++) { - unsigned int apic_id = cpus->cpus[i].arch_id; - assert(apic_id < apic_id_limit); - numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); - } - for (i = 0; i < nb_numa_nodes; i++) { - numa_fw_cfg[apic_id_limit + 1 + i] = - cpu_to_le64(numa_info[i].node_mem); - } - fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, - (1 + apic_id_limit + nb_numa_nodes) * - sizeof(*numa_fw_cfg)); - - return fw_cfg; -} - static long get_file_size(FILE *f) { long where, size; @@ -1518,35 +1419,6 @@ void pc_cpus_init(PCMachineState *pcms) } } -static void fw_cfg_build_feature_control(MachineState *ms, - FWCfgState *fw_cfg) -{ - X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - CPUX86State *env = &cpu->env; - uint32_t unused, ecx, edx; - uint64_t feature_control_bits = 0; - uint64_t *val; - - cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx); - if (ecx & CPUID_EXT_VMX) { - feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; - } - - if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) == - (CPUID_EXT2_MCE | CPUID_EXT2_MCA) && - (env->mcg_cap & MCG_LMCE_P)) { - feature_control_bits |= FEATURE_CONTROL_LMCE; - } - - if (!feature_control_bits) { - return; - } - - val = g_malloc(sizeof(*val)); - *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); - fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); -} - static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) { if (cpus_count > 0xff) {