From patchwork Mon Jul 1 06:01:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125071 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccHP6GV0z9s00 for ; Mon, 1 Jul 2019 16:03:13 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GCJn2yF7"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45ccHP0MyJzDqTp for ; Mon, 1 Jul 2019 16:03:13 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::544; helo=mail-pg1-x544.google.com; envelope-from=chyishian.jiang@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GCJn2yF7"; dkim-atps=neutral Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45ccGM41RszDqRv for ; Mon, 1 Jul 2019 16:02:19 +1000 (AEST) Received: by mail-pg1-x544.google.com with SMTP id 196so5469400pgc.6 for ; Sun, 30 Jun 2019 23:02:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Q1fiqcHRXGHsbndMK1CPknRYLyXD66HLFL9N25fXOzM=; b=GCJn2yF7OH8nHkCXbTcuG1izIUz7kLSrXrMbgkH24oTKx2fcneIYMV3mTU8NdIjc3O 1z860/xxjRTkYvI4oe5WP4AS9Xhaa90LUVu+ljKK2/TtZKZdE/+8+nQczoTz+cc63gHm 55Q8aU0QDfbWNWSQZACrvj838su6RS1tunCJwl4dJEpS0mhGrUmZzGpO4Nnsb8derF72 QYXOfGruBcFreiPNLN4BRViYwz9MfT5kyWQJw6d3lpJt0bj+HD+MMdrxabBoT5U3O3Az 4QWKz08HlRq93tOOAvJjjpxD8hnmewYtseJpxuZWl2bBnAMle635fj5voEaprQeztJMi FA0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Q1fiqcHRXGHsbndMK1CPknRYLyXD66HLFL9N25fXOzM=; b=f7zBUNXoEX8iQJ7s34YcedDNmg5pv5B7aGNbTNercSNsjvOPGj+msmtNrLnFYcgBmm e0Q0es/PqvcxFUjDN4fCl6jA0BttgPPku3oNeS8f3y80+R9UABhUaCasZL2wZNhAEPIo WI4QbF53MwIJJTv2NluYuPhPd3uZjrUSTq93JGvtRpb0R3K0wlcUvSLA5BNPBclIiHVY lL/218FHsNpXmnEIG22vy1k4LUY+1oajQUz7tl3AldVYovTPS24+cyLIkQQQw2IY1Z1w HX1v1TmgyVjMqDjJdXQtM6a4Z9EsvJaLxXqtn/rTA9Nl7A8oFZ/Y0yvch60ziDznsSAV yYCg== X-Gm-Message-State: APjAAAWkpwB5/Uj3iVj7U0xExxfir2QQgDfNWS73EAje/+q26H8h5ffH Cfg0L5LU7SnOJm5+dOy+0cY= X-Google-Smtp-Source: APXvYqxpZ7Zn8cuKUbReJe2YG88St4S5QdO6Ne5TTIB1trrRhPUtMsSrrRd7bFuVytnPC7asA3WCmQ== X-Received: by 2002:a17:90a:e397:: with SMTP id b23mr14769238pjz.117.1561960935521; Sun, 30 Jun 2019 23:02:15 -0700 (PDT) Received: from localhost.localdomain (220-135-135-179.HINET-IP.hinet.net. [220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:14 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 1/6] ARM: dts: nuvoton: Add Nuvoton RunBMC DeviceTree Date: Mon, 1 Jul 2019 14:01:32 +0800 Message-Id: <20190701060137.22116-1-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang Initial Nuvoton RunBMC Module which use NPCM750 SoC. Including features: 1. image partitions 2. lpc and kcs 3. usb 4. serial port 5. spi 6. fiu 7. watchdog Testeed: Build Qunata runbmc-nuvoton image and load on RunBMC-nuvoton module Signed-off-by: Samuel Jiang Signed-off-by: Samuel Jiang --- arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 292 +++++++++++++++++++ 1 file changed, 292 insertions(+) create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts new file mode 100644 index 000000000000..eec815d2a638 --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2019 Nuvoton Technology kwliu@nuvoton.com +// Copyright (c) 2019 Quanta Computer Inc. Samuel.Jiang@quantatw.com + +/dts-v1/; +#include "nuvoton-npcm750.dtsi" + +/ { + model = "Nuvoton npcm750 RunBMC Module"; + compatible = "nuvoton,npcm750"; + + aliases { + ethernet0 = &emc0; + ethernet1 = &gmac0; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + udc0 = &udc0; + udc1 = &udc1; + udc2 = &udc2; + udc3 = &udc3; + udc4 = &udc4; + udc5 = &udc5; + udc6 = &udc6; + udc7 = &udc7; + udc8 = &udc8; + udc9 = &udc9; + emmc0 = &sdhci0; + spi0 = &spi0; + spi1 = &spi1; + fiu0 = &fiu0; + fiu1 = &fiu3; + }; + + chosen { + stdout-path = &serial3; + }; + + memory { + reg = <0 0x40000000>; + }; + + ahb { + gmac0: eth@f0802000 { + phy-mode = "rgmii-id"; + snps,eee-force-disable; + status = "okay"; + }; + + emc0: eth@f0825000 { + phy-mode = "rmii"; + use-ncsi; + status = "okay"; + }; + + ehci1: usb@f0806000 { + status = "okay"; + }; + + ohci1: ohci@f0807000 { + status = "okay"; + }; + + udc0:udc@f0830000 { + status = "okay"; + }; + + udc1:udc@f0831000 { + status = "okay"; + }; + + udc2:udc@f0832000 { + status = "okay"; + }; + + udc3:udc@f0833000 { + status = "okay"; + }; + + udc4:udc@f0834000 { + status = "okay"; + }; + + udc5:udc@f0835000 { + status = "okay"; + }; + + udc6:udc@f0836000 { + status = "okay"; + }; + + udc7:udc@f0837000 { + status = "okay"; + }; + + udc8:udc@f0838000 { + status = "okay"; + }; + + udc9:udc@f0839000 { + status = "okay"; + }; + + aes:aes@f0858000 { + status = "okay"; + }; + + sha:sha@f085a000 { + status = "okay"; + }; + + fiu0: fiu@fb000000 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0cs1_pins>; + status = "okay"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-rx-bus-width = <2>; + partitions@80000000 { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + bmc@0{ + label = "bmc"; + reg = <0x000000 0x4000000>; + }; + u-boot@0 { + label = "u-boot"; + read-only; + reg = <0x0000000 0x80000>; + }; + u-boot-env@100000 { + label = "u-boot-env"; + reg = <0x00100000 0x40000>; + }; + kernel@200000 { + label = "kernel"; + reg = <0x0200000 0x600000>; + }; + rofs@800000 { + label = "rofs"; + reg = <0x0800000 0x1500000>; + }; + rwfs@1c00000 { + label = "rwfs"; + reg = <0x1c00000 0x300000>; + }; + }; + }; + spi-nor@1 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <1>; + npcm,fiu-rx-bus-width = <2>; + partitions@88000000 { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + spare1@0 { + label = "spi0-cs1-spare1"; + reg = <0x0 0x800000>; + }; + spare2@800000 { + label = "spi0-cs1-spare2"; + reg = <0x800000 0x0>; + }; + }; + }; + }; + + fiu3: fiu@c0000000 { + pinctrl-0 = <&spi3_pins>; + status = "okay"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-rx-bus-width = <2>; + partitions@A0000000 { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + system1@0 { + label = "spi3-system1"; + reg = <0x0 0x800000>; + }; + system2@800000 { + label = "spi3-system2"; + reg = <0x800000 0x0>; + }; + }; + }; + }; + + sdhci0: sdhci@f0842000 { + status = "okay"; + }; + + pcimbox: pcimbox@f0848000 { + status = "okay"; + }; + + vcd: vcd@f0810000 { + status = "okay"; + }; + + ece: ece@f0820000 { + status = "okay"; + }; + + apb { + + watchdog1: watchdog@901C { + status = "okay"; + }; + + rng: rng@b000 { + status = "okay"; + }; + + serial0: serial@1000 { + status = "okay"; + }; + + serial1: serial@2000 { + status = "okay"; + }; + + serial2: serial@3000 { + status = "okay"; + }; + + serial3: serial@4000 { + status = "okay"; + }; + + adc: adc@c000 { + status = "okay"; + }; + + otp:otp@189000 { + status = "okay"; + }; + + lpc_kcs: lpc_kcs@7000 { + kcs1: kcs1@0 { + status = "okay"; + }; + + kcs2: kcs2@0 { + status = "okay"; + }; + + kcs3: kcs3@0 { + status = "okay"; + }; + }; + + lpc_host: lpc_host@7000 { + lpc_bpc: lpc_bpc@40 { + monitor-ports = <0x80>; + status = "okay"; + }; + }; + + spi0: spi@200000 { + cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + spi1: spi@201000 { + status = "okay"; + }; + }; + }; +}; + +&gcr { + serial_port_mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + + mux-reg-masks = <0x38 0x07>; + idle-states = <6>; + }; +}; From patchwork Mon Jul 1 06:01:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125072 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccJL0khRz9s00 for ; Mon, 1 Jul 2019 16:04:02 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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[220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:27 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add fan and led functions Date: Mon, 1 Jul 2019 14:01:33 +0800 Message-Id: <20190701060137.22116-2-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190701060137.22116-1-chyishian.jiang@gmail.com> References: <20190701060137.22116-1-chyishian.jiang@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang Update nuvoton-npcm750-runbmc dts fan and led functions Signed-off-by: Samuel Jiang --- arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 64 ++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts index eec815d2a638..bcd7f1063399 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -269,6 +269,58 @@ }; }; + pwm_fan:pwm-fan-controller@103000 { + pinctrl-names = "default"; + pinctrl-0 = < &pwm0_pins &pwm1_pins + &fanin0_pins &fanin1_pins + &fanin2_pins &fanin3_pins + &fanin4_pins &fanin5_pins + &fanin6_pins &fanin7_pins + &fanin8_pins &fanin9_pins + &fanin10_pins &fanin11_pins>; + status = "okay"; + fan@0 { + reg = <0x00>; + fan-tach-ch = /bits/ 8 <0x00 0x01>; + cooling-levels = <127 255>; + }; + fan@1 { + reg = <0x01>; + fan-tach-ch = /bits/ 8 <0x02 0x03>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@2 { + reg = <0x02>; + fan-tach-ch = /bits/ 8 <0x04 0x05>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@3 { + reg = <0x03>; + fan-tach-ch = /bits/ 8 <0x06 0x07>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@4 { + reg = <0x04>; + fan-tach-ch = /bits/ 8 <0x08 0x09>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@5 { + reg = <0x05>; + fan-tach-ch = /bits/ 8 <0x0A 0x0B>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@6 { + reg = <0x06>; + fan-tach-ch = /bits/ 8 <0x0C 0x0D>; + cooling-levels = /bits/ 8 <127 255>; + }; + fan@7 { + reg = <0x07>; + fan-tach-ch = /bits/ 8 <0x0E 0x0F>; + cooling-levels = /bits/ 8 <127 255>; + }; + }; + spi0: spi@200000 { cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; status = "okay"; @@ -279,6 +331,18 @@ }; }; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio3 13 GPIO_ACTIVE_LOW>; + + led { + label = "led-green-arm"; + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; }; &gcr { From patchwork Mon Jul 1 06:01:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccKB0y3fz9s00 for ; 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[220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:29 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 3/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c nodes Date: Mon, 1 Jul 2019 14:01:34 +0800 Message-Id: <20190701060137.22116-3-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190701060137.22116-1-chyishian.jiang@gmail.com> References: <20190701060137.22116-1-chyishian.jiang@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang update nuvoton-npcm750-runbmc dts i2c nodes which includeing: 1. ADC 2. EEPROM 3. i2c-switch 4. temperature sensor 5. ADM Signed-off-by: Samuel Jiang --- arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 232 +++++++++++++++++++ 1 file changed, 232 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts index bcd7f1063399..b7d3b4d83f0d 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -27,6 +27,20 @@ udc8 = &udc8; udc9 = &udc9; emmc0 = &sdhci0; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + i2c9 = &i2c9; + i2c10 = &i2c10; + i2c11 = &i2c11; + i2c12 = &i2c12; + i2c13 = &i2c13; spi0 = &spi0; spi1 = &spi1; fiu0 = &fiu0; @@ -269,6 +283,224 @@ }; }; + i2c0: i2c@80000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "disabled"; + }; + + i2c1: i2c@81000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + i2c-switch@70 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + i2c-mux-idle-disconnect; + + i2c_slot1a: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_slot1b: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_slot2a: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_slot2b: i2c-bus@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + i2c_slot3: i2c-bus@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + i2c_slot4: i2c-bus@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + i2c_slot5: i2c-bus@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + }; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c_m2_s1: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_m2_s2: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + i2c_m2_s3: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_m2_s4: i2c-bus@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + }; + + i2c2: i2c@82000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + tmp421@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + }; + + i2c3: i2c@83000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c4: i2c@84000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + }; + }; + + i2c5: i2c@85000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c6: i2c@86000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c7: i2c@87000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + tmp421@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + + adc128d818@1d { + compatible = "ti,adc128d818"; + reg = <0x1d>; + ti,mode = <1>; + }; + }; + + i2c8: i2c@88000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + adm1278@11 { + compatible = "adm1278"; + reg = <0x11>; + Rsense = <500>; + }; + + adm1278@12 { + compatible = "adm1278"; + reg = <0x12>; + Rsense = <500>; + }; + }; + + i2c9: i2c@89000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c10: i2c@8a000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c11: i2c@8b000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c12: i2c@8c000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + }; + + i2c13: i2c@8d000 { + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <100000>; + status = "okay"; + tmp75@4a { + compatible = "ti,tmp75"; + reg = <0x4a>; + status = "okay"; + }; + m24128_fru@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + pagesize = <64>; + status = "okay"; + }; + }; + pwm_fan:pwm-fan-controller@103000 { pinctrl-names = "default"; pinctrl-0 = < &pwm0_pins &pwm1_pins From patchwork Mon Jul 1 06:01:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125074 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccL423ZLz9s00 for ; Mon, 1 Jul 2019 16:05:32 +1000 (AEST) Authentication-Results: ozlabs.org; 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[220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:31 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 4/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c IOExpand nodes Date: Mon, 1 Jul 2019 14:01:35 +0800 Message-Id: <20190701060137.22116-4-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190701060137.22116-1-chyishian.jiang@gmail.com> References: <20190701060137.22116-1-chyishian.jiang@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang update nuvoton-npcm750-runbmc i2c nodes which define gpios outside RunBMC module Signed-off-by: Samuel Jiang --- arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 404 +++++++++++++++++++ 1 file changed, 404 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts index b7d3b4d83f0d..71501ccbef18 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -577,6 +577,410 @@ }; }; +/* external io expander */ + +&i2c10 { + gpio: pca9555@4e { + compatible = "nxp,pca9555"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c11 { + pca9539_g1a: pca9539-g1a@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; + G1A_P0_0 { + gpio-hog; + gpios = <0 0>; + output-high; + line-name = "TPM_BMC_ALERT_N"; + }; + G1A_P0_1 { + gpio-hog; + gpios = <1 0>; + input; + line-name = "FM_BIOS_TOP_SWAP"; + }; + G1A_P0_2 { + gpio-hog; + gpios = <2 0>; + input; + line-name = "FM_BIOS_PREFRB2_GOOD"; + }; + G1A_P0_3 { + gpio-hog; + gpios = <3 0>; + input; + line-name = "BMC_SATAXPCIE_0TO3_SEL"; + }; + G1A_P0_4 { + gpio-hog; + gpios = <4 0>; + input; + line-name = "BMC_SATAXPCIE_4TO7_SEL"; + }; + G1A_P0_5 { + gpio-hog; + gpios = <5 0>; + output-low; + line-name = "FM_UV_ADR_TRIGGER_EN_N"; + }; + G1A_P0_6 { + gpio-hog; + gpios = <6 0>; + input; + line-name = "RM_THROTTLE_EN_N"; + }; + G1A_P1_0 { + gpio-hog; + gpios = <8 0>; + input; + line-name = "FM_BMC_TPM_PRES_N"; + }; + G1A_P1_1 { + gpio-hog; + gpios = <9 0>; + input; + line-name = "FM_CPU0_SKTOCC_LVT3_N"; + }; + G1A_P1_2 { + gpio-hog; + gpios = <10 0>; + input; + line-name = "FM_CPU1_SKTOCC_LVT3_N"; + }; + G1A_P1_3 { + gpio-hog; + gpios = <11 0>; + input; + line-name = "PSU1_ALERT_N"; + }; + G1A_P1_4 { + gpio-hog; + gpios = <12 0>; + input; + line-name = "PSU2_ALERT_N"; + }; + G1A_P1_5 { + gpio-hog; + gpios = <13 0>; + input; + line-name = "H_CPU0_FAST_WAKE_LVT3_N"; + }; + G1A_P1_6 { + gpio-hog; + gpios = <14 0>; + output-high; + line-name = "I2C_MUX1_RESET_N"; + }; + G1A_P1_7 { + gpio-hog; + gpios = <15 0>; + input; + line-name = "FM_CPU_CATERR_LVT3_N"; + }; + }; + pca9539_g1b: pca9539-g1b@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + G1B_P0_0 { + gpio-hog; + gpios = <0 0>; + input; + line-name = "PVDDQ_ABC_PINALERT_N"; + }; + G1B_P0_1 { + gpio-hog; + gpios = <1 0>; + input; + line-name = "PVDDQ_DEF_PINALERT_N"; + }; + G1B_P0_2 { + gpio-hog; + gpios = <2 0>; + input; + line-name = "PVDDQ_GHJ_PINALERT_N"; + }; + G1B_P0_3 { + gpio-hog; + gpios = <3 0>; + input; + line-name = "PVDDQ_KLM_PINALERT_N"; + }; + G1B_P0_5 { + gpio-hog; + gpios = <5 0>; + input; + line-name = "FM_BOARD_REV_ID0"; + }; + G1B_P0_6 { + gpio-hog; + gpios = <6 0>; + input; + line-name = "FM_BOARD_REV_ID1"; + }; + G1B_P0_7 { + gpio-hog; + gpios = <7 0>; + input; + line-name = "FM_BOARD_REV_ID2"; + }; + G1B_P1_0 { + gpio-hog; + gpios = <8 0>; + input; + line-name = "FM_OC_DETECT_EN_N"; + }; + G1B_P1_1 { + gpio-hog; + gpios = <9 0>; + input; + line-name = "FM_FLASH_DESC_OVERRIDE"; + }; + G1B_P1_2 { + gpio-hog; + gpios = <10 0>; + output-low; + line-name = "FP_PWR_ID_LED_N"; + }; + G1B_P1_3 { + gpio-hog; + gpios = <11 0>; + output-low; + line-name = "BMC_LED_PWR_GRN"; + }; + G1B_P1_4 { + gpio-hog; + gpios = <12 0>; + output-low; + line-name = "BMC_LED_PWR_AMBER"; + }; + G1B_P1_5 { + gpio-hog; + gpios = <13 0>; + output-high; + line-name = "FM_BMC_FAULT_LED_N"; + }; + G1B_P1_6 { + gpio-hog; + gpios = <14 0>; + output-high; + line-name = "FM_CPLD_BMC_PWRDN_N"; + }; + G1B_P1_7 { + gpio-hog; + gpios = <15 0>; + output-high; + line-name = "BMC_LED_CATERR_N"; + }; + }; +}; + +&i2c12 { + pca9539_g2a: pca9539-g2a@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; + G2A_P0_0 { + gpio-hog; + gpios = <0 0>; + output-high; + line-name = "BMC_PON_RST_REQ_N"; + }; + G2A_P0_1 { + gpio-hog; + gpios = <1 0>; + output-high; + line-name = "BMC_RST_IND_REQ_N"; + }; + G2A_P0_2 { + gpio-hog; + gpios = <2 0>; + input; + line-name = "RST_BMC_RTCRST"; + }; + G2A_P0_3 { + gpio-hog; + gpios = <3 0>; + output-high; + line-name = "FM_BMC_PWRBTN_OUT_N"; + }; + G2A_P0_4 { + gpio-hog; + gpios = <4 0>; + output-high; + line-name = "RST_BMC_SYSRST_BTN_OUT_N"; + }; + G2A_P0_5 { + gpio-hog; + gpios = <5 0>; + output-high; + line-name = "FM_BATTERY_SENSE_EN_N"; + }; + G2A_P0_6 { + gpio-hog; + gpios = <6 0>; + output-high; + line-name = "FM_BMC_READY_N"; + }; + G2A_P0_7 { + gpio-hog; + gpios = <7 0>; + input; + line-name = "IRQ_BMC_PCH_SMI_LPC_N"; + }; + G2A_P1_0 { + gpio-hog; + gpios = <8 0>; + input; + line-name = "FM_SLOT4_CFG0"; + }; + G2A_P1_1 { + gpio-hog; + gpios = <9 0>; + input; + line-name = "FM_SLOT4_CFG1"; + }; + G2A_P1_2 { + gpio-hog; + gpios = <10 0>; + input; + line-name = "FM_NVDIMM_EVENT_N"; + }; + G2A_P1_3 { + gpio-hog; + gpios = <11 0>; + input; + line-name = "PSU1_BLADE_EN_N"; + }; + G2A_P1_4 { + gpio-hog; + gpios = <12 0>; + input; + line-name = "BMC_PCH_FNM"; + }; + G2A_P1_5 { + gpio-hog; + gpios = <13 0>; + input; + line-name = "FM_SOL_UART_CH_SEL"; + }; + G2A_P1_6 { + gpio-hog; + gpios = <14 0>; + input; + line-name = "FM_BIOS_POST_CMPLT_N"; + }; + }; + + pca9539_g2b: pca9539-g2b@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + G2B_P0_0 { + gpio-hog; + gpios = <0 0>; + input; + line-name = "FM_CPU_MSMI_LVT3_N"; + }; + G2B_P0_1 { + gpio-hog; + gpios = <1 0>; + input; + line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS"; + }; + G2B_P0_2 { + gpio-hog; + gpios = <2 0>; + input; + line-name = "FM_CPU1_DISABLE_BMC_N"; + }; + G2B_P0_3 { + gpio-hog; + gpios = <3 0>; + output-low; + line-name = "BMC_JTAG_SELECT"; + }; + G2B_P0_4 { + gpio-hog; + gpios = <4 0>; + output-low; + line-name = "PECI_MUX_SELECT"; + }; + G2B_P0_5 { + gpio-hog; + gpios = <5 0>; + output-high; + line-name = "I2C_MUX2_RESET_N"; + }; + G2B_P0_6 { + gpio-hog; + gpios = <6 0>; + input; + line-name = "FM_BMC_CPLD_PSU2_ON"; + }; + G2B_P0_7 { + gpio-hog; + gpios = <7 0>; + output-high; + line-name = "PSU2_ALERT_EN_N"; + }; + G2B_P1_0 { + gpio-hog; + gpios = <8 0>; + output-high; + line-name = "FM_CPU_BMC_INIT"; + }; + G2B_P1_1 { + gpio-hog; + gpios = <9 0>; + output-high; + line-name = "IRQ_BMC_PCH_SCI_LPC_N"; + }; + G2B_P1_2 { + gpio-hog; + gpios = <10 0>; + output-low; + line-name = "PMB_ALERT_EN_N"; + }; + G2B_P1_3 { + gpio-hog; + gpios = <11 0>; + output-high; + line-name = "FM_FAST_PROCHOT_EN_N"; + }; + G2B_P1_4 { + gpio-hog; + gpios = <12 0>; + output-high; + line-name = "BMC_NVDIMM_PRSNT_N"; + }; + G2B_P1_5 { + gpio-hog; + gpios = <13 0>; + output-low; + line-name = "FM_BACKUP_BIOS_SEL_H_BMC"; + }; + G2B_P1_6 { + gpio-hog; + gpios = <14 0>; + output-high; + line-name = "FM_PWRBRK_N"; + }; + }; +}; + &gcr { serial_port_mux: mux-controller { compatible = "mmio-mux"; From patchwork Mon Jul 1 06:01:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125075 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccM05fK0z9s00 for ; Mon, 1 Jul 2019 16:06:20 +1000 (AEST) Authentication-Results: ozlabs.org; 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[220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:33 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 5/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: gpios which inside module Date: Mon, 1 Jul 2019 14:01:36 +0800 Message-Id: <20190701060137.22116-5-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190701060137.22116-1-chyishian.jiang@gmail.com> References: <20190701060137.22116-1-chyishian.jiang@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang add nuvoton-npcm750-runbmc-gpio-dtsi which include runbmc gpios update nuvoton-npcm750-runbmc gpios which execute inside module Signed-off-by: Samuel Jiang --- .../boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi | 157 ++++++++++++++++++ arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 37 +++++ 2 files changed, 194 insertions(+) create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi new file mode 100644 index 000000000000..f2f575d099ab --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2019 Quanta Computer Inc. Samuel.Jiang@quantatw.com + +/ { + pinctrl: pinctrl@f0800000 { + gpio0ol_pins: gpio0ol-pins { + pins = "GPIO0/IOX1DI"; + bias-disable; + output-low; + }; + gpio1ol_pins: gpio1ol-pins { + pins = "GPIO1/IOX1LD"; + bias-disable; + output-low; + }; + gpio2ol_pins: gpio2ol-pins { + pins = "GPIO2/IOX1CK"; + bias-disable; + output-low; + }; + gpio3ol_pins: gpio3ol-pins { + pins = "GPIO3/IOX1D0"; + bias-disable; + output-low; + }; + gpio8o_pins: gpio8o-pins { + pins = "GPIO8/LKGPO1"; + bias-disable; + output-high; + }; + gpio9ol_pins: gpio9ol-pins { + pins = "GPIO9/LKGPO2"; + bias-disable; + output-low; + }; + gpio12ol_pins: gpio12ol-pins { + pins = "GPIO12/GSPICK/SMB5BSCL"; + bias-disable; + output-low; + }; + gpio13ol_pins: gpio13ol-pins { + pins = "GPIO13/GSPIDO/SMB5BSDA"; + bias-disable; + output-low; + }; + gpio14ol_pins: gpio14ol-pins { + pins = "GPIO14/GSPIDI/SMB5CSCL"; + bias-disable; + output-low; + }; + gpio15ol_pins: gpio15ol-pins { + pins = "GPIO15/GSPICS/SMB5CSDA"; + bias-disable; + output-low; + }; + gpio37ol_pins: gpio37ol-pins { + pins = "GPIO37/SMB3CSDA"; + bias-disable; + output-low; + }; + gpio38_pins: gpio38-pins { + pins = "GPIO38/SMB3CSCL"; + bias-disable; + input-enable; + }; + gpio39_pins: gpio39-pins { + pins = "GPIO39/SMB3BSDA"; + bias-disable; + input-enable; + }; + gpio94ol_pins: gpio94ol-pins { + pins = "GPIO94/nKBRST/SMB5DSDA"; + bias-disable; + output-low; + }; + gpio108ol_pins: gpio108ol-pins { + pins = "GPIO108/RG1MDC"; + bias-disable; + output-low; + }; + gpio109ol_pins: gpio109ol-pins { + pins = "GPIO109/RG1MDIO"; + bias-disable; + output-low; + }; + gpio110ol_pins: gpio110ol-pins { + pins = "GPIO110/RG2TXD0/DDRV0"; + bias-disable; + output-low; + }; + gpio111ol_pins: gpio111ol-pins { + pins = "GPIO111/RG2TXD1/DDRV1"; + bias-disable; + output-low; + }; + gpio112ol_pins: gpio112ol-pins { + pins = "GPIO112/RG2TXD2/DDRV2"; + bias-disable; + output-low; + }; + gpio113ol_pins: gpio113ol-pins { + pins = "GPIO113/RG2TXD3/DDRV3"; + bias-disable; + output-low; + }; + gpio208_pins: gpio208-pins { + pins = "GPIO208/RG2TXC/DVCK"; + bias-disable; + input-enable; + }; + gpio209ol_pins: gpio209ol-pins { + pins = "GPIO209/RG2TXCTL/DDRV4"; + bias-disable; + output-low; + }; + gpio210ol_pins: gpio210ol-pins { + pins = "GPIO210/RG2RXD0/DDRV5"; + bias-disable; + output-low; + }; + gpio211ol_pins: gpio211ol-pins { + pins = "GPIO211/RG2RXD1/DDRV6"; + bias-disable; + output-low; + }; + gpio212ol_pins: gpio212ol-pins { + pins = "GPIO212/RG2RXD2/DDRV7"; + bias-disable; + output-low; + }; + gpio213ol_pins: gpio213ol-pins { + pins = "GPIO213/RG2RXD3/DDRV8"; + bias-disable; + output-low; + }; + gpio214ol_pins: gpio214ol-pins { + pins = "GPIO214/RG2RXC/DDRV9"; + bias-disable; + output-low; + }; + gpio215ol_pins: gpio215ol-pins { + pins = "GPIO215/RG2RXCTL/DDRV10"; + bias-disable; + output-low; + }; + gpio216ol_pins: gpio216ol-pins { + pins = "GPIO216/RG2MDC/DDRV11"; + bias-disable; + output-low; + }; + gpio217ol_pins: gpio217ol-pins { + pins = "GPIO217/RG2MDIO/DVHSYNC"; + bias-disable; + output-low; + }; + }; +}; diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts index 71501ccbef18..f39de2822f4c 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "nuvoton-npcm750.dtsi" +#include "nuvoton-npcm750-runbmc-gpio.dtsi" / { model = "Nuvoton npcm750 RunBMC Module"; @@ -564,6 +565,42 @@ }; }; + pinctrl: pinctrl@f0800000 { + pinctrl-names = "default"; + pinctrl-0 = < + /******* RunBMC inside Module pins *******/ + &gpio0ol_pins + &gpio1ol_pins + &gpio2ol_pins + &gpio3ol_pins + &gpio8o_pins + &gpio9ol_pins + &gpio12ol_pins + &gpio13ol_pins + &gpio14ol_pins + &gpio15ol_pins + &gpio37ol_pins + &gpio38_pins + &gpio39_pins + &gpio94ol_pins + &gpio108ol_pins + &gpio109ol_pins + &gpio111ol_pins + &gpio112ol_pins + &gpio113ol_pins + &gpio208_pins + &gpio209ol_pins + &gpio210ol_pins + &gpio211ol_pins + &gpio212ol_pins + &gpio213ol_pins + &gpio214ol_pins + &gpio215ol_pins + &gpio216ol_pins + &gpio217ol_pins + >; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; From patchwork Mon Jul 1 06:01:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Jiang X-Patchwork-Id: 1125076 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ccMw66bQz9s00 for ; Mon, 1 Jul 2019 16:07:08 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QHcyeyo8"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45ccMw4bDzzDqVs for ; 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[220.135.135.179]) by smtp.gmail.com with ESMTPSA id w14sm8672127pfn.47.2019.06.30.23.02.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 30 Jun 2019 23:02:36 -0700 (PDT) From: Samuel Jiang To: joel@jms.id.au, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com Subject: [PATCH dev-5.17 v1 6/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios outside Module Date: Mon, 1 Jul 2019 14:01:37 +0800 Message-Id: <20190701060137.22116-6-chyishian.jiang@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190701060137.22116-1-chyishian.jiang@gmail.com> References: <20190701060137.22116-1-chyishian.jiang@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Samuel Jiang Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Samuel Jiang update nuvoton-npcm750-runbmc and runbmc-gpio-dtsi gpios which outside runbmc module Signed-off-by: Samuel Jiang --- .../boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi | 360 ++++++++++++++++++ arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 76 ++++ 2 files changed, 436 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi index f2f575d099ab..18f320c14fe0 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi @@ -23,6 +23,21 @@ bias-disable; output-low; }; + gpio5_pins: gpio5-pins { + pins = "GPIO5/IOX2LD/SMB1DSCL"; + bias-disable; + input-enable; + }; + gpio6_pins: gpio6-pins { + pins = "GPIO6/IOX2CK/SMB2DSDA"; + bias-disable; + input-enable; + }; + gpio7_pins: gpio7-pins { + pins = "GPIO7/IOX2D0/SMB2DSCL"; + bias-disable; + input-enable; + }; gpio8o_pins: gpio8o-pins { pins = "GPIO8/LKGPO1"; bias-disable; @@ -33,6 +48,16 @@ bias-disable; output-low; }; + gpio10_pins: gpio10-pins { + pins = "GPIO10/IOXHLD"; + bias-disable; + input-enable; + }; + gpio11_pins: gpio11-pins { + pins = "GPIO11/IOXHCK"; + bias-disable; + input-enable; + }; gpio12ol_pins: gpio12ol-pins { pins = "GPIO12/GSPICK/SMB5BSCL"; bias-disable; @@ -53,6 +78,46 @@ bias-disable; output-low; }; + gpio20_pins: gpio20-pins { + pins = "GPIO20/SMB4CSDA/SMB15SDA"; + bias-disable; + input-enable; + }; + gpio21_pins: gpio21-pins { + pins = "GPIO21/SMB4CSCL/SMB15SCL"; + bias-disable; + input-enable; + }; + gpio22o_pins: gpio22o-pins { + pins = "GPIO22/SMB4DSDA/SMB14SDA"; + bias-disable; + output-high; + }; + gpio23_pins: gpio23-pins { + pins = "GPIO23/SMB4DSCL/SMB14SCL"; + bias-disable; + input-enable; + }; + gpio24_pins: gpio24-pins { + pins = "GPIO24/IOXHDO"; + bias-disable; + input-enable; + }; + gpio25_pins: gpio25-pins { + pins = "GPIO25/IOXHDI"; + bias-disable; + input-enable; + }; + gpio30_pins: gpio27-pins { + pins = "GPIO30/SMB3SDA"; + bias-disable; + input-enable; + }; + gpio31_pins: gpio27-pins { + pins = "GPIO31/SMB3SCL"; + bias-disable; + input-enable; + }; gpio37ol_pins: gpio37ol-pins { pins = "GPIO37/SMB3CSDA"; bias-disable; @@ -68,6 +133,86 @@ bias-disable; input-enable; }; + gpio40o_pins: gpio40o-pins { + pins = "GPIO40/SMB3BSCL"; + bias-disable; + output-high; + }; + gpio59_pins: gpio59-pins { + pins = "GPIO59/SMB3DSDA"; + bias-disable; + input-enable; + }; + gpio76_pins: gpio76-pins { + pins = "GPIO76/FANIN12"; + bias-disable; + input-enable; + }; + gpio77_pins: gpio77-pins { + pins = "GPIO77/FANIN13"; + bias-disable; + input-enable; + }; + gpio78o_pins: gpio78o-pins { + pins = "GPIO78/FANIN14"; + bias-disable; + output-high; + }; + gpio79_pins: gpio79-pins { + pins = "GPIO79/FANIN15"; + bias-disable; + input-enable; + }; + gpio82_pins: gpio82-pins { + pins = "GPIO82/PWM2"; + bias-disable; + input-enable; + }; + gpio83_pins: gpio83-pins { + pins = "GPIO83/PWM3"; + bias-disable; + input-enable; + }; + gpio84_pins: gpio84-pins { + pins = "GPIO84/R2TXD0"; + bias-disable; + input-enable; + }; + gpio85o_pins: gpio85o-pins { + pins = "GPIO85/R2TXD1"; + bias-disable; + output-high; + }; + gpio86ol_pins: gpio86ol-pins { + pins = "GPIO86/R2TXEN"; + bias-disable; + output-low; + }; + gpio87_pins: gpio87-pins { + pins = "GPIO87/R2RXD0"; + bias-disable; + input-enable; + }; + gpio88_pins: gpio88-pins { + pins = "GPIO88/R2RXD1"; + bias-disable; + input-enable; + }; + gpio89_pins: gpio89-pins { + pins = "GPIO89/R2CRSDV"; + bias-disable; + input-enable; + }; + gpio90_pins: gpio90-pins { + pins = "GPIO90/R2RXERR"; + bias-disable; + input-enable; + }; + gpio93_pins: gpio93-pins { + pins = "GPIO93/GA20/SMB5DSCL"; + bias-disable; + input-enable; + }; gpio94ol_pins: gpio94ol-pins { pins = "GPIO94/nKBRST/SMB5DSDA"; bias-disable; @@ -103,6 +248,181 @@ bias-disable; output-low; }; + gpio114o_pins: gpio114o-pins { + pins = "GPIO114/SMB0SCL"; + bias-disable; + output-high; + }; + gpio115_pins: gpio115-pins { + pins = "GPIO115/SMB0SDA"; + bias-disable; + input-enable; + }; + gpio120_pins: gpio120-pins { + pins = "GPIO120/SMB2CSDA"; + bias-disable; + input-enable; + }; + gpio121_pins: gpio121-pins { + pins = "GPIO121/SMB2CSCL"; + bias-disable; + input-enable; + }; + gpio122_pins: gpio122-pins { + pins = "GPIO122/SMB2BSDA"; + bias-disable; + input-enable; + }; + gpio123_pins: gpio123-pins { + pins = "GPIO123/SMB2BSCL"; + bias-disable; + input-enable; + }; + gpio124_pins: gpio124-pins { + pins = "GPIO124/SMB1CSDA"; + bias-disable; + input-enable; + }; + gpio125_pins: gpio125-pins { + pins = "GPIO125/SMB1CSCL"; + bias-disable; + input-enable; + }; + gpio126_pins: gpio126-pins { + pins = "GPIO126/SMB1BSDA"; + bias-disable; + input-enable; + }; + gpio127o_pins: gpio127o-pins { + pins = "GPIO127/SMB1BSCL"; + bias-disable; + output-high; + }; + gpio136_pins: gpio136-pins { + pins = "GPIO136/SD1DT0"; + bias-disable; + input-enable; + }; + gpio137_pins: gpio137-pins { + pins = "GPIO137/SD1DT1"; + bias-disable; + input-enable; + }; + gpio138_pins: gpio138-pins { + pins = "GPIO138/SD1DT2"; + bias-disable; + input-enable; + }; + gpio139_pins: gpio139-pins { + pins = "GPIO139/SD1DT3"; + bias-disable; + input-enable; + }; + gpio140_pins: gpio140-pins { + pins = "GPIO140/SD1CLK"; + bias-disable; + input-enable; + }; + gpio141_pins: gpio141-pins { + pins = "GPIO141/SD1WP"; + bias-disable; + input-enable; + }; + gpio142_pins: gpio142-pins { + pins = "GPIO142/SD1CMD"; + bias-disable; + input-enable; + }; + gpio143_pins: gpio143-pins { + pins = "GPIO143/SD1CD/SD1PWR"; + bias-disable; + input-enable; + }; + gpio144_pins: gpio144-pins { + pins = "GPIO144/PWM4"; + bias-disable; + input-enable; + }; + gpio145_pins: gpio145-pins { + pins = "GPIO145/PWM5"; + bias-disable; + input-enable; + }; + gpio146_pins: gpio146-pins { + pins = "GPIO146/PWM6"; + bias-disable; + input-enable; + }; + gpio147_pins: gpio147-pins { + pins = "GPIO147/PWM7"; + bias-disable; + input-enable; + }; + gpio153o_pins: gpio153o-pins { + pins = "GPIO153/MMCWP"; + bias-disable; + output-high; + }; + gpio155_pins: gpio155-pins { + pins = "GPIO155/nMMCCD/nMMCRST"; + bias-disable; + input-enable; + }; + gpio160o_pins: gpio160o-pins { + pins = "GPIO160/CLKOUT/RNGOSCOUT"; + bias-disable; + output-high; + }; + gpio169o_pins: gpio169o-pins { + pins = "GPIO169/nSCIPME"; + bias-disable; + output-high; + }; + gpio188o_pins: gpio188o-pins { + pins = "GPIO188/SPI3D2/nSPI3CS2"; + bias-disable; + output-high; + }; + gpio189_pins: gpio189-pins { + pins = "GPIO189/SPI3D3/nSPI3CS3"; + bias-disable; + input-enable; + }; + gpio196_pins: gpio196-pins { + pins = "GPIO196/SMB0CSCL"; + bias-disable; + input-enable; + }; + gpio197_pins: gpio197-pins { + pins = "GPIO197/SMB0DEN"; + bias-disable; + input-enable; + }; + gpio198o_pins: gpio198o-pins { + pins = "GPIO198/SMB0DSDA"; + bias-disable; + output-high; + }; + gpio199o_pins: gpio199o-pins { + pins = "GPIO199/SMB0DSCL"; + bias-disable; + output-high; + }; + gpio200_pins: gpio200-pins { + pins = "GPIO200/R2CK"; + input-enable; + bias-disable; + }; + gpio202_pins: gpio202-pins { + pins = "GPIO202/SMB0CSDA"; + bias-disable; + input-enable; + }; + gpio203o_pins: gpio203o-pins { + pins = "GPIO203/FANIN16"; + bias-disable; + output-high; + }; gpio208_pins: gpio208-pins { pins = "GPIO208/RG2TXC/DVCK"; bias-disable; @@ -153,5 +473,45 @@ bias-disable; output-low; }; + gpio224_pins: gpio224-pins { + pins = "GPIO224/SPIXCK"; + bias-disable; + input-enable; + }; + gpio225ol_pins: gpio225ol-pins { + pins = "GPO225/SPIXD0/STRAP12"; + bias-disable; + output-low; + }; + gpio226ol_pins: gpio226ol-pins { + pins = "GPO226/SPIXD1/STRAP13"; + bias-disable; + output-low; + }; + gpio227ol_pins: gpio227ol-pins { + pins = "GPIO227/nSPIXCS0"; + bias-disable; + output-low; + }; + gpio228o_pins: gpio228ol-pins { + pins = "GPIO228/nSPIXCS1"; + bias-disable; + output-high; + }; + gpio229o_pins: gpio229o-pins { + pins = "GPO229/SPIXD2/STRAP3"; + bias-disable; + output-high; + }; + gpio230_pins: gpio230-pins { + pins = "GPIO230/SPIXD3"; + bias-disable; + input-enable; + }; + gpio231o_pins: gpio231o-pins { + pins = "GPIO231/nCLKREQ"; + bias-disable; + output-high; + }; }; }; diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts index f39de2822f4c..0de745304ca9 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts @@ -598,6 +598,82 @@ &gpio215ol_pins &gpio216ol_pins &gpio217ol_pins + /******* RunBMC outside Connector pins *******/ + &gpio5_pins + &gpio6_pins + &gpio7_pins + &gpio10_pins + &gpio11_pins + &gpio20_pins + &gpio21_pins + &gpio22o_pins + &gpio23_pins + &gpio24_pins + &gpio25_pins + &gpio30_pins + &gpio31_pins + &gpio40o_pins + &gpio59_pins + &gpio76_pins + &gpio77_pins + &gpio78o_pins + &gpio79_pins + &gpio82_pins + &gpio83_pins + &gpio84_pins + &gpio85o_pins + &gpio86ol_pins + &gpio87_pins + &gpio88_pins + &gpio89_pins + &gpio90_pins + &gpio93_pins + &gpio114o_pins + &gpio115_pins + &gpio120_pins + &gpio121_pins + &gpio122_pins + &gpio123_pins + &gpio124_pins + &gpio125_pins + &gpio126_pins + &gpio127o_pins + &gpio136_pins + &gpio137_pins + &gpio138_pins + &gpio139_pins + &gpio140_pins + &gpio141_pins + &gpio142_pins + &gpio143_pins + &gpio144_pins + &gpio146_pins + &gpio145_pins + &gpio147_pins + &gpio153o_pins + &gpio155_pins + &gpio160o_pins + &gpio169o_pins + &gpio188o_pins + &gpio189_pins + &gpio196_pins + &gpio197_pins + &gpio198o_pins + &gpio199o_pins + &gpio200_pins + &gpio202_pins + &gpio203o_pins + &gpio224_pins + &gpio225ol_pins + &gpio226ol_pins + &gpio227ol_pins + &gpio228o_pins + &gpio229o_pins + &gpio230_pins + &gpio231o_pins + &ddc_pins + &wdog1_pins + &wdog2_pins >; };