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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: lPiU3/GQ+RkuD5IMenH4w3PHKoym4WnnpFcsaRH0ERLcg3LVrxTlFTttCPVnNXoXkvhRkRe/RfYzIwifxkuWX8cXpzrbcrf7AHVRun5fV8COd3VsctLVXAP67tKLRY2x1heuBmz2yMKjEmySwuOdfJvecez0WRiREWCe+AwnAk/Jz3j3KY8WrSSqL1rOjMnK0fCBTFSuTLhQ1NJyyYQszfW0pSAkvW0o0+0vgoCM2rD4BiFoUdB4X7AEY/pHelVkl5M4QrKpgk7WZLeYtkjJHx6n62quYSUEBbSLYyCu0mK6+bqIvUozG/ZbaxQ0b5Cm+LXW426cUKRyMHaQjRkL0F9MAndd3MBDKbDbTUgfDFBejIG4V5DAcaeqbbgQiZ7bo1iWyotDkYq4nbVjsVvhyyTuW++Bg62x562OkOxiTEA= Content-ID: <0A91B22ABF86204C9A8102F4C09582F5@namprd11.prod.outlook.com> MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 7a8033b9-44da-4090-2cd7-08d6fba71389 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jun 2019 09:00:32.8944 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: tudor.ambarus@microchip.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR11MB1914 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190628_020039_823803_55E54151 X-CRM114-Status: GOOD ( 15.03 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.147.91 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mtd@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Hi, There are two conflicts related to the SPDX treewide changes. The first conflict is in: drivers/mtd/spi-nor/stm32-quadspi.c between commit: caab277b1de0 ("treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234") from Linus' tree and commit: df6bd6c002a4 mtd: spi-nor: stm32: remove the driver as it was replaced by spi-stm32-qspi.c from the spi-nor/next branch. The fix is to remove drivers/mtd/spi-nor/stm32-quadspi.c as the driver was replaced by spi-stm32-qspi.c The second conflict is in: drivers/mtd/spi-nor/intel-spi-pci.c drivers/mtd/spi-nor/intel-spi-platform.c drivers/mtd/spi-nor/intel-spi.c drivers/mtd/spi-nor/intel-spi.h include/linux/platform_data/intel-spi.h between commit: d2912cb15bdd ("treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500") from Linus' tree and commit: 62de37da9f38 ("mtd: spi-nor: intel-spi: Convert to use SPDX identifier") from the spi-nor/next branch. The fix is to keep the SPDX treewide change. Cheers, ta The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9: Linux 5.2-rc1 (2019-05-19 15:47:09 -0700) are available in the git repository at: ssh://git@gitolite.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git tags/spi-nor/for-5.3-v2 for you to fetch changes up to 8d1336c241bdadf61a56e398d82d1e512dbff5f8: mtd: spi-nor: cadence-quadspi: add reset control (2019-06-27 17:18:13 +0300) ---------------------------------------------------------------- SPI-NOR core changes: - add support for the mt25ql02g and w25q16jv flashes - print error in case of jedec read id fails - is25lp256: add post BFPT fix to correct the addr_width SPI NOR controller drivers changes: - intel-spi: Add support for Intel Elkhart Lake SPI serial flash - smt32: remove the driver as the driver was replaced by spi-stm32-qspi.c - cadence-quadspi: add reset control ---------------------------------------------------------------- Andrey Smirnov (1): mtd: spi-nor: Add Micron MT25QL02 support Dinh Nguyen (2): dt-bindings: cadence-quadspi: add options reset property mtd: spi-nor: cadence-quadspi: add reset control Flavio Suligoi (1): mtd: spi-nor: change "error reading JEDEC id" from dbg to err Geert Uytterhoeven (1): mtd: spi-nor: Spelling s/Writ/Write/ Liu Xiang (1): mtd: spi-nor: fix nor->addr_width when its value configured from SFDP does not match the actual width Ludovic Barre (1): mtd: spi-nor: stm32: remove the driver as it was replaced by spi-stm32-qspi.c Mika Westerberg (2): mtd: spi-nor: intel-spi: Add support for Intel Elkhart Lake SPI serial flash mtd: spi-nor: intel-spi: Convert to use SPDX identifier Robert Marko (1): mtd: spi-nor: Add Winbond w25q16jv support Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 5 ++ Documentation/devicetree/bindings/mtd/stm32-quadspi.txt | 43 --------- drivers/mtd/spi-nor/Kconfig | 7 -- drivers/mtd/spi-nor/Makefile | 1 - drivers/mtd/spi-nor/cadence-quadspi.c | 21 +++++ drivers/mtd/spi-nor/intel-spi-pci.c | 6 +- drivers/mtd/spi-nor/intel-spi-platform.c | 5 +- drivers/mtd/spi-nor/intel-spi.c | 5 +- drivers/mtd/spi-nor/intel-spi.h | 5 +- drivers/mtd/spi-nor/spi-nor.c | 37 +++++++- drivers/mtd/spi-nor/stm32-quadspi.c | 720 -------------------------------------------------------------------------------------------------------------------------------------------------- include/linux/platform_data/intel-spi.h | 5 +- 12 files changed, 66 insertions(+), 794 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mtd/stm32-quadspi.txt delete mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c