From patchwork Wed Jun 26 10:23:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1122660 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="QgNbpMdW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45YfJT4mLWz9sDn for ; Wed, 26 Jun 2019 20:23:53 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726131AbfFZKXm (ORCPT ); Wed, 26 Jun 2019 06:23:42 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:7143 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726077AbfFZKXm (ORCPT ); Wed, 26 Jun 2019 06:23:42 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 26 Jun 2019 03:23:43 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 26 Jun 2019 03:23:41 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 26 Jun 2019 03:23:41 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 26 Jun 2019 10:23:40 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 26 Jun 2019 10:23:39 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 26 Jun 2019 10:23:39 +0000 Received: from moonraker.nvidia.com (Not Verified[10.21.132.148]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Wed, 26 Jun 2019 03:23:40 -0700 From: Jon Hunter To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu CC: , , , Jon Hunter Subject: [PATCH 1/2] net: stmmac: Fix possible deadlock when disabling EEE support Date: Wed, 26 Jun 2019 11:23:21 +0100 Message-ID: <20190626102322.18821-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1561544623; bh=XV4Kw+o6xd8IYqvSK/9uERa+dJc4XymhGYNfc+d+goU=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:Content-Type; b=QgNbpMdWNBdmAFB65WGi5i9RqkIFGw4WozzpNghEsZe1f6z222Lmh7NHFPob4tc24 2bz2UfTUfaHxPQixd3zqEW4tX5YMMYdfG5v0wrPoJ+IgLqHwYkXOg4CRYoI/5/49cs BU1UpHhAE5YEtwB+47eX39nfXGCsbTmhZcg+abYxkzqkKmQJDbsYVIIAcsb6YTUylh ILbRIZk89eRzgNOWGNJYi2RLwqptqFYjV26p1ZSJ4IOk3l8qEdrhRBb79KAw78L84W R4ZrXmKugOogIkXVdfGf23TK59/A65HmL7wPxHrG+IwjT9tLbqo6LuxPBZxRo/ENTR fHWXqDjlnlo/Q== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org When stmmac_eee_init() is called to disable EEE support, then the timer for EEE support is stopped and we return from the function. Prior to stopping the timer, a mutex was acquired but in this case it is never released and so could cause a deadlock. Fix this by releasing the mutex prior to returning from stmmax_eee_init() when stopping the EEE timer. Fixes: 74371272f97f ("net: stmmac: Convert to phylink and remove phylib logic") Signed-off-by: Jon Hunter Tested-by: Thierry Reding Acked-by: Willem de Bruijn --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b628c697cee9..6c6c6ec3c781 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -402,6 +402,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv) netdev_dbg(priv->dev, "disable EEE\n"); del_timer_sync(&priv->eee_ctrl_timer); stmmac_set_eee_timer(priv, priv->hw, 0, tx_lpi_timer); + mutex_unlock(&priv->lock); return false; } From patchwork Wed Jun 26 10:23:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1122659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="T0erUwKX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45YfJT0rppz9sCJ for ; Wed, 26 Jun 2019 20:23:53 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727066AbfFZKXr (ORCPT ); Wed, 26 Jun 2019 06:23:47 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:8602 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726077AbfFZKXq (ORCPT ); Wed, 26 Jun 2019 06:23:46 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 26 Jun 2019 03:23:44 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 26 Jun 2019 03:23:45 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 26 Jun 2019 03:23:45 -0700 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 26 Jun 2019 10:23:44 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 26 Jun 2019 10:23:44 +0000 Received: from moonraker.nvidia.com (Not Verified[10.21.132.148]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Wed, 26 Jun 2019 03:23:44 -0700 From: Jon Hunter To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu CC: , , , Jon Hunter Subject: [PATCH 2/2] net: stmmac: Fix crash observed if PHY does not support EEE Date: Wed, 26 Jun 2019 11:23:22 +0100 Message-ID: <20190626102322.18821-2-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190626102322.18821-1-jonathanh@nvidia.com> References: <20190626102322.18821-1-jonathanh@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1561544624; bh=vGXcotllBTcL1C9r+R4poHo5wzdresdlxX353o8wzg0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:Content-Type; b=T0erUwKXAj4a/4jVBIK09tWghNGcEPTi5q6y0XcR3VA3Fx5TeKNTL5e7qys3Q4YC1 ttNUp1JBs2wGzNQT+exsFZ8UKpmYqq9bOXg6T/FiYD4MzKJIxxKceg/J97adAHjHqT dQEZYOwTSgrV31wM/U1fAxZnd0JBqzYC2C0YNQN2owsfkm7eV2aTmwcCX7i+9Bck5C Ye7lLPYdLz0zYnNqZBerY8JOSBHh+kAsW9CdAPOrew14YVBCgWUoHb6Ex4bW0Nabeb XEZgnnjFfxuaE1NGd78cNanX4j0Sd4aJp61mbmJ0Y/MzZojPCRicmXH5B0wfzSA1e4 0YRODa5wvo8KA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org If the PHY does not support EEE mode, then a crash is observed when the ethernet interface is enabled. The crash occurs, because if the PHY does not support EEE, then although the EEE timer is never configured, it is still marked as enabled and so the stmmac ethernet driver is still trying to update the timer by calling mod_timer(). This triggers a BUG() in the mod_timer() because we are trying to update a timer when there is no callback function set because timer_setup() was never called for this timer. The problem is caused because we return true from the function stmmac_eee_init(), marking the EEE timer as enabled, even when we have not configured the EEE timer. Fix this by ensuring that we return false if the PHY does not support EEE and hence, 'eee_active' is not set. Fixes: 74371272f97f ("net: stmmac: Convert to phylink and remove phylib logic") Signed-off-by: Jon Hunter Tested-by: Thierry Reding --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 6c6c6ec3c781..8f5ebd51859e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -398,10 +398,12 @@ bool stmmac_eee_init(struct stmmac_priv *priv) mutex_lock(&priv->lock); /* Check if it needs to be deactivated */ - if (!priv->eee_active && priv->eee_enabled) { - netdev_dbg(priv->dev, "disable EEE\n"); - del_timer_sync(&priv->eee_ctrl_timer); - stmmac_set_eee_timer(priv, priv->hw, 0, tx_lpi_timer); + if (!priv->eee_active) { + if (priv->eee_enabled) { + netdev_dbg(priv->dev, "disable EEE\n"); + del_timer_sync(&priv->eee_ctrl_timer); + stmmac_set_eee_timer(priv, priv->hw, 0, tx_lpi_timer); + } mutex_unlock(&priv->lock); return false; }