From patchwork Thu Nov 2 19:42:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Bowman X-Patchwork-Id: 833520 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-465781-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="Nzn7ZaKu"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ySb8P39hCz9sPm for ; Fri, 3 Nov 2017 06:42:28 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=lTq NVHqwMIoSeS+ZookeBcA/yAN2qMO97HY8CLuOCFdou45oZSl9wN4DMEsSSzxRou7 /7yD/o56WJl90dh3IPcOkzyR0PvTi9eZ7o0Xzj8K6gNVoV2w0u+VU+FBEtlESvoP GFVgXjgXsoYv9BjP6lIuexz8uh3HIIh34PUIp6ls= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=PbtRFN/iG hL8Ajap1x7Fwy9zv3A=; b=Nzn7ZaKu0Da/CDcTaWp5aAgLjl5VFT/VTfUuHpZWx n/uQKaKX+5lNh85IGsqVhY6JJx5AqFw3ap/hVvUfCV8dUCYq+joD9qSdJYyXBKOp 1dewm2Dipgfkslzzlt/H7YQNnKbH0jPeagZ9MJLsDqsLOGjDCS20BTGBRqwkIBZ+ is= Received: (qmail 109874 invoked by alias); 2 Nov 2017 19:42:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 109859 invoked by uid 89); 2 Nov 2017 19:42:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-16.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=4707, tl, HAccept-Language:en-GB X-HELO: smtp-out6.electric.net Received: from smtp-out6.electric.net (HELO smtp-out6.electric.net) (192.162.217.185) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 02 Nov 2017 19:42:17 +0000 Received: from 1eALNX-0009oz-Td by out6a.electric.net with emc1-ok (Exim 4.87) (envelope-from ) id 1eALNX-0009qN-UQ for gcc-patches@gcc.gnu.org; Thu, 02 Nov 2017 12:42:15 -0700 Received: by emcmailer; Thu, 02 Nov 2017 12:42:15 -0700 Received: from [188.39.184.226] (helo=glaexch1.ftdichip.com) by out6a.electric.net with esmtps (TLSv1:AES128-SHA:128) (Exim 4.87) (envelope-from ) id 1eALNX-0009oz-Td for gcc-patches@gcc.gnu.org; Thu, 02 Nov 2017 12:42:15 -0700 Received: from GLAEXCH1.ftdi.local ([172.16.0.121]) by glaexch3 ([172.16.0.161]) with mapi id 14.01.0438.000; Thu, 2 Nov 2017 19:42:13 +0000 From: James Bowman To: "gcc-patches@gcc.gnu.org" Subject: [patch committed FT32] Add FT32B support Date: Thu, 2 Nov 2017 19:42:12 +0000 Message-ID: <2BB0A51F073B384698CACFD1D5A30FCC0DED3EB5@glaexch1> MIME-Version: 1.0 X-Outbound-IP: 188.39.184.226 X-Env-From: james.bowman@ftdichip.com X-Proto: esmtps X-Revdns: 188-39-184-226.static.enta.net X-TLS: TLSv1:AES128-SHA:128 X-Authenticated_ID: X-PolicySMART: 10711027 FT32B is a new FT32 architecture type. Ft32B has a code compression scheme which uses linker relaxations. It also has a security option to prevent reads from program memory. [gcc] 2017-11-02 James Bowman * config/ft32/ft32.c (ft32_addr_space_legitimate_address_p): increase offset range for FT32B. * config/ft32/ft32.h: option "mcompress" enables relaxation. * config/ft32/ft32.md: Add TARGET_NOPM. * config/ft32/ft32.opt: Add mft32b, mcompress, mnopm. * gcc/doc/invoke.texi: Add mft32b, mcompress, mnopm. Index: gcc/config/ft32/ft32.c =================================================================== --- gcc/config/ft32/ft32.c (revision 254348) +++ gcc/config/ft32/ft32.c (working copy) @@ -866,6 +866,8 @@ ft32_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict, addr_space_t as ATTRIBUTE_UNUSED) { + int max_offset = TARGET_FT32B ? 16384 : 128; + if (mode != BLKmode) { if (GET_CODE (x) == PLUS) @@ -875,8 +877,9 @@ op2 = XEXP (x, 1); if (GET_CODE (op1) == REG && CONST_INT_P (op2) - && INTVAL (op2) >= -128 - && INTVAL (op2) < 128 && reg_ok_for_base_p (op1, strict)) + && (-max_offset <= INTVAL (op2)) + && (INTVAL (op2) < max_offset) + && reg_ok_for_base_p (op1, strict)) goto yes; if (GET_CODE (op1) == SYMBOL_REF && CONST_INT_P (op2)) goto yes; Index: gcc/config/ft32/ft32.h =================================================================== --- gcc/config/ft32/ft32.h (revision 254348) +++ gcc/config/ft32/ft32.h (working copy) @@ -39,6 +39,7 @@ #undef LIB_SPEC #define LIB_SPEC "%{!shared:%{!symbolic:-lc}} \ + %{mcompress:--relax} \ %{msim:-Tsim.ld}" #undef LINK_SPEC @@ -199,12 +200,12 @@ #define GLOBAL_ASM_OP "\t.global\t" -#define JUMP_TABLES_IN_TEXT_SECTION 1 +#define JUMP_TABLES_IN_TEXT_SECTION (TARGET_NOPM ? 0 : 1) /* This is how to output an element of a case-vector that is absolute. */ #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ - fprintf (FILE, "\tjmp\t.L%d\n", VALUE); \ + fprintf (FILE, "\t.long\t.L%d\n", VALUE); \ /* Passing Arguments in Registers */ @@ -469,7 +470,7 @@ #define ADDR_SPACE_PM 1 #define REGISTER_TARGET_PRAGMAS() do { \ - c_register_addr_space ("__flash__", ADDR_SPACE_PM); \ + c_register_addr_space ("__flash__", TARGET_NOPM ? 0 : ADDR_SPACE_PM); \ } while (0); extern int ft32_is_mem_pm(rtx o); Index: gcc/config/ft32/ft32.md =================================================================== --- gcc/config/ft32/ft32.md (revision 254348) +++ gcc/config/ft32/ft32.md (working copy) @@ -777,8 +777,12 @@ (clobber (match_scratch:SI 2 "=&r")) ] "" - "ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;jmpi\t%2" - ) + { + if (TARGET_NOPM) + return \"ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;ldi.l\t%2,%2,0\;jmpi\t%2\"; + else + return \"ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;lpmi.l\t%2,%2,0\;jmpi\t%2\"; + }) ;; ------------------------------------------------------------------------- ;; Atomic exchange instruction Index: gcc/config/ft32/ft32.opt =================================================================== --- gcc/config/ft32/ft32.opt (revision 254348) +++ gcc/config/ft32/ft32.opt (working copy) @@ -29,3 +29,15 @@ mnodiv Target Report Mask(NODIV) Avoid use of the DIV and MOD instructions + +mft32b +Target Report Mask(FT32B) +target the FT32B architecture + +mcompress +Target Report Mask(COMPRESS) +enable FT32B code compression + +mnopm +Target Report Mask(NOPM) +Avoid placing any readable data in program memory Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 254348) +++ gcc/doc/invoke.texi (working copy) @@ -743,7 +743,7 @@ @gccoptlist{-msmall-model -mno-lsim} @emph{FT32 Options} -@gccoptlist{-msim -mlra -mnodiv} +@gccoptlist{-msim -mlra -mnodiv -mft32b -mcompress -mnopm} @emph{FRV Options} @gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol @@ -17768,6 +17768,18 @@ @opindex mnodiv Do not use div and mod instructions. +@item -mft32b +@opindex mft32b +Enable use of the extended instructions of the FT32B processor. + +@item -mcompress +@opindex mcompress +Compress all code using the Ft32B code compression scheme. + +@item -mnopm +@opindex mnopm +Do not generate code that reads program memory. + @end table @node FRV Options