From patchwork Thu Jun 20 17:00:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1119591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LjEDLNIU"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45V7PT0FRSz9s4Y for ; Fri, 21 Jun 2019 03:01:01 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726866AbfFTRBA (ORCPT ); Thu, 20 Jun 2019 13:01:00 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:38354 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726562AbfFTRA7 (ORCPT ); Thu, 20 Jun 2019 13:00:59 -0400 Received: by mail-wm1-f68.google.com with SMTP id s15so3875140wmj.3 for ; Thu, 20 Jun 2019 10:00:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hT3+SBsf+AUXx1QiSpxys3xa4V/+u8aITm7Mir20SXo=; b=LjEDLNIUH6aubho1KJeQHb69KFH7EtxOsyLREyQHIUNfKJbyN309/hk5zmfd/wc9tO 9aXJpZa3Tusv9TijQjcjpugqzwpvNcPSfww0fi2KcalxgrMdqolqBVuMAqzOF+Gqw26A tK0J+6/gNqdo8HCP4ZS7EcnniTdT3wLwyH5CpojFXITvedm/3C6+qvUNmAR/4UxfBIe3 ETWFq1c8lLyXTYfyNtkW0eP8ZD50k+2G0phFP5pIcdomoXR6G0k5EtyOQsfS0RYCJlVA kGyoywUgyuw124PF+puneap12+obsSeTE+tmopEa+P3rfQ3+1FdOH0Fg3Kin0PeBgpaR 55cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hT3+SBsf+AUXx1QiSpxys3xa4V/+u8aITm7Mir20SXo=; b=GSIj4Q2QNPGlmURpSz5FZeowuKbavU26Gt9xhMhuN3OiRQiR9ci26plZR0T2c9ojZc ZayqsLxH4VexOAvjOjzX8Od+EPMCK7gDyaklMzehcMGRG4ymbfA+ABmoDN+e8ct5bWUA cXHzsRcYtFMFrUjn1r6ADV2WnEB6y7etVNI/THXyrKmb0OlU9UKW0ApXl65pSBRUnMy3 +I14JT9Ms/q6y8+ZfqjEQLToscTQ/5WGMGwzG52it/QKBnraqIk9x3iMlCMb7pHDnSvF 3d3GxZbeDkmdKH9mV/1EMP1vqksiXbhmgH+Fq3g6nVUdd7xJ+dmLDi8cuRL8PpHs3Hik ei7A== X-Gm-Message-State: APjAAAXJqjsB2FmQuDbNjx2WIFzaakRVRbbQKkJMNgg72PyrwKQdCI4d pATpzrTYw9YebJ0ZVXy9VAIEby2GZbA= X-Google-Smtp-Source: APXvYqxjEvdOk2ZzL1IBou3yKPNf9KYXrduldQ3ONgN+FDHvu44nfDeii8HWKO1TZFH0E0ZKik5Utw== X-Received: by 2002:a1c:b457:: with SMTP id d84mr408764wmf.153.1561050057191; Thu, 20 Jun 2019 10:00:57 -0700 (PDT) Received: from localhost (p2E5BEF36.dip0.t-ipconnect.de. [46.91.239.54]) by smtp.gmail.com with ESMTPSA id q20sm308052wra.36.2019.06.20.10.00.56 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 20 Jun 2019 10:00:56 -0700 (PDT) From: Thierry Reding To: Stephen Warren , Thierry Reding Cc: Jon Hunter , Sowjanya Komatineni , Dmitry Osipenko , linux-tegra@vger.kernel.org Subject: [pinmux scripts PATCH 1/3] Update kernel driver template Date: Thu, 20 Jun 2019 19:00:53 +0200 Message-Id: <20190620170055.19771-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Some changes in recent years have modified the upstream kernel driver in some ways that make it incompatible with the current template. Update the template to take into account changes introduced by the following commits: commit e3d2160f12d6aa7a87d9db09d8458b4a3492cd45 Author: Paul Gortmaker Date: Mon May 22 16:56:47 2017 -0400 pinctrl: tegra: clean up modular vs. non-modular distinctions None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get similar changes, so they are handled in batch. We remove module.h from code that isn't doing anything modular at all; if they have __init sections, then replace it with init.h. A couple drivers have module_exit() code that is essentially orphaned, and so we remove that. Quite a few bool drivers (hence non-modular) are converted over to to builtin_platform_driver(). Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Linus Walleij Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot Cc: Pritesh Raithatha Cc: Ashwini Ghuge Cc: linux-gpio@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Paul Gortmaker Signed-off-by: Linus Walleij commit 3c94d2d08a032d911bbe34f2edb24cb63a63644a Author: Stefan Agner Date: Thu Jul 26 17:40:24 2018 +0200 pinctrl: tegra: define GPIO compatible node per SoC Tegra 2 uses a different GPIO controller which uses "tegra20-gpio" as compatible string. Make the compatible string the GPIO node is using a SoC specific property. This prevents the kernel from registering the GPIO range twice in case the GPIO range is specified in the device tree. Fixes: 9462510ce31e ("pinctrl: tegra: Only set the gpio range if needed") Signed-off-by: Stefan Agner Signed-off-by: Linus Walleij commit 1e0813ee5599932c856bda64a568895ed7a33d3a Author: Dmitry Osipenko Date: Thu Aug 2 14:11:43 2018 +0300 pinctrl: tegra: Move drivers registration to arch_init level There is a bug in regards to deferred probing within the drivers core that causes GPIO-driver to suspend after its users. The bug appears if GPIO-driver probe is getting deferred, which happens after introducing dependency on PINCTRL-driver for the GPIO-driver by defining "gpio-ranges" property in device-tree. The bug in the drivers core is old (more than 4 years now) and is well known, unfortunately there is no easy fix for it. The good news is that we can workaround the deferred probe issue by changing GPIO / PINCTRL drivers registration order and hence by moving PINCTRL driver registration to the arch_init level and GPIO to the subsys_init. Signed-off-by: Dmitry Osipenko Acked-by: Stefan Agner Signed-off-by: Linus Walleij Note that the last one is something that we probably should fix correctly by using device links rather than working around it by playing init level tricks. Signed-off-by: Thierry Reding --- soc-to-kernel-pinctrl-driver.py | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/soc-to-kernel-pinctrl-driver.py b/soc-to-kernel-pinctrl-driver.py index 65e4c604f1c9..37f34b15db2b 100755 --- a/soc-to-kernel-pinctrl-driver.py +++ b/soc-to-kernel-pinctrl-driver.py @@ -41,22 +41,16 @@ if dbg: print(args) soc = tegra_pmx_soc_parser.load_soc(args.soc) print('''\ +// SPDX-License-Identifier: GPL-2.0-only /* * Pinctrl data for the NVIDIA %s pinmux * - * Copyright (c) %s, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. + * Author: %s * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. + * Copyright (c) %s, NVIDIA CORPORATION. All rights reserved. */ -#include +#include #include #include #include @@ -68,7 +62,7 @@ print('''\ * Most pins affected by the pinmux can also be GPIOs. Define these first. * These must match how the GPIO driver names/numbers its pins. */ -''' % (soc.titlename, soc.kernel_copyright_years), end='') +''' % (soc.titlename, soc.kernel_author, soc.kernel_copyright_years), end='') # Do not add any more exceptions here; new SoCs should be formatted correctly if soc.name == 'tegra30': @@ -615,6 +609,7 @@ print('''\ static const struct tegra_pinctrl_soc_data %(soc)s_pinctrl = { .ngpios = NUM_GPIOS, + .gpio_compatible = "nvidia,%(soc)s-gpio", .pins = %(soc)s_pins, .npins = ARRAY_SIZE(%(soc)s_pins), .functions = %(soc)s_functions, @@ -635,7 +630,6 @@ static const struct of_device_id %(soc)s_pinctrl_of_match[] = { { .compatible = "nvidia,%(soc)s-pinmux", }, { }, }; -MODULE_DEVICE_TABLE(of, %(soc)s_pinctrl_of_match); static struct platform_driver %(soc)s_pinctrl_driver = { .driver = { @@ -644,9 +638,10 @@ static struct platform_driver %(soc)s_pinctrl_driver = { }, .probe = %(soc)s_pinctrl_probe, }; -module_platform_driver(%(soc)s_pinctrl_driver); -MODULE_AUTHOR("%(author)s"); -MODULE_DESCRIPTION("NVIDIA %(usoc)s pinctrl driver"); -MODULE_LICENSE("GPL v2"); +static int __init %(soc)s_pinctrl_init(void) +{ + return platform_driver_register(&%(soc)s_pinctrl_driver); +} +arch_initcall(%(soc)s_pinctrl_init); ''' % socvars, end='') From patchwork Thu Jun 20 17:00:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1119592 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RKvDlAk/"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45V7PV2gwzz9s7h for ; Fri, 21 Jun 2019 03:01:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726562AbfFTRBB (ORCPT ); Thu, 20 Jun 2019 13:01:01 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:50179 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732017AbfFTRBA (ORCPT ); Thu, 20 Jun 2019 13:01:00 -0400 Received: by mail-wm1-f68.google.com with SMTP id c66so3815106wmf.0 for ; Thu, 20 Jun 2019 10:00:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7xKRcghk6K9wXD2NuSjK2ZbUH/YI2Xo2Km49x7MrLqo=; b=RKvDlAk/djPz2hB8AcduZ8LlM8CtF4h6hy5RVu7k6dWaWaEuGzXQ8HrwL9fwYus5Dl 52louvfEvVIC1ukMf7QbxCTNQLN9bWWypQygWc3tPbzTcXoix9wnamdtZjSzzlOLZEjt t36etBwvTBrZ2crV+lSWWqaTAlkQLOsW6nKp8SWBaaGLxtfNOzBcwywyvpINc64GxUNA X06wpvYDRjYpkZcdDk5xBKGL4zte0n6y26IzCFleMV8TbA55yc8PGHXkO2egyhYwL/4R BO4In9S2n4WyySrA5p93wZVm35wr3f56BvP+zAmbDFSKHs8eNCyLgSFslJzQFxbrjck0 GH6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7xKRcghk6K9wXD2NuSjK2ZbUH/YI2Xo2Km49x7MrLqo=; b=jE+p60HFCeJUX2DTnaOLy4ci3pCdMmqKjCcN9KDr+9+MIiUwr2HLESYsV1QrXU/IP0 Lto017gVxtgxFkX1PXVaqrE3Q7dlLx2xbv0kfOO7rQmasrvuQ7plAYOCt5lhrJ+kAwSL xxlAJ+bDZu4jYYIDF+MqT7+V0hdk8fXS6IwujVgDdcioD3WshTYp0Gv9nIpr6RCFsTWA B6EmszzUb+Irr64X8ixCzQUCjM1qI/lu+lrxDO++jJETAkokIVBcJf9/x60Vk8qpXr1F wZQzi9dFqPUf5pSt3+cNcMNBMsPSXa1XGYnsUUZ78HHR/xaeoDRt26eIogStiSG1ZaGq XNGA== X-Gm-Message-State: APjAAAVkMfv1efNOrXj5KGiaaOXc4rHFn+9LsIaa67i9GL6oR4o6jAfi QB8XVnPnCXbjY0KAaw1ZH5s= X-Google-Smtp-Source: APXvYqx/+ZnWVzCd6NnRgECpRWd3OnzkWTbaxTj7YACHnm8Gehhbhchk8pKfmYMjNYcM8wj706si4w== X-Received: by 2002:a05:600c:2189:: with SMTP id e9mr394437wme.56.1561050058578; Thu, 20 Jun 2019 10:00:58 -0700 (PDT) Received: from localhost (p2E5BEF36.dip0.t-ipconnect.de. [46.91.239.54]) by smtp.gmail.com with ESMTPSA id p26sm294909wrp.58.2019.06.20.10.00.57 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 20 Jun 2019 10:00:58 -0700 (PDT) From: Thierry Reding To: Stephen Warren , Thierry Reding Cc: Jon Hunter , Sowjanya Komatineni , Dmitry Osipenko , linux-tegra@vger.kernel.org Subject: [pinmux scripts PATCH 2/3] Do not output NVIDIA as an author Date: Thu, 20 Jun 2019 19:00:54 +0200 Message-Id: <20190620170055.19771-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190620170055.19771-1-thierry.reding@gmail.com> References: <20190620170055.19771-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Printing out the string 'NVIDIA' as the author of a file looks somewhat strange and is pretty meaningless given that there's already a copyright from NVIDIA in the files. Detect the special case and ignore it. Signed-off-by: Thierry Reding --- soc-to-kernel-pinctrl-driver.py | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/soc-to-kernel-pinctrl-driver.py b/soc-to-kernel-pinctrl-driver.py index 37f34b15db2b..0c04625b2e87 100755 --- a/soc-to-kernel-pinctrl-driver.py +++ b/soc-to-kernel-pinctrl-driver.py @@ -44,8 +44,13 @@ print('''\ // SPDX-License-Identifier: GPL-2.0-only /* * Pinctrl data for the NVIDIA %s pinmux - * - * Author: %s +''' % soc.titlename, end = '') + +if soc.kernel_author != 'NVIDIA': + print(' *') + print(' * Author: %s' % soc.kernel_author) + +print('''\ * * Copyright (c) %s, NVIDIA CORPORATION. All rights reserved. */ @@ -62,7 +67,7 @@ print('''\ * Most pins affected by the pinmux can also be GPIOs. Define these first. * These must match how the GPIO driver names/numbers its pins. */ -''' % (soc.titlename, soc.kernel_author, soc.kernel_copyright_years), end='') +''' % soc.kernel_copyright_years, end='') # Do not add any more exceptions here; new SoCs should be formatted correctly if soc.name == 'tegra30': From patchwork Thu Jun 20 17:00:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1119593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="CxgbgXni"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45V7PZ4vs4z9s7h for ; Fri, 21 Jun 2019 03:01:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726837AbfFTRBG (ORCPT ); Thu, 20 Jun 2019 13:01:06 -0400 Received: from mail-wr1-f53.google.com ([209.85.221.53]:34722 "EHLO mail-wr1-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732017AbfFTRBG (ORCPT ); Thu, 20 Jun 2019 13:01:06 -0400 Received: by mail-wr1-f53.google.com with SMTP id k11so3819022wrl.1 for ; Thu, 20 Jun 2019 10:01:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WCxL/Gx7Z/QbEpqDVsqL0T2Eel8nVyryvJvRvTbXrPs=; b=CxgbgXniUVw7AXVWOa/D0yAfjxEnm0IVIQg0ZWZV38vDYiztaB/AVOmmUbKaBsBD0W TIhrVVNV2xBd/gzV9NGjeULtMzteFHdOX0hm/z4xechsikPI21hxiI6GYUBbfc+hJm7e vgbtK8tAptsOkloJk1KcH3QrkDIUWBO9W1E1Oxs2E29kV0lPY5dDnZMLBh18JLXIP6fj OQhMYD3aZ4hB0lMZP6mudxIYQFMBl2EQX4/w8Coabovh8kERvaKKCvnkeHBi9x+4nH13 NzpEL0ilrxKSp0xNWa8K4hl19fbby+Ds151d5l/jmT/pgF8zKW2RAs+hXuww4vGHw7aR ahEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WCxL/Gx7Z/QbEpqDVsqL0T2Eel8nVyryvJvRvTbXrPs=; b=Xjd01ThLsgrxNemSA0SP76456zHnfHNLdYhcDN3ijj/xSGh0z21rZchO8e+seh9hOD 6PS9Xnw6A9HreO4kYEOB3sBZ1L+NAtAdOpii6+x92RbNr3ZCFmaSDOqltOy4REnoBfDp UtvXM+TTxLOC0NV9H8jqknbknupscsHfCmoC7DoYmwPuoQk/gHNzL3Gq6T0vz0ikDDrW mwAH+AdK4cIxi1J/3n1rESHyC+4z+JqYd4PGDt7QlYv8cfZ7sUhrP1hpVbZPV6ZGLeic LqZAJf92j4TMp3tQlDFkB2+PbXkkDbMtmaOc0ZeSXj8n9ygxV2MhUQI4ell90WxyUK7w RTCg== X-Gm-Message-State: APjAAAWbfSrWTSeQpb/B8p3zbICl8H2ryhcYOslaojTNqhiIwGFWwT1s hBN53erefsqjx/vVNW6Uktg= X-Google-Smtp-Source: APXvYqwKPVSJoCXeVmqfI9sUf0X4kbidZCrWMbfa+Fhq4APWcBw1CbMyx4DyStINLzFTJkHIquFsiw== X-Received: by 2002:a5d:400f:: with SMTP id n15mr30671033wrp.312.1561050060208; Thu, 20 Jun 2019 10:01:00 -0700 (PDT) Received: from localhost (p2E5BEF36.dip0.t-ipconnect.de. [46.91.239.54]) by smtp.gmail.com with ESMTPSA id k125sm55770wmf.41.2019.06.20.10.00.59 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 20 Jun 2019 10:00:59 -0700 (PDT) From: Thierry Reding To: Stephen Warren , Thierry Reding Cc: Jon Hunter , Sowjanya Komatineni , Dmitry Osipenko , linux-tegra@vger.kernel.org Subject: [pinmux scripts PATCH 3/3] Update to use bitmask instead of bit for parked configuration Date: Thu, 20 Jun 2019 19:00:55 +0200 Message-Id: <20190620170055.19771-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190620170055.19771-1-thierry.reding@gmail.com> References: <20190620170055.19771-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Sowjanya Komatineni Parked bits for SDMMC2 and SDMMC4 are part of CFGPAD register rather than pinmux registers and contains bit for each of their pins. So updating pinctrl Tegra driver to use bitmask for parked configuration rather than bit. Signed-off-by: Sowjanya Komatineni [treding@nvidia.com: reshuffle fields to match driver order] [treding@nvidia.com: use bitmask 0 for unsupported] Signed-off-by: Thierry Reding --- configs/tegra114.soc | 1 + configs/tegra124.soc | 1 + configs/tegra210.soc | 301 ++++++++++++++++---------------- configs/tegra30.soc | 1 + soc-to-kernel-pinctrl-driver.py | 34 ++-- tegra_pmx_soc_parser.py | 3 + 6 files changed, 181 insertions(+), 160 deletions(-) diff --git a/configs/tegra114.soc b/configs/tegra114.soc index a70bdf9bdc49..34eaccdb372b 100644 --- a/configs/tegra114.soc +++ b/configs/tegra114.soc @@ -12,6 +12,7 @@ soc_drvgroups_have_drvtype = True soc_drvgroups_have_hsm = True soc_drvgroups_have_lpmd = True soc_drvgroups_have_schmitt = True +soc_drvgroups_have_parked = False soc_pins_all_have_od = False soc_pins_all_have_parked = False soc_pins_all_have_schmitt = False diff --git a/configs/tegra124.soc b/configs/tegra124.soc index 1012c7c76e75..e0e2595ab405 100644 --- a/configs/tegra124.soc +++ b/configs/tegra124.soc @@ -13,6 +13,7 @@ soc_drvgroups_have_drvtype = True soc_drvgroups_have_hsm = True soc_drvgroups_have_lpmd = True soc_drvgroups_have_schmitt = True +soc_drvgroups_have_parked = False soc_pins_all_have_od = False soc_pins_all_have_parked = False soc_pins_all_have_schmitt = False diff --git a/configs/tegra210.soc b/configs/tegra210.soc index 970802bef512..edfd0c549cd1 100644 --- a/configs/tegra210.soc +++ b/configs/tegra210.soc @@ -9,6 +9,7 @@ soc_drvgroups_have_drvtype = False soc_drvgroups_have_hsm = False soc_drvgroups_have_lpmd = False soc_drvgroups_have_schmitt = False +soc_drvgroups_have_parked = True soc_pins_all_have_od = True soc_pins_all_have_parked = True soc_pins_all_have_schmitt = True @@ -195,156 +196,156 @@ pins = ( ) drive_groups = ( - #name, r, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w - ('als_prox_int', 0x8e4, 12, 5, 20, 5, -1, -1, -1, -1), - ('ap_ready', 0x8e8, 12, 5, 20, 5, -1, -1, -1, -1), - ('ap_wake_bt', 0x8ec, 12, 5, 20, 5, -1, -1, -1, -1), - ('ap_wake_nfc', 0x8f0, 12, 5, 20, 5, -1, -1, -1, -1), - ('aud_mclk', 0x8f4, 12, 5, 20, 5, -1, -1, -1, -1), - ('batt_bcl', 0x8f8, 12, 5, 20, 5, -1, -1, -1, -1), - ('bt_rst', 0x8fc, 12, 5, 20, 5, -1, -1, -1, -1), - ('bt_wake_ap', 0x900, 12, 5, 20, 5, -1, -1, -1, -1), - ('button_home', 0x904, 12, 5, 20, 5, -1, -1, -1, -1), - ('button_power_on', 0x908, 12, 5, 20, 5, -1, -1, -1, -1), - ('button_slide_sw', 0x90c, 12, 5, 20, 5, -1, -1, -1, -1), - ('button_vol_down', 0x910, 12, 5, 20, 5, -1, -1, -1, -1), - ('button_vol_up', 0x914, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam1_mclk', 0x918, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam1_pwdn', 0x91c, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam1_strobe', 0x920, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam2_mclk', 0x924, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam2_pwdn', 0x928, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam_af_en', 0x92c, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam_flash_en', 0x930, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam_i2c_scl', 0x934, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam_i2c_sda', 0x938, 12, 5, 20, 5, -1, -1, -1, -1), - ('cam_rst', 0x93c, 12, 5, 20, 5, -1, -1, -1, -1), - ('clk_32k_in', 0x940, 12, 5, 20, 5, -1, -1, -1, -1), - ('clk_32k_out', 0x944, 12, 5, 20, 5, -1, -1, -1, -1), - ('clk_req', 0x948, 12, 5, 20, 5, -1, -1, -1, -1), - ('core_pwr_req', 0x94c, 12, 5, 20, 5, -1, -1, -1, -1), - ('cpu_pwr_req', 0x950, 12, 5, 20, 5, -1, -1, -1, -1), - ('dap1_din', 0x954, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap1_dout', 0x958, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap1_fs', 0x95c, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap1_sclk', 0x960, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap2_din', 0x964, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap2_dout', 0x968, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap2_fs', 0x96c, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap2_sclk', 0x970, -1, -1, -1, -1, 28, 2, 30, 2), - ('dap4_din', 0x974, 12, 5, 20, 5, -1, -1, -1, -1), - ('dap4_dout', 0x978, 12, 5, 20, 5, -1, -1, -1, -1), - ('dap4_fs', 0x97c, 12, 5, 20, 5, -1, -1, -1, -1), - ('dap4_sclk', 0x980, 12, 5, 20, 5, -1, -1, -1, -1), - ('sdmmc1', 0xa98, 12, 7, 20, 7, 28, 2, 30, 2), - ('sdmmc3', 0xab0, 12, 7, 20, 7, 28, 2, 30, 2), - ('sdmmc2', 0xa9c, 2, 6, 8, 6, 28, 2, 30, 2), - ('sdmmc4', 0xab4, 2, 6, 8, 6, 28, 2, 30, 2), - ('dmic1_clk', 0x984, 12, 5, 20, 5, -1, -1, -1, -1), - ('dmic1_dat', 0x988, 12, 5, 20, 5, -1, -1, -1, -1), - ('dmic2_clk', 0x98c, 12, 5, 20, 5, -1, -1, -1, -1), - ('dmic2_dat', 0x990, 12, 5, 20, 5, -1, -1, -1, -1), - ('dmic3_clk', 0x994, 12, 5, 20, 5, -1, -1, -1, -1), - ('dmic3_dat', 0x998, 12, 5, 20, 5, -1, -1, -1, -1), - ('dp_hpd0', 0x99c, 12, 5, 20, 5, -1, -1, -1, -1), - ('dvfs_clk', 0x9a0, 12, 5, 20, 5, -1, -1, -1, -1), - ('dvfs_pwm', 0x9a4, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen1_i2c_scl', 0x9a8, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen1_i2c_sda', 0x9ac, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen2_i2c_scl', 0x9b0, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen2_i2c_sda', 0x9b4, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen3_i2c_scl', 0x9b8, 12, 5, 20, 5, -1, -1, -1, -1), - ('gen3_i2c_sda', 0x9bc, 12, 5, 20, 5, -1, -1, -1, -1), - ('pa6', 0x9c0, 12, 5, 20, 5, -1, -1, -1, -1), - ('pcc7', 0x9c4, 12, 5, 20, 5, -1, -1, -1, -1), - ('pe6', 0x9c8, 12, 5, 20, 5, -1, -1, -1, -1), - ('pe7', 0x9cc, 12, 5, 20, 5, -1, -1, -1, -1), - ('ph6', 0x9d0, 12, 5, 20, 5, -1, -1, -1, -1), - ('pk0', 0x9d4, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk1', 0x9d8, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk2', 0x9dc, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk3', 0x9e0, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk4', 0x9e4, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk5', 0x9e8, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk6', 0x9ec, -1, -1, -1, -1, 28, 2, 30, 2), - ('pk7', 0x9f0, -1, -1, -1, -1, 28, 2, 30, 2), - ('pl0', 0x9f4, -1, -1, -1, -1, 28, 2, 30, 2), - ('pl1', 0x9f8, -1, -1, -1, -1, 28, 2, 30, 2), - ('pz0', 0x9fc, 12, 7, 20, 7, -1, -1, -1, -1), - ('pz1', 0xa00, 12, 7, 20, 7, -1, -1, -1, -1), - ('pz2', 0xa04, 12, 7, 20, 7, -1, -1, -1, -1), - ('pz3', 0xa08, 12, 7, 20, 7, -1, -1, -1, -1), - ('pz4', 0xa0c, 12, 7, 20, 7, -1, -1, -1, -1), - ('pz5', 0xa10, 12, 7, 20, 7, -1, -1, -1, -1), - ('gpio_x1_aud', 0xa14, 12, 5, 20, 5, -1, -1, -1, -1), - ('gpio_x3_aud', 0xa18, 12, 5, 20, 5, -1, -1, -1, -1), - ('gps_en', 0xa1c, 12, 5, 20, 5, -1, -1, -1, -1), - ('gps_rst', 0xa20, 12, 5, 20, 5, -1, -1, -1, -1), - ('hdmi_cec', 0xa24, 12, 5, 20, 5, -1, -1, -1, -1), - ('hdmi_int_dp_hpd', 0xa28, 12, 5, 20, 5, -1, -1, -1, -1), - ('jtag_rtck', 0xa2c, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_bl_en', 0xa30, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_bl_pwm', 0xa34, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_gpio1', 0xa38, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_gpio2', 0xa3c, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_rst', 0xa40, 12, 5, 20, 5, -1, -1, -1, -1), - ('lcd_te', 0xa44, 12, 5, 20, 5, -1, -1, -1, -1), - ('modem_wake_ap', 0xa48, 12, 5, 20, 5, -1, -1, -1, -1), - ('motion_int', 0xa4c, 12, 5, 20, 5, -1, -1, -1, -1), - ('nfc_en', 0xa50, 12, 5, 20, 5, -1, -1, -1, -1), - ('nfc_int', 0xa54, 12, 5, 20, 5, -1, -1, -1, -1), - ('pex_l0_clkreq_n', 0xa58, 12, 5, 20, 5, -1, -1, -1, -1), - ('pex_l0_rst_n', 0xa5c, 12, 5, 20, 5, -1, -1, -1, -1), - ('pex_l1_clkreq_n', 0xa60, 12, 5, 20, 5, -1, -1, -1, -1), - ('pex_l1_rst_n', 0xa64, 12, 5, 20, 5, -1, -1, -1, -1), - ('pex_wake_n', 0xa68, 12, 5, 20, 5, -1, -1, -1, -1), - ('pwr_i2c_scl', 0xa6c, 12, 5, 20, 5, -1, -1, -1, -1), - ('pwr_i2c_sda', 0xa70, 12, 5, 20, 5, -1, -1, -1, -1), - ('pwr_int_n', 0xa74, 12, 5, 20, 5, -1, -1, -1, -1), - ('qspi_sck', 0xa90, -1, -1, -1, -1, 28, 2, 30, 2), - ('sata_led_active', 0xa94, 12, 5, 20, 5, -1, -1, -1, -1), - ('shutdown', 0xac8, 12, 5, 20, 5, -1, -1, -1, -1), - ('spdif_in', 0xacc, 12, 5, 20, 5, -1, -1, -1, -1), - ('spdif_out', 0xad0, 12, 5, 20, 5, -1, -1, -1, -1), - ('spi1_cs0', 0xad4, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi1_cs1', 0xad8, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi1_mosi', 0xae0, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi1_miso', 0xadc, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi1_sck', 0xae4, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi2_cs0', 0xae8, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi2_cs1', 0xaec, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi2_mosi', 0xaf4, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi2_miso', 0xaf0, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi2_sck', 0xaf8, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi4_cs0', 0xafc, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi4_mosi', 0xb04, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi4_miso', 0xb00, -1, -1, -1, -1, 28, 2, 30, 2), - ('spi4_sck', 0xb08, -1, -1, -1, -1, 28, 2, 30, 2), - ('temp_alert', 0xb0c, 12, 5, 20, 5, -1, -1, -1, -1), - ('touch_clk', 0xb10, 12, 5, 20, 5, -1, -1, -1, -1), - ('touch_int', 0xb14, 12, 5, 20, 5, -1, -1, -1, -1), - ('touch_rst', 0xb18, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart1_cts', 0xb1c, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart1_rts', 0xb20, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart1_rx', 0xb24, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart1_tx', 0xb28, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart2_cts', 0xb2c, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart2_rts', 0xb30, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart2_rx', 0xb34, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart2_tx', 0xb38, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart3_cts', 0xb3c, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart3_rts', 0xb40, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart3_rx', 0xb44, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart3_tx', 0xb48, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart4_cts', 0xb4c, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart4_rts', 0xb50, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart4_rx', 0xb54, 12, 5, 20, 5, -1, -1, -1, -1), - ('uart4_tx', 0xb58, 12, 5, 20, 5, -1, -1, -1, -1), - ('usb_vbus_en0', 0xb5c, 12, 5, 20, 5, -1, -1, -1, -1), - ('usb_vbus_en1', 0xb60, 12, 5, 20, 5, -1, -1, -1, -1), - ('wifi_en', 0xb64, 12, 5, 20, 5, -1, -1, -1, -1), - ('wifi_rst', 0xb68, 12, 5, 20, 5, -1, -1, -1, -1), - ('wifi_wake_ap', 0xb6c, 12, 5, 20, 5, -1, -1, -1, -1), + #name, r, prk_mask, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w + ('als_prox_int', 0x8e4, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('ap_ready', 0x8e8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('ap_wake_bt', 0x8ec, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('ap_wake_nfc', 0x8f0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('aud_mclk', 0x8f4, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('batt_bcl', 0x8f8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('bt_rst', 0x8fc, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('bt_wake_ap', 0x900, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('button_home', 0x904, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('button_power_on', 0x908, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('button_slide_sw', 0x90c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('button_vol_down', 0x910, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('button_vol_up', 0x914, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam1_mclk', 0x918, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam1_pwdn', 0x91c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam1_strobe', 0x920, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam2_mclk', 0x924, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam2_pwdn', 0x928, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam_af_en', 0x92c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam_flash_en', 0x930, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam_i2c_scl', 0x934, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam_i2c_sda', 0x938, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cam_rst', 0x93c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('clk_32k_in', 0x940, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('clk_32k_out', 0x944, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('clk_req', 0x948, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('core_pwr_req', 0x94c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('cpu_pwr_req', 0x950, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dap1_din', 0x954, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap1_dout', 0x958, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap1_fs', 0x95c, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap1_sclk', 0x960, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap2_din', 0x964, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap2_dout', 0x968, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap2_fs', 0x96c, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap2_sclk', 0x970, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('dap4_din', 0x974, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dap4_dout', 0x978, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dap4_fs', 0x97c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dap4_sclk', 0x980, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('sdmmc1', 0xa98, 0, 12, 7, 20, 7, 28, 2, 30, 2), + ('sdmmc3', 0xab0, 0, 12, 7, 20, 7, 28, 2, 30, 2), + ('sdmmc2', 0xa9c, 0x7ffc000, 2, 6, 8, 6, 28, 2, 30, 2), + ('sdmmc4', 0xab4, 0x7ffc000, 2, 6, 8, 6, 28, 2, 30, 2), + ('dmic1_clk', 0x984, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dmic1_dat', 0x988, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dmic2_clk', 0x98c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dmic2_dat', 0x990, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dmic3_clk', 0x994, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dmic3_dat', 0x998, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dp_hpd0', 0x99c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dvfs_clk', 0x9a0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('dvfs_pwm', 0x9a4, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen1_i2c_scl', 0x9a8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen1_i2c_sda', 0x9ac, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen2_i2c_scl', 0x9b0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen2_i2c_sda', 0x9b4, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen3_i2c_scl', 0x9b8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gen3_i2c_sda', 0x9bc, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pa6', 0x9c0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pcc7', 0x9c4, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pe6', 0x9c8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pe7', 0x9cc, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('ph6', 0x9d0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pk0', 0x9d4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk1', 0x9d8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk2', 0x9dc, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk3', 0x9e0, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk4', 0x9e4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk5', 0x9e8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk6', 0x9ec, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pk7', 0x9f0, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pl0', 0x9f4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pl1', 0x9f8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('pz0', 0x9fc, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('pz1', 0xa00, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('pz2', 0xa04, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('pz3', 0xa08, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('pz4', 0xa0c, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('pz5', 0xa10, 0, 12, 7, 20, 7, -1, -1, -1, -1), + ('gpio_x1_aud', 0xa14, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gpio_x3_aud', 0xa18, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gps_en', 0xa1c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('gps_rst', 0xa20, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('hdmi_cec', 0xa24, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('hdmi_int_dp_hpd', 0xa28, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('jtag_rtck', 0xa2c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_bl_en', 0xa30, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_bl_pwm', 0xa34, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_gpio1', 0xa38, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_gpio2', 0xa3c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_rst', 0xa40, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('lcd_te', 0xa44, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('modem_wake_ap', 0xa48, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('motion_int', 0xa4c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('nfc_en', 0xa50, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('nfc_int', 0xa54, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pex_l0_clkreq_n', 0xa58, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pex_l0_rst_n', 0xa5c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pex_l1_clkreq_n', 0xa60, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pex_l1_rst_n', 0xa64, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pex_wake_n', 0xa68, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pwr_i2c_scl', 0xa6c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pwr_i2c_sda', 0xa70, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('pwr_int_n', 0xa74, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('qspi_sck', 0xa90, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('sata_led_active', 0xa94, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('shutdown', 0xac8, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('spdif_in', 0xacc, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('spdif_out', 0xad0, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('spi1_cs0', 0xad4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi1_cs1', 0xad8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi1_mosi', 0xae0, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi1_miso', 0xadc, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi1_sck', 0xae4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi2_cs0', 0xae8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi2_cs1', 0xaec, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi2_mosi', 0xaf4, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi2_miso', 0xaf0, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi2_sck', 0xaf8, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi4_cs0', 0xafc, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi4_mosi', 0xb04, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi4_miso', 0xb00, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('spi4_sck', 0xb08, 0, -1, -1, -1, -1, 28, 2, 30, 2), + ('temp_alert', 0xb0c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('touch_clk', 0xb10, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('touch_int', 0xb14, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('touch_rst', 0xb18, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart1_cts', 0xb1c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart1_rts', 0xb20, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart1_rx', 0xb24, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart1_tx', 0xb28, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart2_cts', 0xb2c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart2_rts', 0xb30, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart2_rx', 0xb34, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart2_tx', 0xb38, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart3_cts', 0xb3c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart3_rts', 0xb40, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart3_rx', 0xb44, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart3_tx', 0xb48, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart4_cts', 0xb4c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart4_rts', 0xb50, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart4_rx', 0xb54, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('uart4_tx', 0xb58, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('usb_vbus_en0', 0xb5c, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('usb_vbus_en1', 0xb60, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('wifi_en', 0xb64, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('wifi_rst', 0xb68, 0, 12, 5, 20, 5, -1, -1, -1, -1), + ('wifi_wake_ap', 0xb6c, 0, 12, 5, 20, 5, -1, -1, -1, -1), ) drive_group_pins = { diff --git a/configs/tegra30.soc b/configs/tegra30.soc index 28073c11b21a..1279bdc5e936 100644 --- a/configs/tegra30.soc +++ b/configs/tegra30.soc @@ -9,6 +9,7 @@ soc_drvgroups_have_drvtype = False soc_drvgroups_have_hsm = True soc_drvgroups_have_lpmd = True soc_drvgroups_have_schmitt = True +soc_drvgroups_have_parked = False soc_pins_all_have_od = False soc_pins_all_have_parked = False soc_pins_all_have_schmitt = False diff --git a/soc-to-kernel-pinctrl-driver.py b/soc-to-kernel-pinctrl-driver.py index 0c04625b2e87..0f45e6fcf7c9 100755 --- a/soc-to-kernel-pinctrl-driver.py +++ b/soc-to-kernel-pinctrl-driver.py @@ -258,15 +258,6 @@ s += '''\ .rcv_sel_bit = %(rcv_sel_val)s ''' % globals() -if soc.soc_pins_all_have_parked: - s += '''\ - .parked_bit = %s, -''' % (soc.soc_parked_bit) -else: - s+= '''\ - .parked_bit = -1, -''' - if soc.soc_pins_have_hsm: s += '''\ .hsm_bit = PINGROUP_BIT_##hsm(9), @@ -310,6 +301,15 @@ else: .drv_reg = -1, ''' +if soc.soc_pins_all_have_parked: + s += '''\ + .parked_bitmask = BIT(%s), +''' % (soc.soc_parked_bit) +else: + s+= '''\ + .parked_bitmask = 0, +''' + s = append_aligned_tabs_indent_with_tabs(s, 72) print(s) @@ -325,6 +325,8 @@ if soc.soc_drvgroups_have_schmitt: params += ['schmitt_b',] if soc.soc_drvgroups_have_lpmd: params += ['lpmd_b',] +if soc.soc_drvgroups_have_parked: + params += ['prk_mask',] params += drive_params if soc.soc_drvgroups_have_drvtype: params += ['drvtype',] @@ -346,6 +348,11 @@ if soc.soc_drvgroups_have_lpmd: else: lpmd_bit_val = '-1' +if soc.soc_drvgroups_have_parked: + parked_bit_mask = 'prk_mask' +else: + parked_bit_mask = '0' + if soc.soc_drvgroups_have_drvtype: drvtype_bit_val = 'PINGROUP_BIT_##drvtype(6),' else: @@ -366,7 +373,6 @@ s += '''\ .rcv_sel_bit = -1, .drv_reg = DRV_PINGROUP_REG(r), .drv_bank = 0, - .parked_bit = -1, .hsm_bit = %(hsm_bit_val)s, .schmitt_bit = %(schmitt_bit_val)s, .lpmd_bit = %(lpmd_bit_val)s, @@ -379,6 +385,7 @@ s += '''\ .slwf_bit = slwf_b, .slwf_width = slwf_w, .drvtype_bit = %(drvtype_bit_val)s + .parked_bitmask = %(parked_bit_mask)s, ''' % globals() s = append_aligned_tabs_indent_with_tabs(s, 72) @@ -539,6 +546,8 @@ if soc.soc_drvgroups_have_schmitt: print('schmitt_b, ', end='') if soc.soc_drvgroups_have_lpmd: print('lpmd_b, ', end='') +if soc.soc_drvgroups_have_parked: + print('prk_mask, ', end='') print('drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w', end='') if soc.soc_drvgroups_have_drvtype: print(', drvtype', end='') @@ -570,6 +579,11 @@ for drvgroup in f(): row += (repr(drvgroup.schmitt_b),) if soc.soc_drvgroups_have_lpmd: row += (repr(drvgroup.lpmd_b),) + if soc.soc_drvgroups_have_parked: + if (drvgroup.prk_mask != -1): + row += (hex(drvgroup.prk_mask),) + else: + row += (repr(drvgroup.prk_mask),) row += ( repr(drvgroup.drvdn_b), repr(drvgroup.drvdn_w), diff --git a/tegra_pmx_soc_parser.py b/tegra_pmx_soc_parser.py index 891a68f34f4a..42af629a6e60 100644 --- a/tegra_pmx_soc_parser.py +++ b/tegra_pmx_soc_parser.py @@ -102,6 +102,8 @@ class DriveGroup(ReprDictObj): fields += ('schmitt_b',) if soc.soc_drvgroups_have_lpmd: fields += ('lpmd_b',) + if soc.soc_drvgroups_have_parked: + fields += ('prk_mask',) fields += ('drvdn_b', 'drvdn_w', 'drvup_b', 'drvup_w', 'slwr_b', 'slwr_w', 'slwf_b', 'slwf_w') if soc.soc_drvgroups_have_drvtype: @@ -148,6 +150,7 @@ class Soc(TopLevelParsedObj): ('soc_drvgroups_have_drvtype', None), ('soc_drvgroups_have_hsm', None), ('soc_drvgroups_have_lpmd', None), + ('soc_drvgroups_have_parked', None), ('soc_drvgroups_have_schmitt', None), ('soc_pins_all_have_od', None), ('soc_pins_all_have_parked', None),