From patchwork Fri Jun 14 16:31:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bitan Biswas X-Patchwork-Id: 1116125 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="q+pR+ptS"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45QR1n3m6Yz9sBr for ; Sat, 15 Jun 2019 02:31:09 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725809AbfFNQbI (ORCPT ); Fri, 14 Jun 2019 12:31:08 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:10277 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725808AbfFNQbI (ORCPT ); Fri, 14 Jun 2019 12:31:08 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 14 Jun 2019 09:31:07 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Fri, 14 Jun 2019 09:31:07 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Fri, 14 Jun 2019 09:31:07 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 14 Jun 2019 16:31:07 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 14 Jun 2019 16:31:06 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 14 Jun 2019 16:31:06 +0000 Received: from dhcp-10-19-65-14.client.nvidia.com (Not Verified[10.19.65.14]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 14 Jun 2019 09:31:05 -0700 From: Bitan Biswas To: Jassi Brar , Thierry Reding , Jonathan Hunter , , CC: Bitan Biswas Subject: [PATCH V2 1/2] mailbox: tegra: hsp: add noirq resume Date: Fri, 14 Jun 2019 09:31:00 -0700 Message-ID: <1560529861-31376-1-git-send-email-bbiswas@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1560529867; bh=kY8VvquYLGjeRdDquvZL6OISFhZiac6UhQbP3UIP5JE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=q+pR+ptSZk7iIYbX4kggcTHh1rRcw1G0HKLD/RkTLBsO2h/xnsfGs1RulBUEuqDLE qc43SB2OkZJtQXBjF2Cv2Dv2LYVmUT5weYFet6NbQ7U/LpUz38nu1F8pPjh47fCdP1 qaEVdM+wdVgovo6LUNeTm5N/EdNTrMzFZRIaNq5B5d6hugM9zHkS06f6mSasZva3i3 ZAQu+Tcuo2c8QIhJYTU9uWNaJqgdy5tLH8Kqb54s32YAoCeAyiHadfhQ+5yfnIgC3j unZvygFHS5CjEPeDuCHGd79E62wn26A033Ynxe3vRibfkcSInHPoC0JwGp4DPWpK8Y zxWQnSl3bN7pw== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add noirq resume instead of resume callback for Tegra HSP. Tegra HSP resume needs tegra_hsp_doorbell_startup() call to fix timeout error for tegra_bpmp_transfer() during genpd resume noirq on Jetson TX2. Signed-off-by: Bitan Biswas --- drivers/mailbox/tegra-hsp.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c index 91f1a0c..91e223e 100644 --- a/drivers/mailbox/tegra-hsp.c +++ b/drivers/mailbox/tegra-hsp.c @@ -775,6 +775,12 @@ static int __maybe_unused tegra_hsp_resume(struct device *dev) { struct tegra_hsp *hsp = dev_get_drvdata(dev); unsigned int i; + struct tegra_hsp_doorbell *db; + + list_for_each_entry(db, &hsp->doorbells, list) { + if (db && db->channel.chan) + tegra_hsp_doorbell_startup(db->channel.chan); + } for (i = 0; i < hsp->num_sm; i++) { struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; @@ -786,7 +792,9 @@ static int __maybe_unused tegra_hsp_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(tegra_hsp_pm_ops, NULL, tegra_hsp_resume); +static const struct dev_pm_ops tegra_hsp_pm_ops = { + .resume_noirq = tegra_hsp_resume, +}; static const struct tegra_hsp_db_map tegra186_hsp_db_map[] = { { "ccplex", TEGRA_HSP_DB_MASTER_CCPLEX, HSP_DB_CCPLEX, }, From patchwork Fri Jun 14 16:31:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bitan Biswas X-Patchwork-Id: 1116126 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="KJL2+bkB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45QR1t0ztNz9sBr for ; Sat, 15 Jun 2019 02:31:13 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725808AbfFNQbJ (ORCPT ); Fri, 14 Jun 2019 12:31:09 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:10280 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726138AbfFNQbJ (ORCPT ); Fri, 14 Jun 2019 12:31:09 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 14 Jun 2019 09:31:08 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Fri, 14 Jun 2019 09:31:08 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Fri, 14 Jun 2019 09:31:08 -0700 Received: from HQMAIL110.nvidia.com (172.18.146.15) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 14 Jun 2019 16:31:08 +0000 Received: from HQMAIL104.nvidia.com (172.18.146.11) by hqmail110.nvidia.com (172.18.146.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 14 Jun 2019 16:31:08 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 14 Jun 2019 16:31:08 +0000 Received: from dhcp-10-19-65-14.client.nvidia.com (Not Verified[10.19.65.14]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 14 Jun 2019 09:31:07 -0700 From: Bitan Biswas To: Jassi Brar , Thierry Reding , Jonathan Hunter , , CC: Bitan Biswas Subject: [PATCH V2 2/2] mailbox: tegra: avoid resume NULL mailboxes Date: Fri, 14 Jun 2019 09:31:01 -0700 Message-ID: <1560529861-31376-2-git-send-email-bbiswas@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1560529861-31376-1-git-send-email-bbiswas@nvidia.com> References: <1560529861-31376-1-git-send-email-bbiswas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1560529868; bh=wQqysFlLS0zu4DydDP6S++xJ52fy53qDS/chsaQerCE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=KJL2+bkB99aFE6pgh2ctbQ5VBc/TsYaojUzv2sNYHOExst0qKjRyy+pJYsEdpwRHE v6pqYV/ATQ9rSZyDaLt2+LNVHUtNqyzCl8asVmRdtotxLLfLk4+/W2Q+p6nNleXoDE YGbKe8AchsS/6nzRZ9QT4CNePX5IwIYKHrjF/1ZeQags1xJvBcWi3Bya9NCtf/DzNp ozjOipZX03L5Mp57YX7r+gWZ89dmMH2uGWFCFTZefrpozy/SgLLTnPS2Or9pkUemRY poDu5AbiLED1cBBgAbLJ5BD6DPwsIvUAJ7EGLn+mMXSZHqBu1d8s+KkD6mQB6FWbF8 WHTEhE0GFRI/w== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org If Tegra HSP device tree does not have 'shared irqs', mailboxes pointer is NULL. Add non-NULL HSP mailboxes check in resume callback before tegra_hsp_mailbox_startup() call and prevent NULL pointer exception. Signed-off-by: Bitan Biswas --- drivers/mailbox/tegra-hsp.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c index 91e223e..4c5ba35 100644 --- a/drivers/mailbox/tegra-hsp.c +++ b/drivers/mailbox/tegra-hsp.c @@ -782,11 +782,13 @@ static int __maybe_unused tegra_hsp_resume(struct device *dev) tegra_hsp_doorbell_startup(db->channel.chan); } - for (i = 0; i < hsp->num_sm; i++) { - struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; + if (hsp->mailboxes) { + for (i = 0; i < hsp->num_sm; i++) { + struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; - if (mb->channel.chan->cl) - tegra_hsp_mailbox_startup(mb->channel.chan); + if (mb->channel.chan->cl) + tegra_hsp_mailbox_startup(mb->channel.chan); + } } return 0;