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[50.247.96.158]) by smtp.gmail.com with ESMTPSA id m19sm1301262pff.153.2019.06.12.21.16.23 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 12 Jun 2019 21:16:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 12 Jun 2019 21:16:19 -0700 Message-Id: <20190613041619.32102-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613041619.32102-1-richard.henderson@linaro.org> References: <20190613041619.32102-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH 1/1] tcg: Fix typos in helper_gvec_sar{8, 32, 64}v X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The loop is written with scalars, not vectors. Use the correct type when incrementing. Fixes: 5ee5c14cacd Reported-by: Laurent Vivier Tested-by: Laurent Vivier Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime-gvec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index 3b6052fe97..51cb29ca79 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -874,7 +874,7 @@ void HELPER(gvec_sar8v)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { + for (i = 0; i < oprsz; i += sizeof(int8_t)) { uint8_t sh = *(uint8_t *)(b + i) & 7; *(int8_t *)(d + i) = *(int8_t *)(a + i) >> sh; } @@ -898,7 +898,7 @@ void HELPER(gvec_sar32v)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { + for (i = 0; i < oprsz; i += sizeof(int32_t)) { uint8_t sh = *(uint32_t *)(b + i) & 31; *(int32_t *)(d + i) = *(int32_t *)(a + i) >> sh; } @@ -910,7 +910,7 @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { + for (i = 0; i < oprsz; i += sizeof(int64_t)) { uint8_t sh = *(uint64_t *)(b + i) & 63; *(int64_t *)(d + i) = *(int64_t *)(a + i) >> sh; }