From patchwork Tue Oct 31 19:49:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trent Piepho X-Patchwork-Id: 832708 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="JNcrAsZm"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=impinj.onmicrosoft.com header.i=@impinj.onmicrosoft.com header.b="GeEVVdfk"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yRMSD3xhYz9sP1 for ; Wed, 1 Nov 2017 06:51:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ikc5MGp+hr71dq8bKm9Ebeb/SmnAFAepNU+d8FXGzeg=; b=JNcrAsZmlHFgNQ T+edHpv4/bXAuiGKpGFecP3/XogOYry5aN6LNfwudvjoc80QO0icabiSxWrvsSMSQmtqArEPoFnjQ V8VlgLgm3zWlYwzSE0iJGizk5x6HmgspzV/MhAZI1ebYvshtCfoan1OyB5+eU1ZceIosjDheCZUs1 o2x2P+LXwkyW16VC6Amno8ebJPuhmL9WqVzHKVMlZqJhlnxxg9YiC/6betMYX1b+wkclEY6ed08p8 HhicfCyT6Tw/uLnCPLNWvZAJxAuhin1SAPgV11lzUhHLyJrosEPuuLAKlM4RPw2ey+cdWfNBa/XMs 0/IFzgVjebQpT8byCIhA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e9cZm-0000Wu-HZ; Tue, 31 Oct 2017 19:51:54 +0000 Received: from mail-by2nam03on0725.outbound.protection.outlook.com ([2a01:111:f400:fe4a::725] helo=NAM03-BY2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e9cY7-0006OG-Nx for linux-arm-kernel@lists.infradead.org; Tue, 31 Oct 2017 19:50:15 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=impinj.onmicrosoft.com; s=selector1-impinj-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=Q1Hw4EN2QSx0ww/KbYMyWmVZHvOlwJz7+OfV6q9sKEE=; b=GeEVVdfk2rtFyvDvym+zlMbm8/xHL9YoMcfS0A2JTxGs7RQuZwReCwdbQyS2ObirERV9dj2og7dhPU5q9p+gldLg/61exBdibATR9xTj7rt8LUbZmNcj6U6qO6TdDSrVDMmGkFcNW+86iHOm01i70vOhnB/vBAR5mFl9BcgEo+U= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; Received: from impinj.com (216.243.31.162) by CY4PR06MB2808.namprd06.prod.outlook.com (10.175.118.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.178.6; Tue, 31 Oct 2017 19:49:34 +0000 From: Trent Piepho To: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/4] ARM: imx: Update spi_imx platform data to reflect current state Date: Tue, 31 Oct 2017 12:49:07 -0700 Message-Id: <20171031194907.29108-5-tpiepho@impinj.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171031194907.29108-1-tpiepho@impinj.com> References: <20171031194907.29108-1-tpiepho@impinj.com> MIME-Version: 1.0 X-Originating-IP: [216.243.31.162] X-ClientProxiedBy: MWHPR22CA0020.namprd22.prod.outlook.com (10.172.163.158) To CY4PR06MB2808.namprd06.prod.outlook.com (10.175.118.8) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7f9d931c-8b54-427f-9964-08d52098831c X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(4534020)(4602075)(2017052603238); SRVR:CY4PR06MB2808; X-Microsoft-Exchange-Diagnostics: 1; CY4PR06MB2808; 3:GHWU6UaiX5n9G74Ce41ql6L9N/FQDR0PibqFZdrTM9wJrWaw/sbnzyB4FDv5cPYem7dAWeyZ0zMfFUnf4b8yPf467NC93IVhXBZgqFpDCGZLKa6d1Lwae7IjNBjyKGEEmM8MsJ5Bba+dZfefpLxgpGJToMcC4LIroXz/cogoBKGTzWKlFZG6xvUsgGWNPH5jwEacW7G2egF7iyadWIJCPcHZ9FXT4uVE7I8//Vgz6G7WgEI/739NUTfs9lNllmS7; 25:dlWXgeKSNv/GCrftxQOwOc3l4kgg+ntRmoXB9sQMK/jQS00l+KQ6mPXfMYim5b6BIibgw+REk/Y/JolwM2uO4bEM61Lsfl7Adp0OubIwZ+HKKhNOE+EgL/o3b5paJfp9G3twx6MZMA9eOHFVJ1aDe1EEw96Vqw4LXkBaqNDKN29QQG0Sll89wvKJKJD7gRaZH03ajWprfnBGwYmmBqC/Lz/rR8chxEdAiuWU41Ym+toeIa0IugECD7Ahr7FHGWqLhssO1gDVxH6yEnZVRyzlBKAp2MfgqpdneJ7kTdyRQ/QWGMx5obwdkulQe98pIugvPdy/elSlXnFTmmbWlIVwKQ==; 31:4hlqBmGT6peCGQ0WBSzvlVu6yOxWUa5b3rqR4XcueK6d0/hzCNe/1nm2mVhnyhUygzT+KgAHxFemxYRaaAq1zSGPs4WPFo9aeU1aR9xcq7ZejX6dti8/OjQp2ww5yQBD7DgfTt7HZA3E4fTylbOvOQmuGvL4Ii1NREkAX8VzvcKefYvkQUjBM2SE/7DPW1Fxz3aygKQ41h2HCW8btXx2/PyEZWnBHTG64ZR8rvQIIf4= X-MS-TrafficTypeDiagnostic: CY4PR06MB2808: X-Microsoft-Exchange-Diagnostics: 1; CY4PR06MB2808; 20:v8YpI+sAMn1X8qGj+yOqr/5jtbFg3B+5vMJn1Uuyw4uljeIhxVkHCyigfeJ3o2w9MzHGCOszfYZsaoXikKYBWum94TwPHM16CoV6MnI6D7zkCL/WfkmUsWZNeAJIEOIGpecznx64YebT7j+R73X5pTsyH7Vohkv8ADEUA8KTEhyx6o3oebEiJnAooO87YO/M1gjPiU2L8wQSd5oZaSuWXXUovkEUza7TPgLH1PsFgTBNayth/YT6v797Li6Y9o2I52Dx/LxnYvBMFsppk/iHRPh8vkJkG5rg3YgeZPiNcza3RDQ/RCxZZEtQeYSysNkqZtj+TFx4vGcULMZvK1gTQ0tklZPOlCrxQBE8+335cMUmDBXlyJVGJlx7jNJnKMTD7sRgAR+fs7VEDtCQSZdzfBPJ9umpdiRydYRCt/KBtrOz5Uon7R/rSlGrIFxGv0plFCRGb+aTbaj7voCuDreOWROEC8NhvHk+lTPaU070EqLA/B+PReOXV7ZZhEoF/9Hk; 4:7UT7z/sLv4ElK309pvEd0NtRqKp795Ta3Aq3Uw/gfcdf+d5jJPlPmZCF/STFBzBopRa++wR6v83W/sU329hzalk970aLihLNICaPy8BVaPpc/GcvPZELbgCynWeVXNeftw6DoTwT142e2mEaiwU661RWUwNSqwuxYCCYnjHb8wmNryoJi8cCDy5MvbX7vJRNGYFtLKqNKEeghByap6Fm5PZMTTdcRzyJHAzEXfwdppiS+q1qGGruyhDWr9b1KEl2P1meLPXjWJVQhSm/pSCawiQ9znN4BLvFi5qto3PoRMCRK1kBiXSTkMqEb+3Vg11x X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(5005006)(8121501046)(3002001)(10201501046)(93006095)(93001095)(3231020)(100000703101)(100105400095)(6041248)(20161123560025)(20161123555025)(20161123562025)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:CY4PR06MB2808; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:CY4PR06MB2808; X-Forefront-PRVS: 04772EA191 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10019020)(6009001)(376002)(346002)(39830400002)(189002)(199003)(97736004)(53936002)(478600001)(15650500001)(86362001)(76176999)(101416001)(50466002)(50986999)(48376002)(69596002)(1076002)(25786009)(66066001)(81166006)(106356001)(8676002)(33646002)(105586002)(6116002)(3846002)(4326008)(36756003)(81156014)(2906002)(189998001)(8936002)(55016002)(68736007)(50226002)(2950100002)(16526018)(21086003)(305945005)(5660300001)(16586007)(47776003)(316002)(6666003)(54906003)(5003940100001)(7736002)(8656006); DIR:OUT; SFP:1102; SCL:1; SRVR:CY4PR06MB2808; H:impinj.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; Received-SPF: None (protection.outlook.com: impinj.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY4PR06MB2808; 23:Iq+UK2VXScJylUtJexwjCGZvyy99xoo8mcf+ltHhg?= FpV26tAglOoaUQWee2p4bvmkF0ylocXIesXprKjqgkhDNyo3hQp+EPkEjR92vgdaJ5b8wep7IXI2bESYo+1WPxY9RAWB1EjE63HG23EKwSO5Wsy7A7+voBfYmAzOcNAwD9CzGYCzIXEpjrcaB9jdLUS/b3Pf2qeCEz9Hp1sNOW675MPI5swLYVw+tI/+OcifLh9run7MUZgp77TbmEZx7Dwg/tQDzOj+YshmN7iW++vgoKDbwQlhpYcLhLYqtqwhsgsElnAegR0vbYU2HFAZ1ClsZPBXWgij0B1367fZqO2e6MJE6FmQHlSnUuYmFN85DBM75/MUlRjeowj35w8AUTtYxNe8pP/NiDcu+p8wQ2FupDHv3MTaUSBoOfA8AXpZOHBcpn9T+89iHzcoK5kj9TmSf77/oHl2H40opCALY+XXEL+Rav5t0BWuZArmFEoindwFsr9NR0w3Pl/hC7kwttIK5zA3L6GsWYLQU55P7A+6qIpbbJLR0NjUcJMRnvK3WTax9f3WFnrQQ0fJk5Sm/4i3uFojKkbD7c93iuWFdTaWsjoWSKaW1vCK482b7S/9+q1IWGel5VAgd96tPP1wWD9LuNyQYnuEskRNMXLn/ljZp7XEE/dimp/KusJA+9qHtGK1aLshV8ESkFaV2fzc4gHPRQxo7gQTO+Pg5+eU7jhhU1MQdIP6/9RWUs40AVmQYZFS/9W7GVwnmjEcXMj4fvT6cwuBb5yDHR0/6ZoMO25zH5UhwLhLnR5QoYkXcp9tmEPlACfQLVgtYAL+76U8NmyFpgFewB/6nmaWW2RyM7xvGTjEVrvt/nDUkBKXd273Y5AB94aYSzKNwshJ/u+/Vtq0CXGO3uIn9f/BcU4nCFuchmUWK/kBpB5mNjRTNM+OyOsbhyaY5SSuhR9fWx29YS+bRNqaiAnb56WN4KorC4TmnUAvnt0WZagkPoKV/iRBD9FhDy28cBz9GrddS9ToHrSVOncCLQSaOLGHs0l4IDDlx+sDMpWoaq3+lu45JUc1uo428vLbsazQJ3pY/WDs51CgdtUmIYmG4qic3L7cf0xZLUVAj8+515RUik+g3oq7p0ffBdchhm0/3QdxnO3n920JSUreJ0sNnltk6CL5VE/7A== X-Microsoft-Exchange-Diagnostics: 1; CY4PR06MB2808; 6:q7CreM1ckcJpDNqApVD8fnYwNgggjDBE2n0fFaEhBZoCY9gaX9YNyrAZST0USSxQoEMzInvlyWefGx6Rm/I0iYC2V+E0t8kSVsCz/cLVALK+8gRnPtmqkx6ggqr80yED7lyn122QPrnKaA0zhVAV8mzRikYWlstxzIMHBCSjy9nuQ/FVnJx+NjPmn8x8721+SitccgjhrE3dxRtKY65livU/aDURTTiQErEyXjEg5Nx4e48uRUdvz8ejAtDV2Xw+MlAjl5lQiZs/TW4oZJUmKlz9mrdg/DmLb/PeCPxM4Gw6jt1zmDhFNHGE1GbERGgIe+8JC2cgP+AoF35yvVh4wEDkjMQTEYIRQ8liMOGjZ9s=; 5:h+hyBX3QYurafSSntmNYBueQ3cJhnvXjZH+OwZA0NBcjCpmK519KzxDKyDPNQ5oEx726GEthq/QmF49fqExmoaLr9TD7boZgeXO+o44rshcb/GHjK2nBhs+GVARa5f9ZuT+sLiS/DSA6NTEUHzu6/8xKOTvFtEs7w445A2gpz3g=; 24:zQ5ymJANCoJGLkdQazOhKOnVjcbqgHSu16cf14ClrYX3Nqjd4yf3EMcJt8uvqkQgLxlNekDakKzxLXREhkw7b9Yz0bVhXQ8idbzPiVfFffQ=; 7:a5Z0G5GZAZjEouUPyEMDsCj7lZUfXykYqlR4gaZ8+dVysR/UUFjNRFeg1aSAqdcuI8TDo2eV8pVgTgG2/EVSedwG7CZ+Q1kZr5I2stYIx0hwSIi4/I4rbe3df4MOM2yRLXIHwEOzqsdcQ5ncttjVCEFQ+3XF5SwhSL1b5uKoHGwgj5TsI0nresKz1Uo2ExXSsyO0g6fK5XqiDATArh5hrsGYBaDNRsmgKQeEx7TSoLWP4Wy1z2caB84jpPXYOSmo SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: impinj.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2017 19:49:34.5225 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7f9d931c-8b54-427f-9964-08d52098831c X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 6de70f0f-7357-4529-a415-d8cbb7e93e5e X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR06MB2808 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171031_125011_968386_F506C83B X-CRM114-Status: GOOD ( 16.16 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabio Estevam , Shawn Guo , Sascha Hauer , Trent Piepho Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The docs for the spi_imx platform data still refer to a -32 offset used to specify a native chip select. This was removed in commit 602c8f4485cd ("spi: imx: fix use of native chip-selects with devicetree") and no longer works as documented. Update documentation. The macro MXC_SPI_CS() is no longer is needed. If a board uses all native chip selects, then it's not necessary to specify a chip select array at all, as all native is the default (this is how device-tree configured SPI masters work too). Most of the spi-imx platform data users have their chip select arrays removed by this patch. This patch also fixes a bug in mx31moboard introduced in the '602 commit. When that board was updated in commit 901f26bce64a ("ARM: imx: set correct chip_select in platform setup") to reflect the SPI change, only SPI bus 2 was updated and SPI bus 1 was left with non-sequential chip selects. The mc13783 spi device on bus 1 had its chip select updated as if it were on bus 2. CC: Shawn Guo CC: Sascha Hauer CC: Fabio Estevam Acked-by: Greg Ungerer Signed-off-by: Trent Piepho --- arch/arm/mach-imx/mach-mx31_3ds.c | 18 ++---------------- arch/arm/mach-imx/mach-mx31lilly.c | 12 ++---------- arch/arm/mach-imx/mach-mx31lite.c | 16 ++-------------- arch/arm/mach-imx/mach-mx31moboard.c | 17 +++-------------- arch/arm/mach-imx/mach-pcm037_eet.c | 5 +---- include/linux/platform_data/spi-imx.h | 29 +++++++++++++++++------------ 6 files changed, 27 insertions(+), 70 deletions(-) diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 68c3f0799d5b..9d87f1dcf7bb 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -374,26 +374,12 @@ static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = { }; /* SPI */ -static int spi0_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi0_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect), -}; - -static int spi1_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), + .num_chipselect = 3, }; static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi1_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), + .num_chipselect = 3, }; static struct spi_board_info mx31_3ds_spi_devs[] __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 6fd463642954..8bf52819d4d9 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -226,20 +226,12 @@ static void __init lilly1131_usb_init(void) /* SPI */ -static int spi_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), + .num_chipselect = 3, }; static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), + .num_chipselect = 3, }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index a3250bc7f114..a3cbba6c955b 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -83,15 +83,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { }; /* SPI */ -static int spi0_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi0_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect), + .num_chipselect = 3, }; static const struct mxc_nand_platform_data @@ -133,13 +126,8 @@ static struct platform_device smsc911x_device = { * The MC13783 is the only hard-wired SPI device on the module. */ -static int spi1_internal_chipselect[] = { - MXC_SPI_CS(0), -}; - static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi1_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), + .num_chipselect = 1, }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 7716f83aecdd..643a3d749703 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -152,14 +152,8 @@ static const struct imxi2c_platform_data moboard_i2c1_data __initconst = { .bitrate = 100000, }; -static int moboard_spi1_cs[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(2), -}; - static const struct spi_imx_master moboard_spi1_pdata __initconst = { - .chipselect = moboard_spi1_cs, - .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), + .num_chipselect = 3, }; static struct regulator_consumer_supply sdhc_consumers[] = { @@ -296,19 +290,14 @@ static struct spi_board_info moboard_spi_board_info[] __initdata = { /* irq number is run-time assigned */ .max_speed_hz = 300000, .bus_num = 1, - .chip_select = 1, + .chip_select = 0, .platform_data = &moboard_pmic, .mode = SPI_CS_HIGH, }, }; -static int moboard_spi2_cs[] = { - MXC_SPI_CS(0), MXC_SPI_CS(1), -}; - static const struct spi_imx_master moboard_spi2_pdata __initconst = { - .chipselect = moboard_spi2_cs, - .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), + .num_chipselect = 2, }; #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c index 95bd97710494..15bc956d466b 100644 --- a/arch/arm/mach-imx/mach-pcm037_eet.c +++ b/arch/arm/mach-imx/mach-pcm037_eet.c @@ -56,11 +56,8 @@ static struct spi_board_info pcm037_spi_dev[] = { }; /* Platform Data for MXC CSPI */ -static int pcm037_spi1_cs[] = { MXC_SPI_CS(0), MXC_SPI_CS(1), }; - static const struct spi_imx_master pcm037_spi1_pdata __initconst = { - .chipselect = pcm037_spi1_cs, - .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs), + .num_chipselect = 2, }; /* GPIO-keys input device */ diff --git a/include/linux/platform_data/spi-imx.h b/include/linux/platform_data/spi-imx.h index 08be445e8eb8..9b2ed66ef7a2 100644 --- a/include/linux/platform_data/spi-imx.h +++ b/include/linux/platform_data/spi-imx.h @@ -4,24 +4,29 @@ /* * struct spi_imx_master - device.platform_data for SPI controller devices. - * @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio - * pins, numbers < 0 mean internal CSPI chipselects according - * to MXC_SPI_CS(). Normally you want to use gpio based chip - * selects as the CSPI module tries to be intelligent about - * when to assert the chipselect: The CSPI module deasserts the - * chipselect once it runs out of input data. The other problem - * is that it is not possible to mix between high active and low - * active chipselects on one single bus using the internal - * chipselects. Unfortunately Freescale decided to put some + * @chipselect: Array of chipselects for this master or NULL. Numbers >= 0 + * mean GPIO pins, -ENOENT means internal CSPI chipselect + * matching the position in the array. E.g., if chipselect[1] = + * -ENOENT then a SPI slave using chip select 1 will use the + * native SS1 line of the CSPI. Omitting the array will use + * all native chip selects. + + * Normally you want to use gpio based chip selects as the CSPI + * module tries to be intelligent about when to assert the + * chipselect: The CSPI module deasserts the chipselect once it + * runs out of input data. The other problem is that it is not + * possible to mix between high active and low active chipselects + * on one single bus using the internal chipselects. + * Unfortunately, on some SoCs, Freescale decided to put some * chipselects on dedicated pins which are not usable as gpios, * so we have to support the internal chipselects. - * @num_chipselect: ARRAY_SIZE(chipselect) + * + * @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect), + * otherwise the number of native chip selects. */ struct spi_imx_master { int *chipselect; int num_chipselect; }; -#define MXC_SPI_CS(no) ((no) - 32) - #endif /* __MACH_SPI_H_*/