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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 30 May 2019 01:09:49 +0100 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4U09mCD37552236 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 30 May 2019 00:09:48 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF912AC05E; Thu, 30 May 2019 00:09:48 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 59FCFAC059; Thu, 30 May 2019 00:09:48 +0000 (GMT) Received: from BigMac.local (unknown [9.85.143.85]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 30 May 2019 00:09:48 +0000 (GMT) Subject: [PATCH v2] rs6000: Add undocumented switch -mprefixed-addr To: Segher Boessenkool Cc: GCC Patches , Michael Meissner References: <78d1bd8d-bdaf-bb90-4e71-b8e3b9746cdf@linux.ibm.com> <20190529131629.GP31586@gate.crashing.org> <098b3e26-96ea-401e-823c-300c1935287a@linux.ibm.com> <20190529213346.GX31586@gate.crashing.org> From: Bill Schmidt Date: Wed, 29 May 2019 19:09:47 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.14; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190529213346.GX31586@gate.crashing.org> x-cbid: 19053000-0060-0000-0000-000003499C8A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011181; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01210492; UDB=6.00635980; IPR=6.00991525; MB=3.00027108; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-30 00:09:50 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19053000-0061-0000-0000-0000498C255A Message-Id: <2153fe10-1aa8-e0bb-ec5d-acf7dd6cf9c1@linux.ibm.com> Hi, Here's another version of the -mprefixed-addr patch. I've attempted to address Segher's comments, other than the suggestion to merge OPTION_MASK_P8_FUSION_SIGN into OPTION_MASK_P8_FUSION, which I think is too big a rat's nest for this patch series. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this version okay for trunk? Thanks! Bill 2019-05-29 Bill Schmidt Michael Meissner * rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. (ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS. (ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE. (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR. (OTHER_FUTURE_MASKS): Likewise. (POWERPC_MASKS): Likewise. * rs6000.c (rs6000_option_override_internal): Error if -mpcrel is specified without -mprefixed-addr or -mcpu=future. Error if -mprefied-addr is specified without -mcpu=future. (rs6000_opt_masks): Add entry for prefixed-addr. * rs6000.opt (mprefixed-addr): New option. diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 5337382bdcf..101efd54183 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -56,29 +56,35 @@ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC) +/* ISA masks setting fusion options. */ +#define OTHER_FUSION_MASKS (OPTION_MASK_P8_FUSION \ + | OPTION_MASK_P8_FUSION_SIGN) + /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add FLOAT128_HW here until we are ready to make -mfloat128 on by default. */ -#define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ - | OPTION_MASK_ISEL \ - | OPTION_MASK_MODULO \ - | OPTION_MASK_P9_MINMAX \ - | OPTION_MASK_P9_MISC \ - | OPTION_MASK_P9_VECTOR) +#define ISA_3_0_MASKS_SERVER ((ISA_2_7_MASKS_SERVER \ + | OPTION_MASK_ISEL \ + | OPTION_MASK_MODULO \ + | OPTION_MASK_P9_MINMAX \ + | OPTION_MASK_P9_MISC \ + | OPTION_MASK_P9_VECTOR) \ + & ~OTHER_FUSION_MASKS) /* Support for the IEEE 128-bit floating point hardware requires a lot of the VSX instructions that are part of ISA 3.0. */ #define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \ | OPTION_MASK_P8_VECTOR \ - | OPTION_MASK_P9_VECTOR \ - | OPTION_MASK_DIRECT_MOVE) + | OPTION_MASK_P9_VECTOR) /* Support for a future processor's features. */ #define ISA_FUTURE_MASKS_SERVER (ISA_3_0_MASKS_SERVER \ | OPTION_MASK_FUTURE \ - | OPTION_MASK_PCREL) + | OPTION_MASK_PCREL \ + | OPTION_MASK_PREFIXED_ADDR) /* Flags that need to be turned off if -mno-future. */ -#define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL) +#define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL \ + | OPTION_MASK_PREFIXED_ADDR) /* Flags that need to be turned off if -mno-power9-vector. */ #define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \ @@ -139,6 +145,7 @@ | OPTION_MASK_POWERPC64 \ | OPTION_MASK_PPC_GFXOPT \ | OPTION_MASK_PPC_GPOPT \ + | OPTION_MASK_PREFIXED_ADDR \ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC \ | OPTION_MASK_RECIP_PRECISION \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index b9fd89837a6..f9ef8e38314 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4296,15 +4296,24 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW; } - /* -mpcrel requires the prefixed load/store support on FUTURE systems. */ - if (!TARGET_FUTURE && TARGET_PCREL) + /* -mpcrel requires prefixed load/store addressing. */ + if (TARGET_PCREL && !TARGET_PREFIXED_ADDR) { if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) - error ("%qs requires %qs", "-mpcrel", "-mcpu=future"); + error ("%qs requires %qs", "-mpcrel", "-mprefixed-addr"); rs6000_isa_flags &= ~OPTION_MASK_PCREL; } + /* -mprefixed-addr (and hence -mpcrel) requires -mcpu=future. */ + if (TARGET_PREFIXED_ADDR && !TARGET_FUTURE) + { + if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) + error ("%qs requires %qs", "-mprefixed-addr", "-mcpu=future"); + + rs6000_isa_flags &= ~(OPTION_MASK_PCREL | OPTION_MASK_PREFIXED_ADDR); + } + /* Print the options after updating the defaults. */ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags); @@ -36376,6 +36385,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "power9-vector", OPTION_MASK_P9_VECTOR, false, true }, { "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true }, { "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true }, + { "prefixed-addr", OPTION_MASK_PREFIXED_ADDR, false, true }, { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true }, { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true }, { "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true }, diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 43b04834746..3a4353674b8 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -574,6 +574,10 @@ mfuture Target Report Mask(FUTURE) Var(rs6000_isa_flags) Use instructions for a future architecture. +mprefixed-addr +Target Undocumented Mask(PREFIXED_ADDR) Var(rs6000_isa_flags) +Generate (do not generate) prefixed memory instructions. + mpcrel Target Report Mask(PCREL) Var(rs6000_isa_flags) Generate (do not generate) pc-relative memory addressing.