From patchwork Sat May 25 18:11:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105397 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="OyX8MuNv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDg307hz9s3l for ; Sun, 26 May 2019 04:13:07 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727421AbfEYSNB (ORCPT ); Sat, 25 May 2019 14:13:01 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:43024 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727126AbfEYSLq (ORCPT ); Sat, 25 May 2019 14:11:46 -0400 Received: by mail-wr1-f66.google.com with SMTP id l17so4550936wrm.10; Sat, 25 May 2019 11:11:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3846hpA0VZMszmYc1Od49f4w97KJgiyEWxP34Iw+ZOI=; b=OyX8MuNvfMozqpjcWk85AijY5aGyCBnJ+ElHglWl19+arEUmY2zSi/hOQI73ILV5/c hM/vKqcAfRjelxp/tfzddetGO8gSlXmfEgrYICHsyxLFBtLDNwCy6jyTtLF4maK8Y2Ox 637QHArHJeamZp7+cQheJX5gnLcrUnK694X5vJPQzKHqkD3tKHUGkyqtCPWAyoIe0/m3 PyVMzInd+JWvTSQa9Plw/HRaAwwPH214WBhQnkgXPn8VQBZuYdtXgIYqxmsI8XaeobH5 EVGFcPq4Z6PybieiNqHuEmGfkGXi/8gSd/aQuyTzJ14SQWy8d5xauxyDA4+hUOZeO3i9 qUqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3846hpA0VZMszmYc1Od49f4w97KJgiyEWxP34Iw+ZOI=; b=HB/lhqiSBTBfCwgFfrMZY0fW8zy6EEjJ8ObADreOtSRanMOum30jDheJ3byP6W2PRe clVlnXjvlJB5//9l6nOG1PEdQwFJqg22ehgaGQlCD4V4RZBlCj0b3eiY59xSSmhXeRmy 4Jn+xMUCJ37+K9ItgU6JYK+i3O7UF0AkicxGcepZWIKXYUUQUGcRWfT+PqxKMHn+NeD6 E+a/a5Zx6GTrTKxkA6+DaRfuE23rGopQR9W/FTa7YDWkeIUrxbfAsGYw47JNoOaOUytL wa6xQCeIWa4leLMRFbj+0Hrl/QmhNY+IxyyUEAx8NX8/UO+l1qLOeLePkTPe5+huxbJp gJdw== X-Gm-Message-State: APjAAAUi6LkCnnNXAUtDrhurbvMI3GwG5OPffp4zY0xgz6ECKm1tasdN z7MUSLwXGxLMPSfx1IT+QLs= X-Google-Smtp-Source: APXvYqxiEfQUfycp8WtTaBUuBjs1RcNwjRJBotfEUd51P4MlDVWY5N1voIp3VdWZ9thnCsPEH/s33g== X-Received: by 2002:a5d:6189:: with SMTP id j9mr3534497wru.151.1558807905134; Sat, 25 May 2019 11:11:45 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:44 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 01/14] pwm: meson: unify the parameter list of meson_pwm_{enable, disable} Date: Sat, 25 May 2019 20:11:20 +0200 Message-Id: <20190525181133.4875-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This is a preparation for a future cleanup. Pass struct pwm_device instead of passing the individual values required by each function as these can be obtained for each struct pwm_device instance. As a nice side-effect the driver now uses "switch (pwm->hwpwm)" everywhere. Before some functions used "switch (id)" while others used "switch (pwm->hwpwm)". No functional changes. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 5fef7e925282..3fbbc4128ce8 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -183,15 +183,14 @@ static int meson_pwm_calc(struct meson_pwm *meson, return 0; } -static void meson_pwm_enable(struct meson_pwm *meson, - struct meson_pwm_channel *channel, - unsigned int id) +static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm) { + struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); u32 value, clk_shift, clk_enable, enable; unsigned int offset; unsigned long flags; - switch (id) { + switch (pwm->hwpwm) { case 0: clk_shift = MISC_A_CLK_DIV_SHIFT; clk_enable = MISC_A_CLK_EN; @@ -228,12 +227,12 @@ static void meson_pwm_enable(struct meson_pwm *meson, spin_unlock_irqrestore(&meson->lock, flags); } -static void meson_pwm_disable(struct meson_pwm *meson, unsigned int id) +static void meson_pwm_disable(struct meson_pwm *meson, struct pwm_device *pwm) { u32 value, enable; unsigned long flags; - switch (id) { + switch (pwm->hwpwm) { case 0: enable = MISC_A_EN; break; @@ -266,7 +265,7 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return -EINVAL; if (!state->enabled) { - meson_pwm_disable(meson, pwm->hwpwm); + meson_pwm_disable(meson, pwm); channel->state.enabled = false; return 0; @@ -293,7 +292,7 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, } if (state->enabled && !channel->state.enabled) { - meson_pwm_enable(meson, channel, pwm->hwpwm); + meson_pwm_enable(meson, pwm); channel->state.enabled = true; } From patchwork Sat May 25 18:11:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105396 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="nHZYDf8Y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDY2Xmvz9s3Z for ; Sun, 26 May 2019 04:13:01 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727442AbfEYSLv (ORCPT ); Sat, 25 May 2019 14:11:51 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:40735 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727368AbfEYSLs (ORCPT ); Sat, 25 May 2019 14:11:48 -0400 Received: by mail-wm1-f67.google.com with SMTP id 15so12045788wmg.5; Sat, 25 May 2019 11:11:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ore1r+dKR4AsT7KxL88Hg8/dGPX/2Y8Acm9/4eCEojE=; b=nHZYDf8YaoMbqMOwxPqAgeNXKRos+cq9aefZf6p10ZPPH5Do6B89b2LgjGxiVvBQWU equJR9FChOuFY1BUIzW+60NrCl9iRiWpR0nFeX3lSwu4xUquFzktcMjwH052JbxmK9i8 Fi1/FKNVoUCx5DZywgRWIgq7MLSK5srRzuOKI9fazBPplvA7T/naIrtgrDYRlF+N7Nzs aVLkFmy73N9q9ZE/IirHHTygjvvMinjKugjGL8ydk7hrdaJRPi3K+/CaMlfEh5dphQJZ QcdlMhj7/wUUAwSP7sy6w9+msWy0qEFbMkwTOO7M7e0CiiOxTI5sqNxGrA8pBLOLYMB+ 3YWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ore1r+dKR4AsT7KxL88Hg8/dGPX/2Y8Acm9/4eCEojE=; b=KvNPbVYVl2Wv46V1tpSn1xAfHflsA5yp/pMskTO8UVpgyEwWwpUkryKT4G/vCmfQw+ DmEjVuUp1/WTMcus1xD9VdGSpQsnNw+KT8IdyaeeQyWbsT243uNtQ5f4pa3M0JErVp/b 1AGgZL6giIC+7AAlaIMdx8LDqHcNAIzmjl9tcA1RcqerjjFIa3Vle+zUN/BKf7ZgMqUn RhwmgeQb5ZR33U2rsrjRquQuxWcWnfaxc89cg+puvxqEbYLzWlTaZVxdlOYthqXiBSbC o1BBtI6d0tq6dfmEgWwnccV0xeFCESo5FrXzH9zXv2rmrQ3u9yHjzVALzKGdv8/XuGnN Exlw== X-Gm-Message-State: APjAAAW+Of2ZfQYOrODzoGMiPgmdqsUKfJKKT1v2PDgPMRw3A05qvP64 pVxsQwtUwNmAHcBanD7/56I= X-Google-Smtp-Source: APXvYqy0bTm4jI4EyxEEibvtqTUC/09sCjBxlHpiBVsIbHD2fHjksgEWT1NhF5dHYSHrEwXtHO0wmw== X-Received: by 2002:a7b:c34b:: with SMTP id l11mr7581726wmj.69.1558807906172; Sat, 25 May 2019 11:11:46 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:45 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 02/14] pwm: meson: use devm_clk_get_optional() to get the input clock Date: Sat, 25 May 2019 20:11:21 +0200 Message-Id: <20190525181133.4875-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Simplify the code which fetches the input clock for a PWM channel by using devm_clk_get_optional(). This comes with a small functional change: previously all errors except EPROBE_DEFER were ignored. Now all other errors are also treated as errors. If no input clock is present devm_clk_get_optional() will return NULL instead of an error which matches the behavior of the old code. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 3fbbc4128ce8..35b38c7201c3 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -474,14 +474,9 @@ static int meson_pwm_init_channels(struct meson_pwm *meson, snprintf(name, sizeof(name), "clkin%u", i); - channel->clk_parent = devm_clk_get(dev, name); - if (IS_ERR(channel->clk_parent)) { - err = PTR_ERR(channel->clk_parent); - if (err == -EPROBE_DEFER) - return err; - - channel->clk_parent = NULL; - } + channel->clk_parent = devm_clk_get_optional(dev, name); + if (IS_ERR(channel->clk_parent)) + return PTR_ERR(channel->clk_parent); } return 0; From patchwork Sat May 25 18:11:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105384 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="HOmH0HDk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBCD3Rf8z9s3Z for ; Sun, 26 May 2019 04:11:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727404AbfEYSLu (ORCPT ); Sat, 25 May 2019 14:11:50 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:38909 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727087AbfEYSLt (ORCPT ); Sat, 25 May 2019 14:11:49 -0400 Received: by mail-wm1-f67.google.com with SMTP id t5so12065079wmh.3; Sat, 25 May 2019 11:11:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n+PNcF82aHvSsVWjJ6xxGU5P+zv9rDQAJYSA2FkuCyI=; b=HOmH0HDkOr7SXnhIcKjEbMv5hPMaXwl9juWT/B/W2aqGGjOVQIs7AHYGMWCPwm/t4e Y9sFFjPKvWUkZvJs9lBPO5VekrHnjKFfFYeVP/x87C9QTOtgKpc3iSgm0lbbQVFazFWh YTvBXhbKt3wpBTV6JUp+0QMqVAOTiQeHQh1DUiSASdV5iLuuDjO5x3IoBXRBowoZ1gm0 Ab+rr6jnRMxNrVPd5gfDG9V9RrQTDjfUiUO8spS2+HSu+89X0Kr4sQGBnC8VsoZ5UI+2 wNxBUUSFXZCqPQfH61jVjEN7AKzhyzw1XmvSIfkW2lnTwukcYpWUgZFex6esZi28j4Xy XERA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=n+PNcF82aHvSsVWjJ6xxGU5P+zv9rDQAJYSA2FkuCyI=; b=W5FOlR1Sy/FLo2OOZxmbnsw2chLw2RiYEbcX1PiE3G/V+ho3ejYhQ/vGreuvApL2eq 2Y2prSUXl/2rHckaQ7TKAlpymelzbTKiHz46oZ+HsSANTJZvo2A9FFee6SAf27zYB5aX d1ft4zJUwhi3wQJ3MD1cjmUR6Z6t8D0fbzrF+FYDKBO9Yhi6R1cbck7IDtpid459vyZZ ftPLbgcYmEaLXw5o5UTvXSr+MZRf2SzVM+xwMZTgLFh8Q0blj+MHhELVJFSabuwivaMC eRKe4HxQXNGLLGQyxoCeUYHHTCYPjX4YsSfVSe8X05JeUSAy+/5wwInCJQf1BCEo6hJ4 Kp/A== X-Gm-Message-State: APjAAAXprPih46kjDdOIzrlb+B8ITZAjOt3EVU5oyZ9Pmmu2LdIBdBKF 1GsHs/WwcnwCqTWgxii2Z9g= X-Google-Smtp-Source: APXvYqxoBz1yNBbK0nsIKKxkJ6BPRwZafE9Jtj2RJXjDTEjHPteUwQIKRJc58Tq/sxZidVq4F1k8eA== X-Received: by 2002:a1c:cfc9:: with SMTP id f192mr7147926wmg.19.1558807907359; Sat, 25 May 2019 11:11:47 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:46 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 03/14] pwm: meson: use GENMASK and FIELD_PREP for the lo and hi values Date: Sat, 25 May 2019 20:11:22 +0200 Message-Id: <20190525181133.4875-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org meson_pwm_calc() ensures that "lo" is always less than 16 bits wide (otherwise it would overflow into the "hi" part of the REG_PWM_{A,B} register). Use GENMASK and FIELD_PREP for the lo and hi values to make it easier to spot how wide these are internally. Additionally this is a preparation step for the .get_state() implementation where the GENMASK() for lo and hi becomes handy because it can be used with FIELD_GET() to extract the values from the register REG_PWM_{A,B} register. No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 35b38c7201c3..c62a3ac924d0 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -5,6 +5,8 @@ * Copyright (C) 2014 Amlogic, Inc. */ +#include +#include #include #include #include @@ -20,7 +22,8 @@ #define REG_PWM_A 0x0 #define REG_PWM_B 0x4 -#define PWM_HIGH_SHIFT 16 +#define PWM_LOW_MASK GENMASK(15, 0) +#define PWM_HIGH_MASK GENMASK(31, 16) #define REG_MISC_AB 0x8 #define MISC_B_CLK_EN BIT(23) @@ -217,7 +220,8 @@ static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm) value |= clk_enable; writel(value, meson->base + REG_MISC_AB); - value = (channel->hi << PWM_HIGH_SHIFT) | channel->lo; + value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) | + FIELD_PREP(PWM_LOW_MASK, channel->lo); writel(value, meson->base + offset); value = readl(meson->base + REG_MISC_AB); From patchwork Sat May 25 18:11:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105385 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="VnKfwh0b"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBCF1MbNz9s55 for ; Sun, 26 May 2019 04:11:53 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727444AbfEYSLw (ORCPT ); Sat, 25 May 2019 14:11:52 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:36796 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727386AbfEYSLu (ORCPT ); Sat, 25 May 2019 14:11:50 -0400 Received: by mail-wm1-f65.google.com with SMTP id v22so4816450wml.1; Sat, 25 May 2019 11:11:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NTuYf2SN++XrzgOo/LowMD7xHt6KeFYnBiXdbjNn1Mc=; b=VnKfwh0bGoV85geiehf3lF7Ro/8ZshaPwzuqppSHFpjUxlW8nxcaz1HWoxyvGuTRHz 8obIqVm7h0WsDAyI+PoOHI1yEHv+a7fGSkrf5sUrJhHMhyjVZtFCB2VVfe7dg6cEofUR dF3Yp4zbu3MiZn2VSAbwd77ukSrzUO/HqTAvT+lLvwLrqfIQbXDT91zKKyBLxuKgXCgK bbaGpLyRRMeYKs3Vm9/fMUZs+8EP+AKTGTAGqrh8Wj6NObw8RVZWCVpuoQZDIuJJsLRa kiK7rS/YY0lojeU0Pe3Kps2/+Oxqbt+LcAy7z44txeLaCTs7d72Dhg8lTx2lWyCosVIX XHLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NTuYf2SN++XrzgOo/LowMD7xHt6KeFYnBiXdbjNn1Mc=; b=NTN0LFYuALnzC6EFAsj/rm2UTe1uh2U52beMbGvLJlRuHsCeiN8XeJmfy9eFSwpiDi q16m90WugxGvQfDNEWe9sMfq8JDSspWlz43QVGiV2nqMainT/6q6bV3C9x4DzsEL6y3J nRFEMYU5NTG+O3qZS5gDzOdJE3hjMCIjbtD77GFTPAnmN5fcoUYnhvmzhTijSMulLZTM 91L4EGVerzQzdIiEK+lGX+KALNTsRkN1z7P/who5teh3t8H5k/T9jhT0sfpewxzommke TxsUfOajrta/8Y67hWj72qM5CLZNXH3FTbaXSuH/ap4mVBdFhiyl4efWLmwD68C/rSkj X+IA== X-Gm-Message-State: APjAAAV6BxAFnl3iM1SeErM0M6RIhwBLSmAH7IL2tX5qKlwzj+BeWpHz A9CtQcE4XldBb0smy3tEnWc= X-Google-Smtp-Source: APXvYqxzNHr1KHGccEbFz4UmNfvsgrRoH6NuLmip3pRZHRxdOtQ8QuPVBMnJaq2uWniu0zSEdRHOgA== X-Received: by 2002:a1c:e009:: with SMTP id x9mr4094446wmg.117.1558807908370; Sat, 25 May 2019 11:11:48 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:47 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 04/14] pwm: meson: change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASK Date: Sat, 25 May 2019 20:11:23 +0200 Message-Id: <20190525181133.4875-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org MISC_CLK_SEL_WIDTH is only used in one place where it's converted into a bit-mask. Rename and change the macro to be a bit-mask so that conversion is not needed anymore. No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index c62a3ac924d0..84b28ba0f903 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -33,7 +33,7 @@ #define MISC_A_CLK_DIV_SHIFT 8 #define MISC_B_CLK_SEL_SHIFT 6 #define MISC_A_CLK_SEL_SHIFT 4 -#define MISC_CLK_SEL_WIDTH 2 +#define MISC_CLK_SEL_MASK 0x3 #define MISC_B_EN BIT(1) #define MISC_A_EN BIT(0) @@ -463,7 +463,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson, channel->mux.reg = meson->base + REG_MISC_AB; channel->mux.shift = mux_reg_shifts[i]; - channel->mux.mask = BIT(MISC_CLK_SEL_WIDTH) - 1; + channel->mux.mask = MISC_CLK_SEL_MASK; channel->mux.flags = 0; channel->mux.lock = &meson->lock; channel->mux.table = NULL; From patchwork Sat May 25 18:11:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105394 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="unEoYEq1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDR6KR1z9s3Z for ; Sun, 26 May 2019 04:12:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727447AbfEYSLw (ORCPT ); Sat, 25 May 2019 14:11:52 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:51975 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727401AbfEYSLv (ORCPT ); Sat, 25 May 2019 14:11:51 -0400 Received: by mail-wm1-f66.google.com with SMTP id f10so4900720wmb.1; Sat, 25 May 2019 11:11:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Nn1lq5gWQykJ2fa3C4+FTZu1w/wv0i+nYPKx90V4RFM=; b=unEoYEq163JDPHz4GpYBoATDRMh+15QMqfxr+AHKhSvMSgwptHsRNKR8UMzbNUWkdb wsMB9PVohIZ05gyBMxH175ByVXPLK/OjYoTxNqwR/LChOSFJ285vN3v+1Wvt657xB39l Wjgpaq6C9cO0arrDdmKnWp1hljFYGJ+vpgtx6EB3qPeeFUz0+iccx7ebfYXdkfBqnU+3 PvInFGbDkBhjdOoQXLxa+Mxu9XMB+tA1YkxYf8pIwUIU/XV0naV8hSP3lMpiUCW29Fhl rhUOg3DvFJcIKHv6K2ktuXXOt7I/B5/f2oyx+5SDsa5yFt+946Q5icY0PvzXoQ54vJnc 8iKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Nn1lq5gWQykJ2fa3C4+FTZu1w/wv0i+nYPKx90V4RFM=; b=TNAkWzedvVq2rzYRc1FmS3JXXEcc+UwSoXhZoadmR6ZR/EEG91lS7kLnfQU+UVOICW MCRXaK4s+XTWiEQ8gegAu+oBJFZFEyqQHcSnUmBtZ5V5Mv8C7px0aTLDDEGiDjBBG0jI 98qpnlCNGLBgY92fOuyHl2Zbj6eU1ijwW0WAAA+83zgAb4qP/hJ/3knCfhKnhxO4YH2D giRC4U4uQ+ReVPMTnHUEU2qVUnBEf6r6efTrjNBUvGjAKEHkhKBhNNyZAiXELRGmhDst j/2yN2qe/A+qlN9pcSr78tSte6mU7ouMgpM/C6asv0+b3N/ndIFc3uq+9QWTjHkOD9Fg cRyA== X-Gm-Message-State: APjAAAXkKIKRB2bgHe1k9SjYuuCGBIqdM3goFk7CVqeHxq9shfOeNLfQ BjMC/YldsddbdxsggExvX4w= X-Google-Smtp-Source: APXvYqyArwVBOnsm4XmcG01yPAMcVx9BefPdZ5RdtyXTzaWpsVjGIOfb+gC8dfMpIwqaxfR6tXifMg== X-Received: by 2002:a1c:eb0c:: with SMTP id j12mr19669283wmh.55.1558807909296; Sat, 25 May 2019 11:11:49 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:48 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 05/14] pwm: meson: don't duplicate the polarity internally Date: Sat, 25 May 2019 20:11:24 +0200 Message-Id: <20190525181133.4875-6-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Let meson_pwm_calc() use the polarity from struct pwm_state directly. This removes a level of indirection where meson_pwm_apply() first had to set a driver-internal inverter mask which was then only used by meson_pwm_calc(). Instead of adding the polarity as parameter to meson_pwm_calc() switch to struct pwm_state directly to make it easier to see where the parameters are actually coming from. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 84b28ba0f903..39ea119add7b 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -63,7 +63,6 @@ struct meson_pwm { struct pwm_chip chip; const struct meson_pwm_data *data; void __iomem *base; - u8 inverter_mask; /* * Protects register (write) access to the REG_MISC_AB register * that is shared between the two PWMs. @@ -116,14 +115,17 @@ static void meson_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) } static int meson_pwm_calc(struct meson_pwm *meson, - struct meson_pwm_channel *channel, unsigned int id, - unsigned int duty, unsigned int period) + struct meson_pwm_channel *channel, + struct pwm_state *state) { - unsigned int pre_div, cnt, duty_cnt; + unsigned int duty, period, pre_div, cnt, duty_cnt; unsigned long fin_freq = -1; u64 fin_ps; - if (~(meson->inverter_mask >> id) & 0x1) + duty = state->duty_cycle; + period = state->period; + + if (state->polarity == PWM_POLARITY_INVERSED) duty = period - duty; if (period == channel->state.period && @@ -278,15 +280,7 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->period != channel->state.period || state->duty_cycle != channel->state.duty_cycle || state->polarity != channel->state.polarity) { - if (state->polarity != channel->state.polarity) { - if (state->polarity == PWM_POLARITY_NORMAL) - meson->inverter_mask |= BIT(pwm->hwpwm); - else - meson->inverter_mask &= ~BIT(pwm->hwpwm); - } - - err = meson_pwm_calc(meson, channel, pwm->hwpwm, - state->duty_cycle, state->period); + err = meson_pwm_calc(meson, channel, state); if (err < 0) return err; @@ -520,7 +514,6 @@ static int meson_pwm_probe(struct platform_device *pdev) meson->chip.of_pwm_n_cells = 3; meson->data = of_device_get_match_data(&pdev->dev); - meson->inverter_mask = BIT(meson->chip.npwm) - 1; channels = devm_kcalloc(&pdev->dev, meson->chip.npwm, sizeof(*channels), GFP_KERNEL); From patchwork Sat May 25 18:11:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105395 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="VptW1X7h"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDS3vjYz9s5c for ; Sun, 26 May 2019 04:12:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727692AbfEYSMz (ORCPT ); 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:49 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 06/14] pwm: meson: pass struct pwm_device to meson_pwm_calc() Date: Sat, 25 May 2019 20:11:25 +0200 Message-Id: <20190525181133.4875-7-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org meson_pwm_calc() is the last function that accepts a struct meson_pwm_channel. meson_pwm_enable(), meson_pwm_disable() and meson_pwm_apply() for example are all taking a struct pwm_device as parameter. When they need the struct meson_pwm_channel these functions simply call pwm_get_chip_data() internally. Make meson_pwm_calc() consistent with the other functions in the meson-pwm driver by passing struct pwm_device to it as well. The value of the "id" parameter is actually pwm->hwpwm, but the driver never read the "id" parameter, which is why there's no replacement for it in the new code. No functional changes. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 39ea119add7b..d6eb4d04d5c9 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -114,10 +114,10 @@ static void meson_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(channel->clk); } -static int meson_pwm_calc(struct meson_pwm *meson, - struct meson_pwm_channel *channel, +static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, struct pwm_state *state) { + struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); unsigned int duty, period, pre_div, cnt, duty_cnt; unsigned long fin_freq = -1; u64 fin_ps; @@ -280,7 +280,7 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->period != channel->state.period || state->duty_cycle != channel->state.duty_cycle || state->polarity != channel->state.polarity) { - err = meson_pwm_calc(meson, channel, state); + err = meson_pwm_calc(meson, pwm, state); if (err < 0) return err; From patchwork Sat May 25 18:11:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105393 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="OjPmG7u3"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDP3lkBz9s3Z for ; Sun, 26 May 2019 04:12:53 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727461AbfEYSLx (ORCPT ); Sat, 25 May 2019 14:11:53 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:34463 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727445AbfEYSLx (ORCPT ); Sat, 25 May 2019 14:11:53 -0400 Received: by mail-wm1-f67.google.com with SMTP id e19so4164408wme.1; Sat, 25 May 2019 11:11:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vh14UlgAUkIljLzMtiNlC8F9kkg89y0/Qk0nPY9Q0wE=; b=OjPmG7u32W9bxtU+VPzPQ2qz0WmWIeBCLlAPE1sPJKMDIcVNrBXNHO8lsnVIdo9y45 h6F8//QMAxceKMyJKGFM9RRrKYieWqB7w3GLxVrX0EvdS26Gg7eWJXpax4v8lqNKr1FA KjRZpJpET0Xxy+cqpkr5+ggty2RCtjYF/ctI4KryecNx+wtznDh7jGF6XdYApiUT9pLP DfxsTTfB2Nczb7CW7GdDKV1zVu9C9Rm3KsA7V21//c4pfMVUyPfKGSNI76lptF49iBYr AS+gKKFj6HSUB05ukiH7B/yF9mYO6ttVAMaYBidN9uw4bvh2MyR5/j/yudLjq+Pd7yTb NMKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vh14UlgAUkIljLzMtiNlC8F9kkg89y0/Qk0nPY9Q0wE=; b=ENJ9KgaCG2zqOOADd3gQGVjSwix9tPXmhd22kzUZqy3LorlB+7zgk0lBZfxeXcwIFF /j3PHzmMxbSFUslPGrdDXj3uxx4ew4h0ljSVp1NfsWsCYOsdJm9DT/znZJlo26AeO22G gIezgKww10OKMXa3mrU9ZCtGdszKvZP4XKa8K+0sFvBzvcNt2vKBJIRTOgWwAwcnVCvp yct50KOfZmTCMrq2ULi+SOmUa4pTlgXr2Kc/JpQJcRDfJpOyImUn3GawfRG0oKz/Iq9H LstCxw4+kcO20D+VJ7s5+Q8bIU1pQvPC87zi3UyDPZLqwi3nHfEpZuzbLCXQRaRPq9KG 1c7g== X-Gm-Message-State: APjAAAUyY/ScbrL2qefnWUlkpp3pwL+49J3JXP4pCRFBTFpYYGSy4fPF AQEHkpiYLk456VoPBG2QtRY= X-Google-Smtp-Source: APXvYqxA7x6dY6V0ULEhoWOYWuPm0XWiLfS7y9OgJaQ+D2//vYFJ/epu6mol03rolVLlg+EqXN3MIw== X-Received: by 2002:a1c:b789:: with SMTP id h131mr4004748wmf.71.1558807911278; Sat, 25 May 2019 11:11:51 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:50 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 07/14] pwm: meson: add the meson_pwm_channel data to struct meson_pwm Date: Sat, 25 May 2019 20:11:26 +0200 Message-Id: <20190525181133.4875-8-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Make struct meson_pwm_channel accessible from struct meson_pwm. PWM core has a limitation: per-channel data can only be set after pwmchip_add() is called. However, pwmchip_add() internally calls pwm_ops.get_state(). If pwm_ops.get_state() needs access to the per-channel data it has to obtain it from struct pwm_chip and struct pwm_device's hwpwm information. Add a struct meson_pwm_channel for each PWM channel to struct meson_pwm so the pwm_ops.get_state() callback can be implemented as it needs access to the clock from struct meson_pwm_channel. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index d6eb4d04d5c9..d1718f54ecec 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -37,6 +37,8 @@ #define MISC_B_EN BIT(1) #define MISC_A_EN BIT(0) +#define MESON_NUM_PWMS 2 + static const unsigned int mux_reg_shifts[] = { MISC_A_CLK_SEL_SHIFT, MISC_B_CLK_SEL_SHIFT @@ -62,6 +64,7 @@ struct meson_pwm_data { struct meson_pwm { struct pwm_chip chip; const struct meson_pwm_data *data; + struct meson_pwm_channel channels[MESON_NUM_PWMS]; void __iomem *base; /* * Protects register (write) access to the REG_MISC_AB register @@ -435,8 +438,7 @@ static const struct of_device_id meson_pwm_matches[] = { }; MODULE_DEVICE_TABLE(of, meson_pwm_matches); -static int meson_pwm_init_channels(struct meson_pwm *meson, - struct meson_pwm_channel *channels) +static int meson_pwm_init_channels(struct meson_pwm *meson) { struct device *dev = meson->chip.dev; struct clk_init_data init; @@ -445,7 +447,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson, int err; for (i = 0; i < meson->chip.npwm; i++) { - struct meson_pwm_channel *channel = &channels[i]; + struct meson_pwm_channel *channel = &meson->channels[i]; snprintf(name, sizeof(name), "%s#mux%u", dev_name(dev), i); @@ -480,18 +482,16 @@ static int meson_pwm_init_channels(struct meson_pwm *meson, return 0; } -static void meson_pwm_add_channels(struct meson_pwm *meson, - struct meson_pwm_channel *channels) +static void meson_pwm_add_channels(struct meson_pwm *meson) { unsigned int i; for (i = 0; i < meson->chip.npwm; i++) - pwm_set_chip_data(&meson->chip.pwms[i], &channels[i]); + pwm_set_chip_data(&meson->chip.pwms[i], &meson->channels[i]); } static int meson_pwm_probe(struct platform_device *pdev) { - struct meson_pwm_channel *channels; struct meson_pwm *meson; struct resource *regs; int err; @@ -509,18 +509,13 @@ static int meson_pwm_probe(struct platform_device *pdev) meson->chip.dev = &pdev->dev; meson->chip.ops = &meson_pwm_ops; meson->chip.base = -1; - meson->chip.npwm = 2; + meson->chip.npwm = MESON_NUM_PWM; meson->chip.of_xlate = of_pwm_xlate_with_flags; meson->chip.of_pwm_n_cells = 3; meson->data = of_device_get_match_data(&pdev->dev); - channels = devm_kcalloc(&pdev->dev, meson->chip.npwm, - sizeof(*channels), GFP_KERNEL); - if (!channels) - return -ENOMEM; - - err = meson_pwm_init_channels(meson, channels); + err = meson_pwm_init_channels(meson); if (err < 0) return err; @@ -530,7 +525,7 @@ static int meson_pwm_probe(struct platform_device *pdev) return err; } - meson_pwm_add_channels(meson, channels); + meson_pwm_add_channels(meson); platform_set_drvdata(pdev, meson); From patchwork Sat May 25 18:11:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105386 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:52 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 08/14] pwm: meson: add the per-channel register offsets and bits in a struct Date: Sat, 25 May 2019 20:11:27 +0200 Message-Id: <20190525181133.4875-9-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Introduce struct meson_pwm_channel_data which contains the per-channel offsets for the PWM register and REG_MISC_AB bits. Replace the existing switch (pwm->hwpwm) statements with an access to the new struct. This simplifies the code and will make it easier to implement pwm_ops.get_state() because the switch-case which all per-channel registers and offsets (as previously implemented in meson_pwm_enable()) doesn't have to be duplicated. No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 92 ++++++++++++++++------------------------- 1 file changed, 35 insertions(+), 57 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index d1718f54ecec..ac7e188155fd 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -39,9 +39,27 @@ #define MESON_NUM_PWMS 2 -static const unsigned int mux_reg_shifts[] = { - MISC_A_CLK_SEL_SHIFT, - MISC_B_CLK_SEL_SHIFT +static struct meson_pwm_channel_data { + u8 reg_offset; + u8 clk_sel_shift; + u8 clk_div_shift; + u32 clk_en_mask; + u32 pwm_en_mask; +} meson_pwm_per_channel_data[MESON_NUM_PWMS] = { + { + .reg_offset = REG_PWM_A, + .clk_sel_shift = MISC_A_CLK_SEL_SHIFT, + .clk_div_shift = MISC_A_CLK_DIV_SHIFT, + .clk_en_mask = MISC_A_CLK_EN, + .pwm_en_mask = MISC_A_EN, + }, + { + .reg_offset = REG_PWM_B, + .clk_sel_shift = MISC_B_CLK_SEL_SHIFT, + .clk_div_shift = MISC_B_CLK_DIV_SHIFT, + .clk_en_mask = MISC_B_CLK_EN, + .pwm_en_mask = MISC_B_EN, + } }; struct meson_pwm_channel { @@ -194,43 +212,26 @@ static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm) { struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); - u32 value, clk_shift, clk_enable, enable; - unsigned int offset; + struct meson_pwm_channel_data *channel_data; unsigned long flags; + u32 value; - switch (pwm->hwpwm) { - case 0: - clk_shift = MISC_A_CLK_DIV_SHIFT; - clk_enable = MISC_A_CLK_EN; - enable = MISC_A_EN; - offset = REG_PWM_A; - break; - - case 1: - clk_shift = MISC_B_CLK_DIV_SHIFT; - clk_enable = MISC_B_CLK_EN; - enable = MISC_B_EN; - offset = REG_PWM_B; - break; - - default: - return; - } + channel_data = &meson_pwm_per_channel_data[pwm->hwpwm]; spin_lock_irqsave(&meson->lock, flags); value = readl(meson->base + REG_MISC_AB); - value &= ~(MISC_CLK_DIV_MASK << clk_shift); - value |= channel->pre_div << clk_shift; - value |= clk_enable; + value &= ~(MISC_CLK_DIV_MASK << channel_data->clk_div_shift); + value |= channel->pre_div << channel_data->clk_div_shift; + value |= channel_data->clk_en_mask; writel(value, meson->base + REG_MISC_AB); value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) | FIELD_PREP(PWM_LOW_MASK, channel->lo); - writel(value, meson->base + offset); + writel(value, meson->base + channel_data->reg_offset); value = readl(meson->base + REG_MISC_AB); - value |= enable; + value |= channel_data->pwm_en_mask; writel(value, meson->base + REG_MISC_AB); spin_unlock_irqrestore(&meson->lock, flags); @@ -238,26 +239,13 @@ static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm) static void meson_pwm_disable(struct meson_pwm *meson, struct pwm_device *pwm) { - u32 value, enable; unsigned long flags; - - switch (pwm->hwpwm) { - case 0: - enable = MISC_A_EN; - break; - - case 1: - enable = MISC_B_EN; - break; - - default: - return; - } + u32 value; spin_lock_irqsave(&meson->lock, flags); value = readl(meson->base + REG_MISC_AB); - value &= ~enable; + value &= ~meson_pwm_per_channel_data[pwm->hwpwm].pwm_en_mask; writel(value, meson->base + REG_MISC_AB); spin_unlock_irqrestore(&meson->lock, flags); @@ -309,18 +297,7 @@ static void meson_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, if (!state) return; - switch (pwm->hwpwm) { - case 0: - mask = MISC_A_EN; - break; - - case 1: - mask = MISC_B_EN; - break; - - default: - return; - } + mask = meson_pwm_per_channel_data[pwm->hwpwm].pwm_en_mask; value = readl(meson->base + REG_MISC_AB); state->enabled = (value & mask) != 0; @@ -458,7 +435,8 @@ static int meson_pwm_init_channels(struct meson_pwm *meson) init.num_parents = meson->data->num_parents; channel->mux.reg = meson->base + REG_MISC_AB; - channel->mux.shift = mux_reg_shifts[i]; + channel->mux.shift = + meson_pwm_per_channel_data[i].clk_sel_shift; channel->mux.mask = MISC_CLK_SEL_MASK; channel->mux.flags = 0; channel->mux.lock = &meson->lock; @@ -509,7 +487,7 @@ static int meson_pwm_probe(struct platform_device *pdev) meson->chip.dev = &pdev->dev; meson->chip.ops = &meson_pwm_ops; meson->chip.base = -1; - meson->chip.npwm = MESON_NUM_PWM; + meson->chip.npwm = MESON_NUM_PWMS; meson->chip.of_xlate = of_pwm_xlate_with_flags; meson->chip.of_pwm_n_cells = 3; From patchwork Sat May 25 18:11:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105392 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="O9vmAF+k"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDL46QZz9s3l for ; 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:54 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 09/14] pwm: meson: move pwm_set_chip_data() to meson_pwm_request() Date: Sat, 25 May 2019 20:11:28 +0200 Message-Id: <20190525181133.4875-10-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org All existing PWM drivers (except pwm-meson and two other ones) call pwm_set_chip_data() from their pwm_ops.request() callback. Now that we can access the struct meson_pwm_channel from struct meson_pwm we can do the same. Move the call to pwm_set_chip_data() to meson_pwm_request() and drop the custom meson_pwm_add_channels(). This makes the implementation consistent with other drivers and makes it slightly more obvious thatpwm_get_chip_data() cannot be used from pwm_ops.get_state() (because that's called by the PWM core before pwm_ops.request()). No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index ac7e188155fd..27915d6475e3 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -98,12 +98,16 @@ static inline struct meson_pwm *to_meson_pwm(struct pwm_chip *chip) static int meson_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) { - struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); + struct meson_pwm *meson = to_meson_pwm(chip); + struct meson_pwm_channel *channel; struct device *dev = chip->dev; int err; - if (!channel) - return -ENODEV; + channel = pwm_get_chip_data(pwm); + if (channel) + return 0; + + channel = &meson->channels[pwm->hwpwm]; if (channel->clk_parent) { err = clk_set_parent(channel->clk, channel->clk_parent); @@ -124,7 +128,7 @@ static int meson_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) chip->ops->get_state(chip, pwm, &channel->state); - return 0; + return pwm_set_chip_data(pwm, channel); } static void meson_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) @@ -460,14 +464,6 @@ static int meson_pwm_init_channels(struct meson_pwm *meson) return 0; } -static void meson_pwm_add_channels(struct meson_pwm *meson) -{ - unsigned int i; - - for (i = 0; i < meson->chip.npwm; i++) - pwm_set_chip_data(&meson->chip.pwms[i], &meson->channels[i]); -} - static int meson_pwm_probe(struct platform_device *pdev) { struct meson_pwm *meson; @@ -503,8 +499,6 @@ static int meson_pwm_probe(struct platform_device *pdev) return err; } - meson_pwm_add_channels(meson); - platform_set_drvdata(pdev, meson); return 0; From patchwork Sat May 25 18:11:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105390 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="RWIwPiKW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBDC4YZmz9s3Z for ; Sun, 26 May 2019 04:12:43 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727510AbfEYSMd (ORCPT ); Sat, 25 May 2019 14:12:33 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:36244 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727593AbfEYSL6 (ORCPT ); Sat, 25 May 2019 14:11:58 -0400 Received: by mail-wr1-f66.google.com with SMTP id s17so12977614wru.3; Sat, 25 May 2019 11:11:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Zy3igJq07cYQSMxFomj95OIsp+cg4RA7m3SIK+lG8bU=; b=RWIwPiKWpW+8hhJ064VFfHfgeJUrYzzyTSpEwMVt2y7w5U1LDQPlCjNTLk0z5GqVmX /SvB9jaw4CudwdT9ej5tHOVNWB+LrVGJmUHbuucV4a3Tzn5m5vh2p8+CsaSL65BEcMbp 2zOonGmORz1V77vECNFInY1MgMO1n8324iCp8p3wCZJHICJnxGj9d8sdZUOcM08VRniZ 5LTEf8MAGuJMQzDDMK9ajNTMPKeLiao+h94sBiV1W7mdtS9QoFylcrxArsri3ZIWScZd 1SFi/Puqi0dTTk4wu0k/ujt+tbt3MPP90RZsZo2lYCdLFT04piE4G7jJW+ZJ49ofrv4A NIxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Zy3igJq07cYQSMxFomj95OIsp+cg4RA7m3SIK+lG8bU=; b=s0fS8H25i6bTbcvpC18KqWRGMR5eakyac58zQ8YN115cy818BzwZfxVxX/RW9XFnJu llHhx2Ib95SwKnVZFbp405tooJ2GfwT4oRgDTGJ5MNgJeG0cl4IP8or/Fpmp297vaY+9 0hdk2xBadiG0fr+PB4ivPkawPBvW4WHB2SY91qDxjfwkWy8mJL7SwfSr+F6DzY+bJA79 nVNORwEIzVXYsggSJyixREGm/N3iAF8UCfcEaMheVHQG+/vdHONcMeHD9F7opgZGe8Ms INH5bHQ3+6cmRZDE8xHX44w1wa7hTq9CNrGmv+93D2zU/rqNMV4iNY1j5y/Mi9Ssh88K hRFQ== X-Gm-Message-State: APjAAAW1gJru7qvg2yO4LSzdamamQA6KKRknvM2NQHABSll9haCpDEsc g8rv8P1fI78JL1m+eA+WcR0= X-Google-Smtp-Source: APXvYqyGLjQ0zfRugxJ+mFnXR75GhggtBiLimgCtvpXe9134qnfxnS/Gk3IRfijOU6tSHqUDc6AjyQ== X-Received: by 2002:adf:e909:: with SMTP id f9mr3364863wrm.231.1558807915828; Sat, 25 May 2019 11:11:55 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:55 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 10/14] pwm: meson: simplify the calculation of the pre-divider and count Date: Sat, 25 May 2019 20:11:29 +0200 Message-Id: <20190525181133.4875-11-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Replace the loop to calculate the pre-divider and count with two separate div64_u64() calculations. This makes the code easier to read and improves the precision. Two example cases: 1) 32.768kHz LPO clock for the SDIO wifi chip on Khadas VIM clock input: 500MHz (FCLK_DIV4) period: 30518ns duty cycle: 15259ns old algorithm: pre_div=0, cnt=15259 new algorithm: pre_div=0, cnt=15259 (no difference in calculated values) 2) PWM LED on Khadas VIM clock input: 24MHz (XTAL) period: 7812500ns duty cycle: 7812500ns old algorithm: pre_div=2, cnt=62004 new algorithm: pre_div=2, cnt=62500 Using a scope (24MHz sampling rate) shows the actual difference: - old: 7753000ns, off by -59500ns (0.7616%) - new: 7815000ns, off by +2500ns (0.032%) Suggested-by: Uwe Kleine-König Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 27915d6475e3..9afa1e5aaebf 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -145,7 +146,6 @@ static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); unsigned int duty, period, pre_div, cnt, duty_cnt; unsigned long fin_freq = -1; - u64 fin_ps; duty = state->duty_cycle; period = state->period; @@ -164,24 +164,19 @@ static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, } dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq); - fin_ps = (u64)NSEC_PER_SEC * 1000; - do_div(fin_ps, fin_freq); - - /* Calc pre_div with the period */ - for (pre_div = 0; pre_div <= MISC_CLK_DIV_MASK; pre_div++) { - cnt = DIV_ROUND_CLOSEST_ULL((u64)period * 1000, - fin_ps * (pre_div + 1)); - dev_dbg(meson->chip.dev, "fin_ps=%llu pre_div=%u cnt=%u\n", - fin_ps, pre_div, cnt); - if (cnt <= 0xffff) - break; - } + pre_div = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * 0xffffLL); if (pre_div > MISC_CLK_DIV_MASK) { dev_err(meson->chip.dev, "unable to get period pre_div\n"); return -EINVAL; } + cnt = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * (pre_div + 1)); + if (cnt > 0xffff) { + dev_err(meson->chip.dev, "unable to get period cnt\n"); + return -EINVAL; + } + dev_dbg(meson->chip.dev, "period=%u pre_div=%u cnt=%u\n", period, pre_div, cnt); @@ -195,8 +190,8 @@ static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, channel->lo = cnt; } else { /* Then check is we can have the duty with the same pre_div */ - duty_cnt = DIV_ROUND_CLOSEST_ULL((u64)duty * 1000, - fin_ps * (pre_div + 1)); + duty_cnt = div64_u64(fin_freq * (u64)duty, + NSEC_PER_SEC * (pre_div + 1)); if (duty_cnt > 0xffff) { dev_err(meson->chip.dev, "unable to get duty cycle\n"); return -EINVAL; From patchwork Sat May 25 18:11:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105391 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:56 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 11/14] pwm: meson: read the full hardware state in meson_pwm_get_state() Date: Sat, 25 May 2019 20:11:30 +0200 Message-Id: <20190525181133.4875-12-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Update the meson_pwm_get_state() implementation to take care of all information in the registers instead of only reading the "enabled" state. The PWM output is only enabled if two conditions are met: 1. the per-channel clock is enabled 2. the PWM output is enabled Calculate the PWM period and duty cycle using the reverse formula which we already have in meson_pwm_calc() and update struct pwm_state with the results. As result of this /sys/kernel/debug/pwm now shows the PWM state set by the bootloader (or firmware) after booting Linux. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 52 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 9afa1e5aaebf..010212166d5d 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -287,19 +287,65 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } +static unsigned int meson_pwm_cnt_to_ns(struct pwm_chip *chip, + struct pwm_device *pwm, u32 cnt) +{ + struct meson_pwm *meson = to_meson_pwm(chip); + struct meson_pwm_channel *channel; + unsigned long fin_freq; + u32 fin_ns; + + /* to_meson_pwm() can only be used after .get_state() is called */ + channel = &meson->channels[pwm->hwpwm]; + + fin_freq = clk_get_rate(channel->clk); + if (fin_freq == 0) + return 0; + + fin_ns = div_u64(NSEC_PER_SEC, fin_freq); + + return cnt * fin_ns * (channel->pre_div + 1); +} + static void meson_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { struct meson_pwm *meson = to_meson_pwm(chip); - u32 value, mask; + struct meson_pwm_channel_data *channel_data; + struct meson_pwm_channel *channel; + u32 value, tmp; if (!state) return; - mask = meson_pwm_per_channel_data[pwm->hwpwm].pwm_en_mask; + channel = &meson->channels[pwm->hwpwm]; + channel_data = &meson_pwm_per_channel_data[pwm->hwpwm]; value = readl(meson->base + REG_MISC_AB); - state->enabled = (value & mask) != 0; + + tmp = channel_data->pwm_en_mask | channel_data->clk_en_mask; + state->enabled = (value & tmp) == tmp; + + tmp = value >> channel_data->clk_div_shift; + channel->pre_div = FIELD_GET(MISC_CLK_DIV_MASK, tmp); + + value = readl(meson->base + channel_data->reg_offset); + + channel->lo = FIELD_GET(PWM_LOW_MASK, value); + channel->hi = FIELD_GET(PWM_HIGH_MASK, value); + + if (channel->lo == 0) { + state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi); + state->duty_cycle = state->period; + } else if (channel->lo >= channel->hi) { + state->period = meson_pwm_cnt_to_ns(chip, pwm, + channel->lo + channel->hi); + state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, + channel->hi); + } else { + state->period = 0; + state->duty_cycle = 0; + } } static const struct pwm_ops meson_pwm_ops = { From patchwork Sat May 25 18:11:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105389 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="MgUAmTL4"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBD06wZPz9s3Z for ; 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:57 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 12/14] pwm: meson: don't cache struct pwm_state internally Date: Sat, 25 May 2019 20:11:31 +0200 Message-Id: <20190525181133.4875-13-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The PWM core already caches the "current struct pwm_state" as the "current state of the hardware registers" inside struct pwm_device. Drop the struct pwm_state from struct meson_pwm_channel in favour of the struct pwm_state in struct pwm_device. While here also drop any checks based on the pwm_state because the PWM core already takes care of this. No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 25 +------------------------ 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 010212166d5d..900d362ec3c9 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -68,8 +68,6 @@ struct meson_pwm_channel { unsigned int lo; u8 pre_div; - struct pwm_state state; - struct clk *clk_parent; struct clk_mux mux; struct clk *clk; @@ -127,8 +125,6 @@ static int meson_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) return err; } - chip->ops->get_state(chip, pwm, &channel->state); - return pwm_set_chip_data(pwm, channel); } @@ -153,10 +149,6 @@ static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm, if (state->polarity == PWM_POLARITY_INVERSED) duty = period - duty; - if (period == channel->state.period && - duty == channel->state.duty_cycle) - return 0; - fin_freq = clk_get_rate(channel->clk); if (fin_freq == 0) { dev_err(meson->chip.dev, "invalid source clock frequency\n"); @@ -253,7 +245,6 @@ static void meson_pwm_disable(struct meson_pwm *meson, struct pwm_device *pwm) static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { - struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); struct meson_pwm *meson = to_meson_pwm(chip); int err = 0; @@ -262,26 +253,12 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (!state->enabled) { meson_pwm_disable(meson, pwm); - channel->state.enabled = false; - - return 0; - } - - if (state->period != channel->state.period || - state->duty_cycle != channel->state.duty_cycle || - state->polarity != channel->state.polarity) { + } else { err = meson_pwm_calc(meson, pwm, state); if (err < 0) return err; - channel->state.polarity = state->polarity; - channel->state.period = state->period; - channel->state.duty_cycle = state->duty_cycle; - } - - if (state->enabled && !channel->state.enabled) { meson_pwm_enable(meson, pwm); - channel->state.enabled = true; } return 0; From patchwork Sat May 25 18:11:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105388 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="lx8XVhGv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBCz1r6xz9s55 for ; Sun, 26 May 2019 04:12:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727552AbfEYSMU (ORCPT ); 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[2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:58 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 13/14] pwm: meson: add support PWM_POLARITY_INVERSED when disabling Date: Sat, 25 May 2019 20:11:32 +0200 Message-Id: <20190525181133.4875-14-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org meson_pwm_apply() has to consider the PWM polarity when disabling the output. With enabled=false and polarity=PWM_POLARITY_NORMAL the output needs to be LOW. The driver already supports this. With enabled=false and polarity=PWM_POLARITY_INVERSED the output needs to be HIGH. Implement this in the driver by internally enabling the output with the same settings that we already use for "period == duty". This fixes a PWM API violation which expects that the driver honors the polarity also for enabled=false. Due to the IP block not supporting this natively we only get "an as close as possible" to 100% HIGH signal (in my test setup with input clock of 24MHz and measuring the output with a logic analyzer at 24MHz sampling rate I got a duty cycle of 99.998475% on a Khadas VIM). Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 900d362ec3c9..bb48ba85f756 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -245,6 +245,7 @@ static void meson_pwm_disable(struct meson_pwm *meson, struct pwm_device *pwm) static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { + struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); struct meson_pwm *meson = to_meson_pwm(chip); int err = 0; @@ -252,7 +253,27 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return -EINVAL; if (!state->enabled) { - meson_pwm_disable(meson, pwm); + if (state->polarity == PWM_POLARITY_INVERSED) { + /* + * This IP block revision doesn't have an "always high" + * setting which we can use for "inverted disabled". + * Instead we achieve this using the same settings + * that we use a pre_div of 0 (to get the shortest + * possible duration for one "count") and + * "period == duty_cycle". This results in a signal + * which is LOW for one "count", while being HIGH for + * the rest of the (so the signal is HIGH for slightly + * less than 100% of the period, but this is the best + * we can achieve). + */ + channel->pre_div = 0; + channel->hi = ~0; + channel->lo = 0; + + meson_pwm_enable(meson, pwm); + } else { + meson_pwm_disable(meson, pwm); + } } else { err = meson_pwm_calc(meson, pwm, state); if (err < 0) From patchwork Sat May 25 18:11:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 1105387 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="YUJZFmlD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45BBCT4lHHz9s3Z for ; Sun, 26 May 2019 04:12:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727382AbfEYSME (ORCPT ); Sat, 25 May 2019 14:12:04 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:36806 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727606AbfEYSMC (ORCPT ); Sat, 25 May 2019 14:12:02 -0400 Received: by mail-wm1-f68.google.com with SMTP id v22so4816675wml.1; Sat, 25 May 2019 11:12:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nIoMcTrrivGWjqKFRKrQpbhTg0DwU0FAQEhN7ghOLBc=; b=YUJZFmlDDS9sV9t0FwAaA3uob1RJ1IKO64k1hx0VeZz++jx4eM8XoCSEP1HQUW5YCT Yg6X8OMcyRuAess6huRflmv0SgTKddbbEXVnjxBnlrmS5zgBf8Thu4QSXkel6JrF4gH6 0Nh+RzfkXnEzfzWU7jlm6MI9ivRU911ji63yc4ZRaWY8W8NNaYsfPznlNTHwgwlJYYid YgWjrUYKMFuyG/odJ1p+d8OF7MrkrEenArWMUleMDXqjhnh9om7QZJr8agRXOjq1Ys/a pgBINls59AMYHNDXQ+tROISOkYdsCpFcSC9EKYw7kepQE4tjK/7VY8yu6O/Zm74+SovP uunw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nIoMcTrrivGWjqKFRKrQpbhTg0DwU0FAQEhN7ghOLBc=; b=aDYYB2at/BSf5De0eZTwBq5TZ3LLf4UhMKo2ofeNzSXWrhsShFPXZgxhXJZaZsI3Xa 7wAH4h+ui2TVD9RfyFSfTkPjDhAu/VStGQGyqe2emEEVq2J/WomVTW/vnQLHtbsi8PEp utpiY8zJn/Xa4sAzeRaXhBoCTLHI7ivmh8mDBb1PU4NVezeqD1GogEKviW2K7YJZpmWI EiK1M+SGdy/4cOmBb2bWPZ4NZzm5pN4RG7sv62q8xk3h8YkN6TTdGnxLKIdzjq6OHW1T jTRe3HpkC09T4U4t8CU6gxoG/4jUL20Bghv3H5h4f1LM20caEE136C4op+3+/NQcJRiA U9PA== X-Gm-Message-State: APjAAAUGoAhUHoyoO2pwgJSN7ONR8E+Hn382gJX8nwJiUS8uTuQYS5mJ v39C96j1wgJX4Kous5mFoZE= X-Google-Smtp-Source: APXvYqyu3Be/yKPBPoTWAwazVEJwspi1jbLIzkDvL+i+B9Xl8I2P+UA0mJcEPB3BnlTthJdpmkyPcQ== X-Received: by 2002:a1c:a002:: with SMTP id j2mr20147153wme.131.1558807920083; Sat, 25 May 2019 11:12:00 -0700 (PDT) Received: from blackbox.darklights.net (p200300F133DDA4007CB8841254CD64FD.dip0.t-ipconnect.de. [2003:f1:33dd:a400:7cb8:8412:54cd:64fd]) by smtp.googlemail.com with ESMTPSA id o8sm12794540wra.4.2019.05.25.11.11.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 25 May 2019 11:11:59 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl , Neil Armstrong Subject: [PATCH 14/14] pwm: meson: add documentation to the driver Date: Sat, 25 May 2019 20:11:33 +0200 Message-Id: <20190525181133.4875-15-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> References: <20190525181133.4875-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add a link to the datasheet and a short summary how the hardware works. The goal is to make it easier for other developers to understand why the pwm-meson driver is implemented the way it is. Suggested-by: Uwe Kleine-König Co-authored-by: Neil Armstrong Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index bb48ba85f756..6a978caba483 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -1,5 +1,23 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* + * PWM controller driver for Amlogic Meson SoCs. + * + * This PWM is only a set of Gates, Dividers and Counters: + * PWM output is achieved by calculating a clock that permits calculating + * two periods (low and high). The counter then has to be set to switch after + * N cycles for the first half period. + * The hardware has no "polarity" setting. This driver reverses the period + * cycles (the low length is inverted with the high length) for + * PWM_POLARITY_INVERSED. This means that .get_state cannot read the polarity + * from the hardware. + * Setting the duty cycle will disable and re-enable the PWM output. + * Disabling the PWM stops the output immediately (without waiting for the + * current period to complete first). + * + * The public S922X datasheet contains some documentation for this PWM + * controller starting on page 1084: + * https://dl.khadas.com/Hardware/VIM2/Datasheet/S912_Datasheet_V0.220170314publicversion-Wesion.pdf + * * Copyright (c) 2016 BayLibre, SAS. * Author: Neil Armstrong * Copyright (C) 2014 Amlogic, Inc.