From patchwork Fri Apr 19 06:14:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087960 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lmFQ3dRXz9s3l for ; Fri, 19 Apr 2019 16:26:00 +1000 (AEST) Received: from localhost ([127.0.0.1]:52024 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMyD-00065S-Hq for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:25:57 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59377) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnF-0005gD-HS for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnE-00051G-7Y for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50876) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnD-00050f-VA; Fri, 19 Apr 2019 02:14:36 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 37ABA308A110; Fri, 19 Apr 2019 06:14:35 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id BCB945C21F; Fri, 19 Apr 2019 06:14:34 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:23 -0300 Message-Id: <20190419061429.17695-2-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 19 Apr 2019 06:14:35 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Cornelia Huck , Markus Armbruster , qemu-s390x@nongnu.org, Igor Mammedov , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The function always returns a CPU class. Change the return type to reflect that. I'm not changing the return type of CPUClass::class_by_name() yet, because many of its implementations will be eliminated by the next commits. Signed-off-by: Eduardo Habkost --- Cc: Cornelia Huck Cc: David Hildenbrand Cc: qemu-s390x@nongnu.org Cc: Markus Armbruster --- include/qom/cpu.h | 2 +- exec.c | 8 +++----- qom/cpu.c | 4 ++-- target/s390x/cpu_models.c | 10 +++++----- 4 files changed, 11 insertions(+), 13 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index d28c690b27..fefd5c26b0 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -676,7 +676,7 @@ void cpu_reset(CPUState *cpu); * * Returns: A #CPUClass or %NULL if not matching class is found. */ -ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); +CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model); /** * cpu_create: diff --git a/exec.c b/exec.c index efb1616ece..d303ac5f25 100644 --- a/exec.c +++ b/exec.c @@ -984,7 +984,6 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) const char *parse_cpu_option(const char *cpu_option) { - ObjectClass *oc; CPUClass *cc; gchar **model_pieces; const char *cpu_type; @@ -995,15 +994,14 @@ const char *parse_cpu_option(const char *cpu_option) exit(1); } - oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); - if (oc == NULL) { + cc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); + if (cc == NULL) { error_report("unable to find CPU model '%s'", model_pieces[0]); g_strfreev(model_pieces); exit(EXIT_FAILURE); } - cpu_type = object_class_get_name(oc); - cc = CPU_CLASS(oc); + cpu_type = object_class_get_name(OBJECT_CLASS(cc)); cc->parse_features(cpu_type, model_pieces[1], &error_fatal); g_strfreev(model_pieces); return cpu_type; diff --git a/qom/cpu.c b/qom/cpu.c index a8d2958956..b971a56242 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -283,12 +283,12 @@ static bool cpu_common_has_work(CPUState *cs) return false; } -ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) +CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model) { CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); assert(cpu_model && cc->class_by_name); - return cc->class_by_name(cpu_model); + return CPU_CLASS(cc->class_by_name(cpu_model)); } static void cpu_common_parse_features(const char *typename, char *features, diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index eb125d4d0d..391698595f 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -482,7 +482,7 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info, const QDict *qdict = NULL; const QDictEntry *e; Visitor *visitor; - ObjectClass *oc; + CPUClass *cc; S390CPU *cpu; Object *obj; @@ -494,16 +494,16 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info, } } - oc = cpu_class_by_name(TYPE_S390_CPU, info->name); - if (!oc) { + cc = cpu_class_by_name(TYPE_S390_CPU, info->name); + if (!cc) { error_setg(errp, "The CPU definition \'%s\' is unknown.", info->name); return; } - if (S390_CPU_CLASS(oc)->kvm_required && !kvm_enabled()) { + if (S390_CPU_CLASS(cc)->kvm_required && !kvm_enabled()) { error_setg(errp, "The CPU definition '%s' requires KVM", info->name); return; } - obj = object_new(object_class_get_name(oc)); + obj = object_new(object_class_get_name(OBJECT_CLASS(cc))); cpu = S390_CPU(obj); if (!cpu->model) { From patchwork Fri Apr 19 06:14:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087954 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lm7T6f0fz9s3Z for ; Fri, 19 Apr 2019 16:20:50 +1000 (AEST) Received: from localhost ([127.0.0.1]:51901 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMtD-0001W8-PU for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:20:47 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnI-0005iw-0s for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnG-00052B-IV for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57068) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnG-00051u-Cx; Fri, 19 Apr 2019 02:14:38 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 62D56CA364; Fri, 19 Apr 2019 06:14:37 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9DC98600C1; Fri, 19 Apr 2019 06:14:36 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:24 -0300 Message-Id: <20190419061429.17695-3-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 19 Apr 2019 06:14:37 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-riscv@nongnu.org, Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , Alistair Francis , Igor Mammedov , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" CPUClass::class_by_name is called after the CPU model name and options were already split, there's no need to split the string again. Signed-off-by: Eduardo Habkost Reviewed-by: Alistair Francis --- Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: qemu-riscv@nongnu.org --- target/riscv/cpu.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d61bce6d55..5e97a83c80 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -179,12 +179,9 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; - char **cpuname; - cpuname = g_strsplit(cpu_model, ",", 1); - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]); + typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); - g_strfreev(cpuname); g_free(typename); if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) || object_class_is_abstract(oc)) { From patchwork Fri Apr 19 06:14:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087958 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lmC45FYXz9s3q for ; Fri, 19 Apr 2019 16:24:00 +1000 (AEST) Received: from localhost ([127.0.0.1]:51973 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMwI-0004Dc-KU for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:23:58 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59488) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnM-0005nv-DT for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnL-00055F-BL for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48340) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnJ-00053Y-0I; Fri, 19 Apr 2019 02:14:41 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3981285550; Fri, 19 Apr 2019 06:14:40 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id D9CC85C21F; Fri, 19 Apr 2019 06:14:38 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:25 -0300 Message-Id: <20190419061429.17695-4-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 19 Apr 2019 06:14:40 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 3/7] arm: Don't split CPU model string X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Igor Mammedov , Greg Bellows , qemu-arm@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" CPUClass::class_by_name is called after the CPU model name and options were already split, there's no need to split the string again. Fixes: fb8d6c24b095 ("target-arm: Add CPU property to disable AArch64") Signed-off-by: Eduardo Habkost --- Cc: Greg Bellows Cc: Peter Maydell Cc: qemu-arm@nongnu.org --- target/arm/cpu.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4155782197..6848d9c94d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1212,22 +1212,17 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; - char **cpuname; - const char *cpunamestr; - cpuname = g_strsplit(cpu_model, ",", 1); - cpunamestr = cpuname[0]; #ifdef CONFIG_USER_ONLY /* For backwards compatibility usermode emulation allows "-cpu any", * which has the same semantics as "-cpu max". */ - if (!strcmp(cpunamestr, "any")) { - cpunamestr = "max"; + if (!strcmp(cpu_model, "any")) { + cpu_model = "max"; } #endif - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr); + typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); - g_strfreev(cpuname); g_free(typename); if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) || object_class_is_abstract(oc)) { From patchwork Fri Apr 19 06:14:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087956 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lm7z6xvFz9s3Z for ; Fri, 19 Apr 2019 16:21:19 +1000 (AEST) Received: from localhost ([127.0.0.1]:51945 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMth-0001yy-RR for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:21:17 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59512) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnO-0005pm-70 for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnN-000567-9k for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40426) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnL-00054q-0Q; Fri, 19 Apr 2019 02:14:43 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 44B2588ABB; Fri, 19 Apr 2019 06:14:42 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id CAD46600C1; Fri, 19 Apr 2019 06:14:41 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:26 -0300 Message-Id: <20190419061429.17695-5-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 19 Apr 2019 06:14:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Igor Mammedov , qemu-arm@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We already have an entry for "any" at arm_cpus[], which makes a "any-arm-cpu" QOM type be registered. This means the regular QOM type name lookup code already works and there's no need for a special case. Signed-off-by: Eduardo Habkost --- Cc: Peter Maydell Cc: qemu-arm@nongnu.org --- target/arm/cpu.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6848d9c94d..dcc65093d9 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1213,14 +1213,6 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) ObjectClass *oc; char *typename; -#ifdef CONFIG_USER_ONLY - /* For backwards compatibility usermode emulation allows "-cpu any", - * which has the same semantics as "-cpu max". - */ - if (!strcmp(cpu_model, "any")) { - cpu_model = "max"; - } -#endif typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); From patchwork Fri Apr 19 06:14:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087950 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lm3x4gswz9s3Z for ; Fri, 19 Apr 2019 16:17:49 +1000 (AEST) Received: from localhost ([127.0.0.1]:51879 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMqJ-0007e9-Hk for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:17:47 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59510) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnN-0005pV-VV for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnN-00055z-1O for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41508) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnM-00055W-SC for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:14:44 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 21D4361D07; Fri, 19 Apr 2019 06:14:44 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id AC1BA5C21F; Fri, 19 Apr 2019 06:14:43 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:27 -0300 Message-Id: <20190419061429.17695-6-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 19 Apr 2019 06:14:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Igor Mammedov , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Instead of requiring every architecture to implement a class_by_name function, let them set a format string at CPUClass::class_name_format. This will let us get rid of at least 16 class_by_name functions in the next commits. Signed-off-by: Eduardo Habkost --- include/qom/cpu.h | 12 ++++++++++++ qom/cpu.c | 18 ++++++++++++++++-- 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index fefd5c26b0..eda6a46b82 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -163,7 +163,19 @@ typedef struct CPUClass { DeviceClass parent_class; /*< public >*/ + /* The following fields configure CPU model name -> QOM type translation: */ + + /* + * arch-specific CPU model -> QOM type translation function. + * Optional if @class_name_format is set. + */ ObjectClass *(*class_by_name)(const char *cpu_model); + /* + * Format string for g_strdup_printf(), used to generate the CPU + * class name. + */ + const char *class_name_format; + void (*parse_features)(const char *typename, char *str, Error **errp); void (*reset)(CPUState *cpu); diff --git a/qom/cpu.c b/qom/cpu.c index b971a56242..1fa64941b6 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -286,9 +286,23 @@ static bool cpu_common_has_work(CPUState *cs) CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model) { CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); + ObjectClass *oc; + char *class_name; - assert(cpu_model && cc->class_by_name); - return CPU_CLASS(cc->class_by_name(cpu_model)); + assert(cpu_model); + if (cc->class_by_name) { + return CPU_CLASS(cc->class_by_name(cpu_model)); + } + + assert(cc->class_name_format); + class_name = g_strdup_printf(cc->class_name_format, cpu_model); + oc = object_class_by_name(class_name); + g_free(class_name); + if (!oc || !object_class_dynamic_cast(oc, typename) || + object_class_is_abstract(oc)) { + return NULL; + } + return CPU_CLASS(oc); } static void cpu_common_parse_features(const char *typename, char *features, From patchwork Fri Apr 19 06:14:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087959 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lmCF2b3lz9s3l for ; Fri, 19 Apr 2019 16:24:09 +1000 (AEST) Received: from localhost ([127.0.0.1]:51977 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMwR-0004KM-CT for incoming@patchwork.ozlabs.org; Fri, 19 Apr 2019 02:24:07 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59600) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hHMnf-00063D-KK for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:15:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hHMnd-0005Bc-5I for qemu-devel@nongnu.org; Fri, 19 Apr 2019 02:15:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37086) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hHMnW-00058I-GJ; Fri, 19 Apr 2019 02:14:54 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CC9DB30254A3; Fri, 19 Apr 2019 06:14:51 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id 919675D70D; Fri, 19 Apr 2019 06:14:45 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:28 -0300 Message-Id: <20190419061429.17695-7-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 19 Apr 2019 06:14:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sagar Karandikar , David Hildenbrand , Anthony Green , Palmer Dabbelt , Max Filippov , Alistair Francis , Guan Xuetao , Aleksandar Rikalo , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Igor Mammedov , Stafford Horne , Richard Henderson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , Laurent Vivier , Michael Walle , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Set CPUClass::class_name_format for 12 architectures that simply generate a class name using g_strdup_printf(): arm, i386, lm32, m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32, xtensa. Signed-off-by: Eduardo Habkost Reviewed-by: Alistair Francis --- Cc: Peter Maydell Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Michael Walle Cc: Laurent Vivier Cc: Aurelien Jarno Cc: Aleksandar Markovic Cc: Aleksandar Rikalo Cc: Anthony Green Cc: Stafford Horne Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Cornelia Huck Cc: David Hildenbrand Cc: Guan Xuetao Cc: Max Filippov Cc: qemu-arm@nongnu.org Cc: qemu-riscv@nongnu.org Cc: qemu-s390x@nongnu.org --- target/s390x/internal.h | 1 - target/arm/cpu.c | 17 +---------------- target/i386/cpu.c | 11 +---------- target/lm32/cpu.c | 17 +---------------- target/m68k/cpu.c | 17 +---------------- target/mips/cpu.c | 13 +------------ target/moxie/cpu.c | 17 +---------------- target/openrisc/cpu.c | 17 +---------------- target/riscv/cpu.c | 17 +---------------- target/s390x/cpu.c | 2 +- target/s390x/cpu_models.c | 10 ---------- target/tricore/cpu.c | 17 +---------------- target/unicore32/cpu.c | 17 +---------------- target/xtensa/cpu.c | 17 +---------------- 14 files changed, 12 insertions(+), 178 deletions(-) diff --git a/target/s390x/internal.h b/target/s390x/internal.h index 3b4855c175..789d6444c9 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -256,7 +256,6 @@ static inline void s390_cpu_unhalt(S390CPU *cpu) void s390_cpu_model_register_props(Object *obj); void s390_cpu_model_class_register_props(ObjectClass *oc); void s390_realize_cpu_model(CPUState *cs, Error **errp); -ObjectClass *s390_cpu_class_by_name(const char *name); /* excp_helper.c */ diff --git a/target/arm/cpu.c b/target/arm/cpu.c index dcc65093d9..4f0ed3715d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1208,21 +1208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) acc->parent_realize(dev, errp); } -static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) || - object_class_is_abstract(oc)) { - return NULL; - } - return oc; -} - /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) @@ -2142,7 +2127,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) acc->parent_reset = cc->reset; cc->reset = arm_cpu_reset; - cc->class_by_name = arm_cpu_class_by_name; + cc->class_name_format = ARM_CPU_TYPE_NAME("%s"); cc->has_work = arm_cpu_has_work; cc->cpu_exec_interrupt = arm_cpu_exec_interrupt; cc->dump_state = arm_cpu_dump_state; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d6bb57d210..18adef524f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1391,15 +1391,6 @@ static char *x86_cpu_type_name(const char *model_name) return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name); } -static ObjectClass *x86_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename = x86_cpu_type_name(cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - return oc; -} - static char *x86_cpu_class_get_model_name(X86CPUClass *cc) { const char *class_name = object_class_get_name(OBJECT_CLASS(cc)); @@ -5851,7 +5842,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->reset = x86_cpu_reset; cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP; - cc->class_by_name = x86_cpu_class_by_name; + cc->class_name_format = X86_CPU_TYPE_NAME("%s"); cc->parse_features = x86_cpu_parse_featurestr; cc->has_work = x86_cpu_has_work; #ifdef CONFIG_TCG diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index b7499cb627..675bea10e8 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -201,21 +201,6 @@ static void lm32_full_cpu_initfn(Object *obj) | LM32_FEATURE_CYCLE_COUNT; } -static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) || - object_class_is_abstract(oc))) { - oc = NULL; - } - return oc; -} - static void lm32_cpu_class_init(ObjectClass *oc, void *data) { LM32CPUClass *lcc = LM32_CPU_CLASS(oc); @@ -227,7 +212,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) lcc->parent_reset = cc->reset; cc->reset = lm32_cpu_reset; - cc->class_by_name = lm32_cpu_class_by_name; + cc->class_name_format = LM32_CPU_TYPE_NAME("%s"); cc->has_work = lm32_cpu_has_work; cc->do_interrupt = lm32_cpu_do_interrupt; cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 582e3a73b3..b582c8d980 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -81,21 +81,6 @@ static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) /* CPU models */ -static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || - object_class_is_abstract(oc))) { - return NULL; - } - return oc; -} - static void m5206_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); @@ -261,7 +246,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) mcc->parent_reset = cc->reset; cc->reset = m68k_cpu_reset; - cc->class_by_name = m68k_cpu_class_by_name; + cc->class_name_format = M68K_CPU_TYPE_NAME("%s"); cc->has_work = m68k_cpu_has_work; cc->do_interrupt = m68k_cpu_do_interrupt; cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e217fb3e36..c3b30f5562 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -166,17 +166,6 @@ static char *mips_cpu_type_name(const char *cpu_model) return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model); } -static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = mips_cpu_type_name(cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - return oc; -} - static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); @@ -188,7 +177,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) mcc->parent_reset = cc->reset; cc->reset = mips_cpu_reset; - cc->class_by_name = mips_cpu_class_by_name; + cc->class_name_format = MIPS_CPU_TYPE_NAME("%s"); cc->has_work = mips_cpu_has_work; cc->do_interrupt = mips_cpu_do_interrupt; cc->cpu_exec_interrupt = mips_cpu_exec_interrupt; diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 46434e65ba..8e7768e576 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -80,21 +80,6 @@ static void moxie_cpu_initfn(Object *obj) cs->env_ptr = &cpu->env; } -static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) || - object_class_is_abstract(oc))) { - return NULL; - } - return oc; -} - static void moxie_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -106,7 +91,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data) mcc->parent_reset = cc->reset; cc->reset = moxie_cpu_reset; - cc->class_by_name = moxie_cpu_class_by_name; + cc->class_name_format = MOXIE_CPU_TYPE_NAME("%s"); cc->has_work = moxie_cpu_has_work; cc->do_interrupt = moxie_cpu_do_interrupt; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 541b2a66c7..f78b5a2cd8 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -99,21 +99,6 @@ static void openrisc_cpu_initfn(Object *obj) /* CPU models */ -static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) || - object_class_is_abstract(oc))) { - return NULL; - } - return oc; -} - static void or1200_initfn(Object *obj) { OpenRISCCPU *cpu = OPENRISC_CPU(obj); @@ -140,7 +125,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) occ->parent_reset = cc->reset; cc->reset = openrisc_cpu_reset; - cc->class_by_name = openrisc_cpu_class_by_name; + cc->class_name_format = OPENRISC_CPU_TYPE_NAME("%s"); cc->has_work = openrisc_cpu_has_work; cc->do_interrupt = openrisc_cpu_do_interrupt; cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5e97a83c80..7bd32966bc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -175,21 +175,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj) #endif -static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) || - object_class_is_abstract(oc)) { - return NULL; - } - return oc; -} - static void riscv_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags) { @@ -335,7 +320,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) mcc->parent_reset = cc->reset; cc->reset = riscv_cpu_reset; - cc->class_by_name = riscv_cpu_class_by_name; + cc->class_name_format = RISCV_CPU_TYPE_NAME("%s"); cc->has_work = riscv_cpu_has_work; cc->do_interrupt = riscv_cpu_do_interrupt; cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 698dd9cb82..4ecd3f60be 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -461,7 +461,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) scc->cpu_reset = s390_cpu_reset; scc->initial_cpu_reset = s390_cpu_initial_reset; cc->reset = s390_cpu_full_reset; - cc->class_by_name = s390_cpu_class_by_name, + cc->class_name_format = S390_CPU_TYPE_NAME("%s"); cc->has_work = s390_cpu_has_work; #ifdef CONFIG_TCG cc->do_interrupt = s390_cpu_do_interrupt; diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 391698595f..fa248c5b3f 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -1278,16 +1278,6 @@ static char *s390_base_cpu_type_name(const char *model_name) return g_strdup_printf(S390_CPU_TYPE_NAME("%s-base"), model_name); } -ObjectClass *s390_cpu_class_by_name(const char *name) -{ - char *typename = s390_cpu_type_name(name); - ObjectClass *oc; - - oc = object_class_by_name(typename); - g_free(typename); - return oc; -} - static const TypeInfo qemu_s390_cpu_type_info = { .name = S390_CPU_TYPE_NAME("qemu"), .parent = TYPE_S390_CPU, diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index e8d37e4040..81460f6aed 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -111,21 +111,6 @@ static void tricore_cpu_initfn(Object *obj) cs->env_ptr = env; } -static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) || - object_class_is_abstract(oc)) { - return NULL; - } - return oc; -} - static void tc1796_initfn(Object *obj) { TriCoreCPU *cpu = TRICORE_CPU(obj); @@ -158,7 +143,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) mcc->parent_reset = cc->reset; cc->reset = tricore_cpu_reset; - cc->class_by_name = tricore_cpu_class_by_name; + cc->class_name_format = TRICORE_CPU_TYPE_NAME("%s"); cc->has_work = tricore_cpu_has_work; cc->dump_state = tricore_cpu_dump_state; diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 2b49d1ca40..f7b3dd2bb1 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -40,21 +40,6 @@ static inline void set_feature(CPUUniCore32State *env, int feature) /* CPU models */ -static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) || - object_class_is_abstract(oc))) { - oc = NULL; - } - return oc; -} - static void unicore_ii_cpu_initfn(Object *obj) { UniCore32CPU *cpu = UNICORE32_CPU(obj); @@ -132,7 +117,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, uc32_cpu_realizefn, &ucc->parent_realize); - cc->class_by_name = uc32_cpu_class_by_name; + cc->class_name_format = UNICORE32_CPU_TYPE_NAME("%s"); cc->has_work = uc32_cpu_has_work; cc->do_interrupt = uc32_cpu_do_interrupt; cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt; diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index a54dbe4260..2278a46989 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -90,21 +90,6 @@ static void xtensa_cpu_reset(CPUState *s) #endif } -static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model); - oc = object_class_by_name(typename); - g_free(typename); - if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) || - object_class_is_abstract(oc)) { - return NULL; - } - return oc; -} - static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) { XtensaCPU *cpu = XTENSA_CPU(cs); @@ -172,7 +157,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) xcc->parent_reset = cc->reset; cc->reset = xtensa_cpu_reset; - cc->class_by_name = xtensa_cpu_class_by_name; + cc->class_name_format = XTENSA_CPU_TYPE_NAME("%s"); cc->has_work = xtensa_cpu_has_work; cc->do_interrupt = xtensa_cpu_do_interrupt; cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt; From patchwork Fri Apr 19 06:14:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1087961 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44lmGp5Wc2z9s3l for ; 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Fri, 19 Apr 2019 06:14:54 +0000 (UTC) Received: from localhost (ovpn-116-9.gru2.redhat.com [10.97.116.9]) by smtp.corp.redhat.com (Postfix) with ESMTP id 490165D9C5; Fri, 19 Apr 2019 06:14:53 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2019 03:14:29 -0300 Message-Id: <20190419061429.17695-8-ehabkost@redhat.com> In-Reply-To: <20190419061429.17695-1-ehabkost@redhat.com> References: <20190419061429.17695-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Fri, 19 Apr 2019 06:14:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on some architectures X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Peter Maydell , Chris Wulff , "Edgar E. Iglesias" , Igor Mammedov , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" hppa, microblaze, nios2, and tilegx have a fixed class name being returned by CPUClass::class_by_name. We can implement the same behavior by setting CPUClass::class_name_format. Signed-off-by: Eduardo Habkost --- Cc: Richard Henderson Cc: "Edgar E. Iglesias" Cc: Chris Wulff Cc: Marek Vasut --- target/hppa/cpu.c | 8 ++------ target/microblaze/cpu.c | 8 ++------ target/nios2/cpu.c | 8 ++------ target/tilegx/cpu.c | 8 ++------ 4 files changed, 8 insertions(+), 24 deletions(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 00bf444620..c4a1106df9 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -144,11 +144,6 @@ static void hppa_cpu_initfn(Object *obj) cpu_hppa_put_psw(env, PSW_W); } -static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) -{ - return object_class_by_name(TYPE_HPPA_CPU); -} - static void hppa_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -158,7 +153,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, hppa_cpu_realizefn, &acc->parent_realize); - cc->class_by_name = hppa_cpu_class_by_name; + /* All CPU model names are translated to the same QOM class */ + cc->class_name_format = TYPE_HPPA_CPU; cc->has_work = hppa_cpu_has_work; cc->do_interrupt = hppa_cpu_do_interrupt; cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 5596cd5485..aee09f7d96 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -280,11 +280,6 @@ static Property mb_properties[] = { DEFINE_PROP_END_OF_LIST(), }; -static ObjectClass *mb_cpu_class_by_name(const char *cpu_model) -{ - return object_class_by_name(TYPE_MICROBLAZE_CPU); -} - static void mb_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -296,7 +291,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) mcc->parent_reset = cc->reset; cc->reset = mb_cpu_reset; - cc->class_by_name = mb_cpu_class_by_name; + /* All CPU model names are translated to the same QOM class */ + cc->class_name_format = TYPE_MICROBLAZE_CPU; cc->has_work = mb_cpu_has_work; cc->do_interrupt = mb_cpu_do_interrupt; cc->cpu_exec_interrupt = mb_cpu_exec_interrupt; diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index fbfaa2ce26..3427ffedca 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -77,11 +77,6 @@ static void nios2_cpu_initfn(Object *obj) #endif } -static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model) -{ - return object_class_by_name(TYPE_NIOS2_CPU); -} - static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); @@ -193,7 +188,8 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data) ncc->parent_reset = cc->reset; cc->reset = nios2_cpu_reset; - cc->class_by_name = nios2_cpu_class_by_name; + /* All CPU model names are translated to the same QOM class */ + cc->class_name_format = TYPE_NIOS2_CPU; cc->has_work = nios2_cpu_has_work; cc->do_interrupt = nios2_cpu_do_interrupt; cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt; diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index bfe9be59b5..710af17507 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -51,11 +51,6 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, env->pc, env->spregs[TILEGX_SPR_CMPEXCH]); } -static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model) -{ - return object_class_by_name(TYPE_TILEGX_CPU); -} - static void tilegx_cpu_set_pc(CPUState *cs, vaddr value) { TileGXCPU *cpu = TILEGX_CPU(cs); @@ -146,7 +141,8 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data) tcc->parent_reset = cc->reset; cc->reset = tilegx_cpu_reset; - cc->class_by_name = tilegx_cpu_class_by_name; + /* All CPU model names are translated to the same QOM class */ + cc->class_name_format = TYPE_TILEGX_CPU; cc->has_work = tilegx_cpu_has_work; cc->do_interrupt = tilegx_cpu_do_interrupt; cc->cpu_exec_interrupt = tilegx_cpu_exec_interrupt;