From patchwork Wed Apr 17 10:45:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Chen X-Patchwork-Id: 1086905 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44kf5r274Bz9s4Y for ; Wed, 17 Apr 2019 20:45:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731640AbfDQKpf (ORCPT ); Wed, 17 Apr 2019 06:45:35 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:55200 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725792AbfDQKpe (ORCPT ); Wed, 17 Apr 2019 06:45:34 -0400 X-UUID: bddb3e8c15c34974a05937210f6c565e-20190417 X-UUID: bddb3e8c15c34974a05937210f6c565e-20190417 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1343567304; Wed, 17 Apr 2019 18:45:29 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 17 Apr 2019 18:45:28 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 17 Apr 2019 18:45:27 +0800 From: Frederic Chen To: , , , , CC: , , , , , , , , , , , , , , , , Subject: [RFC PATCH V1 1/6] dt-bindings: mt8183: Add binding for DIP shared memory Date: Wed, 17 Apr 2019 18:45:06 +0800 Message-ID: <20190417104511.21514-2-frederic.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190417104511.21514-1-frederic.chen@mediatek.com> References: <20190417104511.21514-1-frederic.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the binding for describing the shared memory used to exchange configuration and tuning data between the co-processor and Digital Image Processing (DIP) unit of the camera ISP system on Mediatek SoCs. Signed-off-by: Frederic Chen --- .../mediatek,reserve-memory-dip_smem.txt | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/reserved-memory/mediatek,reserve-memory-dip_smem.txt diff --git a/Documentation/devicetree/bindings/reserved-memory/mediatek,reserve-memory-dip_smem.txt b/Documentation/devicetree/bindings/reserved-memory/mediatek,reserve-memory-dip_smem.txt new file mode 100644 index 000000000000..64c001b476b9 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/mediatek,reserve-memory-dip_smem.txt @@ -0,0 +1,45 @@ +Mediatek DIP Shared Memory binding + +This binding describes the shared memory, which serves the purpose of +describing the shared memory region used to exchange data between Digital +Image Processing (DIP) and co-processor in Mediatek SoCs. + +The co-processor doesn't have the iommu so we need to use the physical +address to access the shared buffer in the firmware. + +The Digital Image Processing (DIP) can access memory through mt8183 IOMMU so +it can use dma address to access the memory region. +(See iommu/mediatek,iommu.txt for the detailed description of Mediatek IOMMU) + + +Required properties: + +- compatible: must be "mediatek,reserve-memory-dip_smem" + +- reg: required for static allocation (see reserved-memory.txt for + the detailed usage) + +- alloc-range: required for dynamic allocation. The range must + between 0x00000400 and 0x100000000 due to the co-processer's + addressing limitation + +- size: required for dynamic allocation. The unit is bytes. + If you want to enable the full feature of Digital Processing Unit, + you need 20 MB at least. + + +Example: + +The following example shows the DIP shared memory setup for MT8183. + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + reserve-memory-dip_smem { + compatible = "mediatek,reserve-memory-dip_smem"; + size = <0 0x1400000>; + alignment = <0 0x1000>; + alloc-ranges = <0 0x40000000 0 0x50000000>; + }; + }; From patchwork Wed Apr 17 10:45:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Chen X-Patchwork-Id: 1086906 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44kf641c7xz9s4Y for ; Wed, 17 Apr 2019 20:45:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731847AbfDQKpr (ORCPT ); Wed, 17 Apr 2019 06:45:47 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:5063 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731833AbfDQKpr (ORCPT ); Wed, 17 Apr 2019 06:45:47 -0400 X-UUID: ed78bb1a2223441f88a5fbc4a7b00dcf-20190417 X-UUID: ed78bb1a2223441f88a5fbc4a7b00dcf-20190417 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 912188842; Wed, 17 Apr 2019 18:45:32 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 17 Apr 2019 18:45:30 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 17 Apr 2019 18:45:30 +0800 From: Frederic Chen To: , , , , CC: , , , , , , , , , , , , , , , , Subject: [RFC PATCH V1 3/6] dt-bindings: mt8183: Added DIP dt-bindings Date: Wed, 17 Apr 2019 18:45:08 +0800 Message-ID: <20190417104511.21514-4-frederic.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190417104511.21514-1-frederic.chen@mediatek.com> References: <20190417104511.21514-1-frederic.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 302D79E21E62CEB51D6FEDD02C8F4DBE7035FDD63513144105294D1DF1FB5E262000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds DT binding documentation for the Digital Image Processing (DIP) unit of camera ISP system on Mediatek's SoCs. Signed-off-by: Frederic Chen --- .../bindings/media/mediatek,mt8183-dip.txt | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt new file mode 100644 index 000000000000..0e1994bf82f0 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt @@ -0,0 +1,35 @@ +* Mediatek Digital Image Processor (DIP) + +Digital Image Processor (DIP) unit in Mediatek ISP system is responsible for +image content adjustment according to the tuning parameters. DIP can process +the image form memory buffer and output the processed image to multiple output +buffers. Furthermore, it can support demosaicing and noise reduction on the +images. + +Required properties: +- compatible: "mediatek,mt8183-dip" +- reg: Physical base address and length of the function block register space +- interrupts: interrupt number to the cpu +- iommus: should point to the respective IOMMU block with master port as + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. +- mediatek,larb: must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- clocks: must contain the local arbiters 5 (LARB5) and DIP clock +- clock-names: must contain DIP_CG_IMG_LARB5 and DIP_CG_IMG_DIP + +Example: + dip: dip@15022000 { + compatible = "mediatek,mt8183-dip"; + mediatek,larb = <&larb5>; + mediatek,mdp3 = <&mdp_rdma0>; + mediatek,vpu = <&vpu>; + iommus = <&iommu M4U_PORT_CAM_IMGI>; + reg = <0 0x15022000 0 0x6000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_LARB5>, + <&imgsys CLK_IMG_DIP>; + clock-names = "DIP_CG_IMG_LARB5", + "DIP_CG_IMG_DIP"; + };