From patchwork Wed Apr 17 10:10:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Ma X-Patchwork-Id: 1086901 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44kdVB46Ryz9s3l for ; Wed, 17 Apr 2019 20:18:08 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1B571C21E38; Wed, 17 Apr 2019 10:18:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 13DD2C21DB5; Wed, 17 Apr 2019 10:17:58 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 12395C21DD4; Wed, 17 Apr 2019 10:17:56 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id B4413C21DB5 for ; Wed, 17 Apr 2019 10:17:55 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 09ADB1A0268; Wed, 17 Apr 2019 12:17:55 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 2185D1A0006; Wed, 17 Apr 2019 12:17:50 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C090A402B7; Wed, 17 Apr 2019 18:17:43 +0800 (SGT) From: Peng Ma To: albert.u.boot@aribaud.net, sjg@chromium.org, fabio.estevam@nxp.com, york.sun@nxp.com, prabhakar.kushwaha@nxp.com Date: Wed, 17 Apr 2019 10:10:49 +0000 Message-Id: <20190417101050.41541-1-peng.ma@nxp.com> X-Mailer: git-send-email 2.14.1 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Peng Ma , u-boot@lists.denx.de, yinbo.zhu@nxp.com, andy.tang@nxp.com, michal.simek@xilinx.com Subject: [U-Boot] [v3 1/2] ARM: dts: Freescale: Add ecc addr for sata node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Move the ecc addr from driver to dts. Signed-off-by: Peng Ma --- changed for v3: - remove some dts node reg to fix build error arch/arm/dts/fsl-ls1012a.dtsi | 4 +++- arch/arm/dts/fsl-ls1043a.dtsi | 4 +++- arch/arm/dts/fsl-ls1046a.dtsi | 4 +++- arch/arm/dts/fsl-ls1088a.dtsi | 4 +++- arch/arm/dts/ls1021a.dtsi | 4 +++- 5 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index f22cbf4..30af2e1 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -136,7 +136,9 @@ sata: sata@3200000 { compatible = "fsl,ls1012a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; interrupts = <0 69 4>; clocks = <&clockgen 4 0>; status = "disabled"; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index bb70992..c7fa9e2 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -290,7 +290,9 @@ sata: sata@3200000 { compatible = "fsl,ls1043a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; interrupts = <0 69 4>; clocks = <&clockgen 4 0>; status = "disabled"; diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi index 5ac10e0..d56ecd6 100644 --- a/arch/arm/dts/fsl-ls1046a.dtsi +++ b/arch/arm/dts/fsl-ls1046a.dtsi @@ -294,7 +294,9 @@ sata: sata@3200000 { compatible = "fsl,ls1046a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; interrupts = <0 69 4>; clocks = <&clockgen 4 1>; status = "disabled"; diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index 9455e03..b7dd3ba 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -153,7 +153,9 @@ sata: sata@3200000 { compatible = "fsl,ls1088a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x7 0x100520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; interrupts = <0 133 4>; status = "disabled"; }; diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 7670a39..cc5d56c 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -406,7 +406,9 @@ sata: sata@3200000 { compatible = "fsl,ls1021a-ahci"; - reg = <0x3200000 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x0 0x20220520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; interrupts = <0 101 4>; status = "disabled"; }; From patchwork Wed Apr 17 10:10:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Ma X-Patchwork-Id: 1086902 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44kdVh07Tqz9s3l for ; Wed, 17 Apr 2019 20:18:35 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 067EDC21E1A; Wed, 17 Apr 2019 10:18:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A90F7C21E15; Wed, 17 Apr 2019 10:17:58 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5C5B7C21DB5; Wed, 17 Apr 2019 10:17:57 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id EFA4DC21C6A for ; Wed, 17 Apr 2019 10:17:56 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 65E7C2000AF; Wed, 17 Apr 2019 12:17:56 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4361720004E; Wed, 17 Apr 2019 12:17:51 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E2131402C1; Wed, 17 Apr 2019 18:17:44 +0800 (SGT) From: Peng Ma To: albert.u.boot@aribaud.net, sjg@chromium.org, fabio.estevam@nxp.com, york.sun@nxp.com, prabhakar.kushwaha@nxp.com Date: Wed, 17 Apr 2019 10:10:50 +0000 Message-Id: <20190417101050.41541-2-peng.ma@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190417101050.41541-1-peng.ma@nxp.com> References: <20190417101050.41541-1-peng.ma@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: Peng Ma , u-boot@lists.denx.de, yinbo.zhu@nxp.com, andy.tang@nxp.com, michal.simek@xilinx.com Subject: [U-Boot] [v3 2/2] scsi: ceva: Clean up the driver code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Distinguish the ecc val by chassis version and move the ecc addr to dts. Add ls1028a soc support. Signed-off-by: Peng Ma Reviewed-by: Michal Simek --- changed for v3: - Add Reviewed-by. drivers/ata/sata_ceva.c | 50 +++++++++++++++++++++++++++++++---------------- 1 files changed, 33 insertions(+), 17 deletions(-) diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index 8887be9..2d49630 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -8,6 +8,7 @@ #include #include #include +#include /* Vendor Specific Register Offsets */ #define AHCI_VEND_PCFG 0xA4 @@ -88,20 +89,16 @@ #define LS1021_CEVA_PHY4_CFG 0x064a080b #define LS1021_CEVA_PHY5_CFG 0x2aa86470 -/* for ls1088a */ -#define LS1088_ECC_DIS_ADDR_CH2 0x100520 -#define LS1088_ECC_DIS_VAL_CH2 0x40000000 - -/* ecc addr-val pair */ -#define ECC_DIS_ADDR_CH2 0x20140520 +/* ecc val pair */ +#define ECC_DIS_VAL_CH1 0x00020000 #define ECC_DIS_VAL_CH2 0x80000000 -#define SATA_ECC_REG_ADDR 0x20220520 -#define SATA_ECC_DISABLE 0x00020000 +#define ECC_DIS_VAL_CH3 0x40000000 enum ceva_soc { CEVA_1V84, CEVA_LS1012A, CEVA_LS1021A, + CEVA_LS1028A, CEVA_LS1043A, CEVA_LS1046A, CEVA_LS1088A, @@ -110,12 +107,14 @@ enum ceva_soc { struct ceva_sata_priv { ulong base; + ulong ecc_base; enum ceva_soc soc; ulong flag; }; static int ceva_init_sata(struct ceva_sata_priv *priv) { + ulong ecc_addr = priv->ecc_base; ulong base = priv->base; ulong tmp; @@ -132,38 +131,42 @@ static int ceva_init_sata(struct ceva_sata_priv *priv) break; case CEVA_LS1021A: - writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR); + if (!ecc_addr) + return -EINVAL; + writel(ECC_DIS_VAL_CH1, ecc_addr); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C); writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C); writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C); writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); - if (priv->flag & FLAG_COHERENT) - writel(CEVA_AXICC_CFG, base + LS1021_AHCI_VEND_AXICC); break; case CEVA_LS1012A: case CEVA_LS1043A: case CEVA_LS1046A: - writel(ECC_DIS_VAL_CH2, ECC_DIS_ADDR_CH2); + if (!ecc_addr) + return -EINVAL; + writel(ECC_DIS_VAL_CH2, ecc_addr); /* fallthrough */ case CEVA_LS2080A: writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); - if (priv->flag & FLAG_COHERENT) - writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC); break; + case CEVA_LS1028A: case CEVA_LS1088A: - writel(LS1088_ECC_DIS_VAL_CH2, LS1088_ECC_DIS_ADDR_CH2); + if (!ecc_addr) + return -EINVAL; + writel(ECC_DIS_VAL_CH3, ecc_addr); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); - if (priv->flag & FLAG_COHERENT) - writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC); break; } + if (priv->flag & FLAG_COHERENT) + writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC); + return 0; } @@ -187,6 +190,7 @@ static const struct udevice_id sata_ceva_ids[] = { { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 }, { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A }, { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A }, + { .compatible = "fsl,ls1028a-ahci", .data = CEVA_LS1028A }, { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A }, { .compatible = "fsl,ls1046a-ahci", .data = CEVA_LS1046A }, { .compatible = "fsl,ls1088a-ahci", .data = CEVA_LS1088A }, @@ -197,6 +201,8 @@ static const struct udevice_id sata_ceva_ids[] = { static int sata_ceva_ofdata_to_platdata(struct udevice *dev) { struct ceva_sata_priv *priv = dev_get_priv(dev); + struct resource res_regs; + int ret; if (dev_read_bool(dev, "dma-coherent")) priv->flag |= FLAG_COHERENT; @@ -205,8 +211,18 @@ static int sata_ceva_ofdata_to_platdata(struct udevice *dev) if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; + ret = dev_read_resource_byname(dev, "ecc-addr", &res_regs); + if (ret) + priv->ecc_base = 0; + else + priv->ecc_base = res_regs.start; + priv->soc = dev_get_driver_data(dev); + debug("ccsr-sata-base %lx\t ecc-base %lx\n", + priv->base, + priv->ecc_base); + return 0; }