From patchwork Thu Oct 26 02:51:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 830431 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=sparclinux-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZhJOEQRZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yMs3j0G5jz9t3p for ; Thu, 26 Oct 2017 13:52:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752035AbdJZCwA (ORCPT ); Wed, 25 Oct 2017 22:52:00 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:48464 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752022AbdJZCv7 (ORCPT ); Wed, 25 Oct 2017 22:51:59 -0400 Received: by mail-pg0-f65.google.com with SMTP id v78so1551754pgb.5; Wed, 25 Oct 2017 19:51:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=/KF50ACqbKXUm79jUUVbdDUvquj1jj+rrzBz/X210KI=; b=ZhJOEQRZVx9S9vp6ir2mjejzMb8Vyf+AZWQ9ZErT1Wu41IMBHGP5nuNB/mzr52lB3p V7wPWOBdq2dLFf44FjioxQwDpuCKigIrEUx6/098UEjsMjZptq0J02wnKr+RlBO6y8Cj LJ15y/oPkse/pz3wmeCCQCQoTVG37sZ+R/apg8RH/rZIhm+vYY9JET+mQprz7tuPgURV QRPYGX+Z7Mt+NmuWe5bwN/HgHbYMZGL7UybZ9Wz5jLYizT62qbirKcjaQkR2aOac5TeN WnDqQ+MKnHspxJeiZCKPN0VS+86kPwzSLpKr1Cjde32mQBFyZCpCAgf/kWy2+fP7gv0T YBUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=/KF50ACqbKXUm79jUUVbdDUvquj1jj+rrzBz/X210KI=; b=HjrIOjN6fHAjONGaUVec/r48XVvLVcsSEaJjy6PtV20koJ+q02qBUzaK9fHe5zJCK7 mmTgr99oihi88yXQw0z6IdYcvOsiiadTWPiLnQChJj8MuMNqUB4zbGcZQaoEmqbE1Be7 +kA7XNqPqIGepIWruDnxxqYNVhFN1WCZZHldLeBuHXKEORYceITcwIyBPRGphvKLgRJD WFYUel/JZ43LhUbjTCDXmCIzkCQp/oh4Fx39Q20HdnfOoa21A3sVqldxTTMQPYx041w8 /9uLaN0Jn3GiTVE4m+B+3J5ez/c6fmDl/Kd/Edpu2b7Bo5VeHcEaBz3NWQHkILvTkPVy zldQ== X-Gm-Message-State: AMCzsaWjtJ0C4nb+XJ+3Z9a6DNjvVBZ24MgA1CZS+Mo5mpGf+mL+shew vzhjbepPY5ZmoKEOms1+Y1E= X-Google-Smtp-Source: ABhQp+QoWU36b1kZBnZL+u8d5e04jiv32Yjz5cGrUMoF8sHqQRKqwB67OAgpiGaS9R+RpawL0eMHew== X-Received: by 10.84.216.75 with SMTP id f11mr3298422plj.275.1508986319043; Wed, 25 Oct 2017 19:51:59 -0700 (PDT) Received: from localhost (108-223-40-66.lightspeed.sntcca.sbcglobal.net. [108.223.40.66]) by smtp.gmail.com with ESMTPSA id k76sm7889103pfb.37.2017.10.25.19.51.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Oct 2017 19:51:58 -0700 (PDT) From: Guenter Roeck To: "David S . Miller" Cc: sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org, Guenter Roeck Subject: [PATCH v2] sparc: Provide cmpxchg64 for 32-bit builds Date: Wed, 25 Oct 2017 19:51:52 -0700 Message-Id: <1508986312-32081-1-git-send-email-linux@roeck-us.net> X-Mailer: git-send-email 2.7.4 Sender: sparclinux-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: sparclinux@vger.kernel.org Fix the following build error, seen when building sparc32:allmodconfig. drivers/net/ethernet/intel/i40e/i40e_ethtool.c: In function 'i40e_set_priv_flags': drivers/net/ethernet/intel/i40e/i40e_ethtool.c:4150:2: error: implicit declaration of function 'cmpxchg64' Signed-off-by: Guenter Roeck --- v2: Actually implement cmpxchg64 with code snippet provided by Dave Miller Note: I am aware that this doesn't pass checkpatch; I found it more important to be in line with __cmpxchg_u32(). arch/sparc/include/asm/cmpxchg_32.h | 2 ++ arch/sparc/lib/atomic32.c | 14 ++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h index 83ffb83c5397..7f95d3ca20e2 100644 --- a/arch/sparc/include/asm/cmpxchg_32.h +++ b/arch/sparc/include/asm/cmpxchg_32.h @@ -62,6 +62,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) (unsigned long)_n_, sizeof(*(ptr))); \ }) +extern u64 cmpxchg64(u64 *ptr, u64 old, u64 new); + #include /* diff --git a/arch/sparc/lib/atomic32.c b/arch/sparc/lib/atomic32.c index 2c373329d5cb..41601eb540e7 100644 --- a/arch/sparc/lib/atomic32.c +++ b/arch/sparc/lib/atomic32.c @@ -172,6 +172,20 @@ unsigned long __cmpxchg_u32(volatile u32 *ptr, u32 old, u32 new) } EXPORT_SYMBOL(__cmpxchg_u32); +u64 cmpxchg64(u64 *ptr, u64 old, u64 new) +{ + unsigned long flags; + u64 prev; + + spin_lock_irqsave(ATOMIC_HASH(ptr), flags); + if ((prev = *ptr) == old) + *ptr = new; + spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags); + + return prev; +} +EXPORT_SYMBOL(cmpxchg64); + unsigned long __xchg_u32(volatile u32 *ptr, u32 new) { unsigned long flags;