From patchwork Tue Apr 9 08:52:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 1082038 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44dh0f04TTz9sRC for ; Tue, 9 Apr 2019 18:53:54 +1000 (AEST) Received: from localhost ([127.0.0.1]:37652 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmVr-0004Bj-VF for incoming@patchwork.ozlabs.org; Tue, 09 Apr 2019 04:53:52 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49310) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmV2-00043c-Dv for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDmV0-0002td-UC for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51448) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDmUx-0002rr-NO; Tue, 09 Apr 2019 04:52:55 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0DC23F74CF; Tue, 9 Apr 2019 08:52:55 +0000 (UTC) Received: from thuth.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id 09F051A917; Tue, 9 Apr 2019 08:52:52 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org Date: Tue, 9 Apr 2019 10:52:41 +0200 Message-Id: <20190409085245.31548-2-thuth@redhat.com> In-Reply-To: <20190409085245.31548-1-thuth@redhat.com> References: <20190409085245.31548-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 09 Apr 2019 08:52:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 1/5] tests/tco: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , qemu-block@nongnu.org, armbru@redhat.com, "Dr. David Alan Gilbert" , Hannes Reinecke , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass around the QTestState in the TestData, so we do not need the global_qtest variable here anymore. Signed-off-by: Thomas Huth --- tests/tco-test.c | 63 ++++++++++++++++++++++++------------------------ 1 file changed, 32 insertions(+), 31 deletions(-) diff --git a/tests/tco-test.c b/tests/tco-test.c index f89a42cdcc..254f735370 100644 --- a/tests/tco-test.c +++ b/tests/tco-test.c @@ -45,13 +45,14 @@ typedef struct { QPCIDevice *dev; QPCIBar tco_io_bar; QPCIBus *bus; + QTestState *qts; } TestData; static void test_end(TestData *d) { g_free(d->dev); qpci_free_pc(d->bus); - qtest_end(); + qtest_quit(d->qts); } static void test_init(TestData *d) @@ -61,7 +62,6 @@ static void test_init(TestData *d) qs = qtest_initf("-machine q35 %s %s", d->noreboot ? "" : "-global ICH9-LPC.noreboot=false", !d->args ? "" : d->args); - global_qtest = qs; qtest_irq_intercept_in(qs, "ioapic"); d->bus = qpci_new_pc(qs, NULL); @@ -78,6 +78,7 @@ static void test_init(TestData *d) qpci_config_writel(d->dev, ICH9_LPC_RCBA, RCBA_BASE_ADDR | 0x1); d->tco_io_bar = qpci_legacy_iomap(d->dev, PM_IO_BASE_ADDR + 0x60); + d->qts = qs; } static void stop_tco(const TestData *d) @@ -115,17 +116,17 @@ static void clear_tco_status(const TestData *d) qpci_io_writew(d->dev, d->tco_io_bar, TCO2_STS, 0x0004); } -static void reset_on_second_timeout(bool enable) +static void reset_on_second_timeout(const TestData *td, bool enable) { uint32_t val; - val = readl(RCBA_BASE_ADDR + ICH9_CC_GCS); + val = qtest_readl(td->qts, RCBA_BASE_ADDR + ICH9_CC_GCS); if (enable) { val &= ~ICH9_CC_GCS_NO_REBOOT; } else { val |= ICH9_CC_GCS_NO_REBOOT; } - writel(RCBA_BASE_ADDR + ICH9_CC_GCS, val); + qtest_writel(td->qts, RCBA_BASE_ADDR + ICH9_CC_GCS, val); } static void test_tco_defaults(void) @@ -171,11 +172,11 @@ static void test_tco_timeout(void) stop_tco(&d); clear_tco_status(&d); - reset_on_second_timeout(false); + reset_on_second_timeout(&d, false); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); - clock_step(ticks * TCO_TICK_NSEC); + qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC); /* test first timeout */ val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); @@ -190,7 +191,7 @@ static void test_tco_timeout(void) g_assert(ret == 0); /* test second timeout */ - clock_step(ticks * TCO_TICK_NSEC); + qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC); val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); ret = val & TCO_TIMEOUT ? 1 : 0; g_assert(ret == 1); @@ -215,18 +216,18 @@ static void test_tco_max_timeout(void) stop_tco(&d); clear_tco_status(&d); - reset_on_second_timeout(false); + reset_on_second_timeout(&d, false); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); - clock_step(((ticks & TCO_TMR_MASK) - 1) * TCO_TICK_NSEC); + qtest_clock_step(d.qts, ((ticks & TCO_TMR_MASK) - 1) * TCO_TICK_NSEC); val = qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD); g_assert_cmpint(val & TCO_RLD_MASK, ==, 1); val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); ret = val & TCO_TIMEOUT ? 1 : 0; g_assert(ret == 0); - clock_step(TCO_TICK_NSEC); + qtest_clock_step(d.qts, TCO_TICK_NSEC); val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); ret = val & TCO_TIMEOUT ? 1 : 0; g_assert(ret == 1); @@ -235,9 +236,9 @@ static void test_tco_max_timeout(void) test_end(&d); } -static QDict *get_watchdog_action(void) +static QDict *get_watchdog_action(const TestData *td) { - QDict *ev = qmp_eventwait_ref("WATCHDOG"); + QDict *ev = qtest_qmp_eventwait_ref(td->qts, "WATCHDOG"); QDict *data; data = qdict_get_qdict(ev, "data"); @@ -258,12 +259,12 @@ static void test_tco_second_timeout_pause(void) stop_tco(&td); clear_tco_status(&td); - reset_on_second_timeout(true); + reset_on_second_timeout(&td, true); set_tco_timeout(&td, TCO_SECS_TO_TICKS(16)); load_tco(&td); start_tco(&td); - clock_step(ticks * TCO_TICK_NSEC * 2); - ad = get_watchdog_action(); + qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2); + ad = get_watchdog_action(&td); g_assert(!strcmp(qdict_get_str(ad, "action"), "pause")); qobject_unref(ad); @@ -283,12 +284,12 @@ static void test_tco_second_timeout_reset(void) stop_tco(&td); clear_tco_status(&td); - reset_on_second_timeout(true); + reset_on_second_timeout(&td, true); set_tco_timeout(&td, TCO_SECS_TO_TICKS(16)); load_tco(&td); start_tco(&td); - clock_step(ticks * TCO_TICK_NSEC * 2); - ad = get_watchdog_action(); + qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2); + ad = get_watchdog_action(&td); g_assert(!strcmp(qdict_get_str(ad, "action"), "reset")); qobject_unref(ad); @@ -308,12 +309,12 @@ static void test_tco_second_timeout_shutdown(void) stop_tco(&td); clear_tco_status(&td); - reset_on_second_timeout(true); + reset_on_second_timeout(&td, true); set_tco_timeout(&td, ticks); load_tco(&td); start_tco(&td); - clock_step(ticks * TCO_TICK_NSEC * 2); - ad = get_watchdog_action(); + qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2); + ad = get_watchdog_action(&td); g_assert(!strcmp(qdict_get_str(ad, "action"), "shutdown")); qobject_unref(ad); @@ -333,12 +334,12 @@ static void test_tco_second_timeout_none(void) stop_tco(&td); clear_tco_status(&td); - reset_on_second_timeout(true); + reset_on_second_timeout(&td, true); set_tco_timeout(&td, ticks); load_tco(&td); start_tco(&td); - clock_step(ticks * TCO_TICK_NSEC * 2); - ad = get_watchdog_action(); + qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2); + ad = get_watchdog_action(&td); g_assert(!strcmp(qdict_get_str(ad, "action"), "none")); qobject_unref(ad); @@ -358,7 +359,7 @@ static void test_tco_ticks_counter(void) stop_tco(&d); clear_tco_status(&d); - reset_on_second_timeout(false); + reset_on_second_timeout(&d, false); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); @@ -366,7 +367,7 @@ static void test_tco_ticks_counter(void) do { rld = qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD) & TCO_RLD_MASK; g_assert_cmpint(rld, ==, ticks); - clock_step(TCO_TICK_NSEC); + qtest_clock_step(d.qts, TCO_TICK_NSEC); ticks--; } while (!(qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS) & TCO_TIMEOUT)); @@ -405,11 +406,11 @@ static void test_tco1_status_bits(void) stop_tco(&d); clear_tco_status(&d); - reset_on_second_timeout(false); + reset_on_second_timeout(&d, false); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); - clock_step(ticks * TCO_TICK_NSEC); + qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC); qpci_io_writeb(d.dev, d.tco_io_bar, TCO_DAT_IN, 0); qpci_io_writeb(d.dev, d.tco_io_bar, TCO_DAT_OUT, 0); @@ -434,11 +435,11 @@ static void test_tco2_status_bits(void) stop_tco(&d); clear_tco_status(&d); - reset_on_second_timeout(true); + reset_on_second_timeout(&d, true); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); - clock_step(ticks * TCO_TICK_NSEC * 2); + qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC * 2); val = qpci_io_readw(d.dev, d.tco_io_bar, TCO2_STS); ret = val & (TCO_SECOND_TO_STS | TCO_BOOT_STS) ? 1 : 0; From patchwork Tue Apr 9 08:52:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 1082041 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44dh3C2vjGz9sRV for ; Tue, 9 Apr 2019 18:56:07 +1000 (AEST) Received: from localhost ([127.0.0.1]:37705 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmY1-000610-7H for incoming@patchwork.ozlabs.org; Tue, 09 Apr 2019 04:56:05 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmV3-00044C-07 for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDmV2-0002u0-3a for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55814) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDmV0-0002t3-1Y; Tue, 09 Apr 2019 04:52:58 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5A1702D7E4; Tue, 9 Apr 2019 08:52:57 +0000 (UTC) Received: from thuth.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id 573B41A917; Tue, 9 Apr 2019 08:52:55 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org Date: Tue, 9 Apr 2019 10:52:42 +0200 Message-Id: <20190409085245.31548-3-thuth@redhat.com> In-Reply-To: <20190409085245.31548-1-thuth@redhat.com> References: <20190409085245.31548-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 09 Apr 2019 08:52:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 2/5] tests/megasas: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , qemu-block@nongnu.org, armbru@redhat.com, "Dr. David Alan Gilbert" , Hannes Reinecke , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The test uses memwrite() and thus relies on global_qtest. Let's replace it with qtest_memwrite(), so that we are independent from global_qtest here. Signed-off-by: Thomas Huth --- tests/megasas-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/megasas-test.c b/tests/megasas-test.c index 33aa97042c..1111d331d3 100644 --- a/tests/megasas-test.c +++ b/tests/megasas-test.c @@ -66,7 +66,7 @@ static void megasas_pd_get_info_fuzz(void *obj, void *data, QGuestAllocator *all context[7] = cpu_to_le32(0); context_pa = guest_alloc(alloc, sizeof(context)); - memwrite(context_pa, context, sizeof(context)); + qtest_memwrite(dev->bus->qts, context_pa, context, sizeof(context)); qpci_io_writel(dev, bar, 0x40, context_pa); } From patchwork Tue Apr 9 08:52:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 1082037 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44dh0c0dVXz9sR7 for ; Tue, 9 Apr 2019 18:53:52 +1000 (AEST) Received: from localhost ([127.0.0.1]:37650 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmVp-00048u-WE for incoming@patchwork.ozlabs.org; Tue, 09 Apr 2019 04:53:50 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49356) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmV5-00046q-K9 for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDmV4-0002vY-NC for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51468) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDmV2-0002tx-Db; Tue, 09 Apr 2019 04:53:00 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id AE30110C6E; Tue, 9 Apr 2019 08:52:59 +0000 (UTC) Received: from thuth.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id A31C01A917; Tue, 9 Apr 2019 08:52:57 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org Date: Tue, 9 Apr 2019 10:52:43 +0200 Message-Id: <20190409085245.31548-4-thuth@redhat.com> In-Reply-To: <20190409085245.31548-1-thuth@redhat.com> References: <20190409085245.31548-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 09 Apr 2019 08:52:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 3/5] tests/qmp-cmd-test: Use qtest_init() instead of qtest_start() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , qemu-block@nongnu.org, armbru@redhat.com, "Dr. David Alan Gilbert" , Hannes Reinecke , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" qtest_start() + qtest_end() should be avoided, since they use the global_qtest variable that we want to get rid of in the long run (since global_qtest can not be used in tests that have to track multiple QEMU states, like migration tests). Use qtest_init() and qtest_quit() instead. Signed-off-by: Thomas Huth --- tests/qmp-cmd-test.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/tests/qmp-cmd-test.c b/tests/qmp-cmd-test.c index d12cac539c..9f5228cd99 100644 --- a/tests/qmp-cmd-test.c +++ b/tests/qmp-cmd-test.c @@ -61,10 +61,11 @@ static void test_query(const void *data) int expected_error_class = query_error_class(cmd); QDict *resp, *error; const char *error_class; + QTestState *qts; - qtest_start(common_args); + qts = qtest_init(common_args); - resp = qmp("{ 'execute': %s }", cmd); + resp = qtest_qmp(qts, "{ 'execute': %s }", cmd); error = qdict_get_qdict(resp, "error"); error_class = error ? qdict_get_str(error, "class") : NULL; @@ -78,7 +79,7 @@ static void test_query(const void *data) } qobject_unref(resp); - qtest_end(); + qtest_quit(qts); } static bool query_is_blacklisted(const char *cmd) @@ -118,16 +119,18 @@ static void qmp_schema_init(QmpSchema *schema) QDict *resp; Visitor *qiv; SchemaInfoList *tail; + QTestState *qts; - qtest_start(common_args); - resp = qmp("{ 'execute': 'query-qmp-schema' }"); + qts = qtest_init(common_args); + + resp = qtest_qmp(qts, "{ 'execute': 'query-qmp-schema' }"); qiv = qobject_input_visitor_new(qdict_get(resp, "return")); visit_type_SchemaInfoList(qiv, NULL, &schema->list, &error_abort); visit_free(qiv); qobject_unref(resp); - qtest_end(); + qtest_quit(qts); schema->hash = g_hash_table_new(g_str_hash, g_str_equal); From patchwork Tue Apr 9 08:52:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 1082040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44dh3850TSz9sRV for ; Tue, 9 Apr 2019 18:56:04 +1000 (AEST) Received: from localhost ([127.0.0.1]:37703 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmXy-0005yz-Fj for incoming@patchwork.ozlabs.org; Tue, 09 Apr 2019 04:56:02 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49393) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmVC-0004Be-KC for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDmV9-0002wj-3o for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51548) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDmV4-0002vO-Nl; Tue, 09 Apr 2019 04:53:02 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 05198308222E; Tue, 9 Apr 2019 08:53:02 +0000 (UTC) Received: from thuth.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id 03CEF1A917; Tue, 9 Apr 2019 08:52:59 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org Date: Tue, 9 Apr 2019 10:52:44 +0200 Message-Id: <20190409085245.31548-5-thuth@redhat.com> In-Reply-To: <20190409085245.31548-1-thuth@redhat.com> References: <20190409085245.31548-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Tue, 09 Apr 2019 08:53:02 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 4/5] tests/test-hmp: Use qtest_init() instead of qtest_start() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , qemu-block@nongnu.org, armbru@redhat.com, "Dr. David Alan Gilbert" , Hannes Reinecke , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" qtest_start() + qtest_end() should be avoided, since they use the global_qtest variable that we want to get rid of in the long run Use qtest_init() and qtest_quit() instead. Signed-off-by: Thomas Huth Reviewed-by: Dr. David Alan Gilbert --- tests/test-hmp.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/tests/test-hmp.c b/tests/test-hmp.c index 54a01824dc..f0d843e34a 100644 --- a/tests/test-hmp.c +++ b/tests/test-hmp.c @@ -72,13 +72,13 @@ static const char *hmp_cmds[] = { }; /* Run through the list of pre-defined commands */ -static void test_commands(void) +static void test_commands(QTestState *qts) { char *response; int i; for (i = 0; hmp_cmds[i] != NULL; i++) { - response = hmp("%s", hmp_cmds[i]); + response = qtest_hmp(qts, "%s", hmp_cmds[i]); if (verbose) { fprintf(stderr, "\texecute HMP command: %s\n" @@ -91,11 +91,11 @@ static void test_commands(void) } /* Run through all info commands and call them blindly (without arguments) */ -static void test_info_commands(void) +static void test_info_commands(QTestState *qts) { char *resp, *info, *info_buf, *endp; - info_buf = info = hmp("help info"); + info_buf = info = qtest_hmp(qts, "help info"); while (*info) { /* Extract the info command, ignore parameters and description */ @@ -107,7 +107,7 @@ static void test_info_commands(void) if (verbose) { fprintf(stderr, "\t%s\n", info); } - resp = hmp("%s", info); + resp = qtest_hmp(qts, "%s", info); g_free(resp); /* And move forward to the next line */ info = strchr(endp + 1, '\n'); @@ -124,14 +124,15 @@ static void test_machine(gconstpointer data) { const char *machine = data; char *args; + QTestState *qts; args = g_strdup_printf("-S -M %s", machine); - qtest_start(args); + qts = qtest_init(args); - test_info_commands(); - test_commands(); + test_info_commands(qts); + test_commands(qts); - qtest_end(); + qtest_quit(qts); g_free(args); g_free((void *)data); } From patchwork Tue Apr 9 08:52:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 1082042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44dh3R1NPLz9sRV for ; Tue, 9 Apr 2019 18:56:17 +1000 (AEST) Received: from localhost ([127.0.0.1]:37710 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmY8-00069F-FB for incoming@patchwork.ozlabs.org; Tue, 09 Apr 2019 04:56:12 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49445) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDmVK-0004Iq-CU for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDmVH-0002yu-HD for qemu-devel@nongnu.org; Tue, 09 Apr 2019 04:53:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51520) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDmVA-0002wU-Ns; Tue, 09 Apr 2019 04:53:09 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 81F3664D87; Tue, 9 Apr 2019 08:53:06 +0000 (UTC) Received: from thuth.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4FF371A917; Tue, 9 Apr 2019 08:53:02 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org Date: Tue, 9 Apr 2019 10:52:45 +0200 Message-Id: <20190409085245.31548-6-thuth@redhat.com> In-Reply-To: <20190409085245.31548-1-thuth@redhat.com> References: <20190409085245.31548-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 09 Apr 2019 08:53:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 5/5] tests/ide-test: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , qemu-block@nongnu.org, armbru@redhat.com, "Dr. David Alan Gilbert" , Hannes Reinecke , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Pass around the QTestState, so we do not need the problematic global_qtest variable (which causes trouble for tests that have multiple test states) here anymore. Signed-off-by: Thomas Huth --- tests/ide-test.c | 284 ++++++++++++++++++++++++++--------------------- 1 file changed, 159 insertions(+), 125 deletions(-) diff --git a/tests/ide-test.c b/tests/ide-test.c index d863a99f7f..0277e7d5a9 100644 --- a/tests/ide-test.c +++ b/tests/ide-test.c @@ -36,7 +36,7 @@ #include "hw/pci/pci_regs.h" /* TODO actually test the results and get rid of this */ -#define qmp_discard_response(...) qobject_unref(qmp(__VA_ARGS__)) +#define qmp_discard_response(q, ...) qobject_unref(qtest_qmp(q, __VA_ARGS__)) #define TEST_IMAGE_SIZE 64 * 1024 * 1024 @@ -125,38 +125,38 @@ static QGuestAllocator guest_malloc; static char tmp_path[] = "/tmp/qtest.XXXXXX"; static char debug_path[] = "/tmp/qtest-blkdebug.XXXXXX"; -static void ide_test_start(const char *cmdline_fmt, ...) +static QTestState *ide_test_start(const char *cmdline_fmt, ...) { + QTestState *qts; va_list ap; - char *cmdline; va_start(ap, cmdline_fmt); - cmdline = g_strdup_vprintf(cmdline_fmt, ap); + qts = qtest_vinitf(cmdline_fmt, ap); va_end(ap); - qtest_start(cmdline); - pc_alloc_init(&guest_malloc, global_qtest, 0); + pc_alloc_init(&guest_malloc, qts, 0); - g_free(cmdline); + return qts; } -static void ide_test_quit(void) +static void ide_test_quit(QTestState *qts) { if (pcibus) { qpci_free_pc(pcibus); pcibus = NULL; } alloc_destroy(&guest_malloc); - qtest_end(); + qtest_quit(qts); } -static QPCIDevice *get_pci_device(QPCIBar *bmdma_bar, QPCIBar *ide_bar) +static QPCIDevice *get_pci_device(QTestState *qts, QPCIBar *bmdma_bar, + QPCIBar *ide_bar) { QPCIDevice *dev; uint16_t vendor_id, device_id; if (!pcibus) { - pcibus = qpci_new_pc(global_qtest, NULL); + pcibus = qpci_new_pc(qts, NULL); } /* Find PCI device and verify it's the right one */ @@ -198,8 +198,8 @@ static uint64_t trim_range_le(uint64_t sector, uint16_t count) return cpu_to_le64(((uint64_t)count << 48) + sector); } -static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, - PrdtEntry *prdt, int prdt_entries, +static int send_dma_request(QTestState *qts, int cmd, uint64_t sector, + int nb_sectors, PrdtEntry *prdt, int prdt_entries, void(*post_exec)(QPCIDevice *dev, QPCIBar ide_bar, uint64_t sector, int nb_sectors)) { @@ -211,7 +211,7 @@ static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, uint8_t status; int flags; - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); flags = cmd & ~0xff; cmd &= 0xff; @@ -246,7 +246,7 @@ static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, /* Setup PRDT */ len = sizeof(*prdt) * prdt_entries; guest_prdt = guest_alloc(&guest_malloc, len); - memwrite(guest_prdt, prdt, len); + qtest_memwrite(qts, guest_prdt, prdt, len); qpci_io_writel(dev, bmdma_bar, bmreg_prdt, guest_prdt); /* ATA DMA command */ @@ -283,14 +283,15 @@ static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, status = qpci_io_readb(dev, bmdma_bar, bmreg_status); } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE); - g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR)); + g_assert_cmpint(qtest_get_irq(qts, IDE_PRIMARY_IRQ), ==, + !!(status & BM_STS_INTR)); /* Check IDE status code */ assert_bit_set(qpci_io_readb(dev, ide_bar, reg_status), DRDY); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), BSY | DRQ); /* Reading the status register clears the IRQ */ - g_assert(!get_irq(IDE_PRIMARY_IRQ)); + g_assert(!qtest_get_irq(qts, IDE_PRIMARY_IRQ)); /* Stop DMA transfer if still active */ if (status & BM_STS_ACTIVE) { @@ -302,42 +303,61 @@ static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, return status; } +static QTestState *test_bmdma_setup(void) +{ + QTestState *qts; + + qts = ide_test_start( + "-drive file=%s,if=ide,cache=writeback,format=raw " + "-global ide-hd.serial=%s -global ide-hd.ver=%s", + tmp_path, "testdisk", "version"); + qtest_irq_intercept_in(qts, "ioapic"); + + return qts; +} + +static void test_bmdma_teardown(QTestState *qts) +{ + ide_test_quit(qts); +} + static void test_bmdma_simple_rw(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; uint8_t *buf; uint8_t *cmpbuf; size_t len = 512; - uintptr_t guest_buf = guest_alloc(&guest_malloc, len); + uintptr_t guest_buf; + PrdtEntry prdt[1]; - PrdtEntry prdt[] = { - { - .addr = cpu_to_le32(guest_buf), - .size = cpu_to_le32(len | PRDT_EOT), - }, - }; + qts = test_bmdma_setup(); + + guest_buf = guest_alloc(&guest_malloc, len); + prdt[0].addr = cpu_to_le32(guest_buf); + prdt[0].size = cpu_to_le32(len | PRDT_EOT); - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); buf = g_malloc(len); cmpbuf = g_malloc(len); /* Write 0x55 pattern to sector 0 */ memset(buf, 0x55, len); - memwrite(guest_buf, buf, len); + qtest_memwrite(qts, guest_buf, buf, len); - status = send_dma_request(CMD_WRITE_DMA, 0, 1, prdt, + status = send_dma_request(qts, CMD_WRITE_DMA, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); /* Write 0xaa pattern to sector 1 */ memset(buf, 0xaa, len); - memwrite(guest_buf, buf, len); + qtest_memwrite(qts, guest_buf, buf, len); - status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, + status = send_dma_request(qts, CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); @@ -345,31 +365,35 @@ static void test_bmdma_simple_rw(void) /* Read and verify 0x55 pattern in sector 0 */ memset(cmpbuf, 0x55, len); - status = send_dma_request(CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); + status = send_dma_request(qts, CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt), + NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); - memread(guest_buf, buf, len); + qtest_memread(qts, guest_buf, buf, len); g_assert(memcmp(buf, cmpbuf, len) == 0); /* Read and verify 0xaa pattern in sector 1 */ memset(cmpbuf, 0xaa, len); - status = send_dma_request(CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt), NULL); + status = send_dma_request(qts, CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt), + NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); - memread(guest_buf, buf, len); + qtest_memread(qts, guest_buf, buf, len); g_assert(memcmp(buf, cmpbuf, len) == 0); - free_pci_device(dev); g_free(buf); g_free(cmpbuf); + + test_bmdma_teardown(qts); } static void test_bmdma_trim(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; @@ -380,16 +404,16 @@ static void test_bmdma_trim(void) const uint64_t bad_range = trim_range_le(TEST_IMAGE_SIZE / 512 - 1, 2); size_t len = 512; uint8_t *buf; - uintptr_t guest_buf = guest_alloc(&guest_malloc, len); + uintptr_t guest_buf; + PrdtEntry prdt[1]; - PrdtEntry prdt[] = { - { - .addr = cpu_to_le32(guest_buf), - .size = cpu_to_le32(len | PRDT_EOT), - }, - }; + qts = test_bmdma_setup(); + + guest_buf = guest_alloc(&guest_malloc, len); + prdt[0].addr = cpu_to_le32(guest_buf), + prdt[0].size = cpu_to_le32(len | PRDT_EOT), - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); buf = g_malloc(len); @@ -397,9 +421,9 @@ static void test_bmdma_trim(void) *((uint64_t *)buf) = trim_range[0]; *((uint64_t *)buf + 1) = trim_range[1]; - memwrite(guest_buf, buf, 2 * sizeof(uint64_t)); + qtest_memwrite(qts, guest_buf, buf, 2 * sizeof(uint64_t)); - status = send_dma_request(CMD_DSM, 0, 1, prdt, + status = send_dma_request(qts, CMD_DSM, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); @@ -408,9 +432,9 @@ static void test_bmdma_trim(void) *((uint64_t *)buf) = trim_range[2]; *((uint64_t *)buf + 1) = bad_range; - memwrite(guest_buf, buf, 2 * sizeof(uint64_t)); + qtest_memwrite(qts, guest_buf, buf, 2 * sizeof(uint64_t)); - status = send_dma_request(CMD_DSM, 0, 1, prdt, + status = send_dma_request(qts, CMD_DSM, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_set(qpci_io_readb(dev, ide_bar, reg_status), ERR); @@ -418,10 +442,12 @@ static void test_bmdma_trim(void) free_pci_device(dev); g_free(buf); + test_bmdma_teardown(qts); } static void test_bmdma_short_prdt(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; @@ -433,24 +459,28 @@ static void test_bmdma_short_prdt(void) }, }; - dev = get_pci_device(&bmdma_bar, &ide_bar); + qts = test_bmdma_setup(); + + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* Normal request */ - status = send_dma_request(CMD_READ_DMA, 0, 1, + status = send_dma_request(qts, CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, 0); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); /* Abort the request before it completes */ - status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1, + status = send_dma_request(qts, CMD_READ_DMA | CMDF_ABORT, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, 0); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); free_pci_device(dev); + test_bmdma_teardown(qts); } static void test_bmdma_one_sector_short_prdt(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; @@ -463,24 +493,28 @@ static void test_bmdma_one_sector_short_prdt(void) }, }; - dev = get_pci_device(&bmdma_bar, &ide_bar); + qts = test_bmdma_setup(); + + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* Normal request */ - status = send_dma_request(CMD_READ_DMA, 0, 2, + status = send_dma_request(qts, CMD_READ_DMA, 0, 2, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, 0); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); /* Abort the request before it completes */ - status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 2, + status = send_dma_request(qts, CMD_READ_DMA | CMDF_ABORT, 0, 2, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, 0); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); free_pci_device(dev); + test_bmdma_teardown(qts); } static void test_bmdma_long_prdt(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; @@ -492,29 +526,35 @@ static void test_bmdma_long_prdt(void) }, }; - dev = get_pci_device(&bmdma_bar, &ide_bar); + qts = test_bmdma_setup(); + + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* Normal request */ - status = send_dma_request(CMD_READ_DMA, 0, 1, + status = send_dma_request(qts, CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); /* Abort the request before it completes */ - status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1, + status = send_dma_request(qts, CMD_READ_DMA | CMDF_ABORT, 0, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); free_pci_device(dev); + test_bmdma_teardown(qts); } static void test_bmdma_no_busmaster(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t status; - dev = get_pci_device(&bmdma_bar, &ide_bar); + qts = test_bmdma_setup(); + + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* No PRDT_EOT, each entry addr 0/size 64k, and in theory qemu shouldn't be * able to access it anyway because the Bus Master bit in the PCI command @@ -522,7 +562,7 @@ static void test_bmdma_no_busmaster(void) * good at confusing and occasionally crashing qemu. */ PrdtEntry prdt[4096] = { }; - status = send_dma_request(CMD_READ_DMA | CMDF_NO_BM, 0, 512, + status = send_dma_request(qts, CMD_READ_DMA | CMDF_NO_BM, 0, 512, prdt, ARRAY_SIZE(prdt), NULL); /* Not entirely clear what the expected result is, but this is what we get @@ -530,20 +570,7 @@ static void test_bmdma_no_busmaster(void) g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); free_pci_device(dev); -} - -static void test_bmdma_setup(void) -{ - ide_test_start( - "-drive file=%s,if=ide,cache=writeback,format=raw " - "-global ide-hd.serial=%s -global ide-hd.ver=%s", - tmp_path, "testdisk", "version"); - qtest_irq_intercept_in(global_qtest, "ioapic"); -} - -static void test_bmdma_teardown(void) -{ - ide_test_quit(); + test_bmdma_teardown(qts); } static void string_cpu_to_be16(uint16_t *s, size_t bytes) @@ -559,6 +586,7 @@ static void string_cpu_to_be16(uint16_t *s, size_t bytes) static void test_identify(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t data; @@ -566,12 +594,12 @@ static void test_identify(void) int i; int ret; - ide_test_start( + qts = ide_test_start( "-drive file=%s,if=ide,cache=writeback,format=raw " "-global ide-hd.serial=%s -global ide-hd.ver=%s", tmp_path, "testdisk", "version"); - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* IDENTIFY command on device 0*/ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -605,7 +633,7 @@ static void test_identify(void) /* Write cache enabled bit */ assert_bit_set(buf[85], 0x20); - ide_test_quit(); + ide_test_quit(qts); free_pci_device(dev); } @@ -613,7 +641,7 @@ static void test_identify(void) * Write sector 1 with random data to make IDE storage dirty * Needed for flush tests so that flushes actually go though the block layer */ -static void make_dirty(uint8_t device) +static void make_dirty(QTestState *qts, uint8_t device) { QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; @@ -622,7 +650,7 @@ static void make_dirty(uint8_t device) uintptr_t guest_buf; void* buf; - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); guest_buf = guest_alloc(&guest_malloc, len); buf = g_malloc(len); @@ -630,7 +658,7 @@ static void make_dirty(uint8_t device) g_assert(guest_buf); g_assert(buf); - memwrite(guest_buf, buf, len); + qtest_memwrite(qts, guest_buf, buf, len); PrdtEntry prdt[] = { { @@ -639,7 +667,7 @@ static void make_dirty(uint8_t device) }, }; - status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, + status = send_dma_request(qts, CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt), NULL); g_assert_cmphex(status, ==, BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_bar, reg_status), DF | ERR); @@ -650,23 +678,24 @@ static void make_dirty(uint8_t device) static void test_flush(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t data; - ide_test_start( + qts = ide_test_start( "-drive file=blkdebug::%s,if=ide,cache=writeback,format=raw", tmp_path); - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); - qtest_irq_intercept_in(global_qtest, "ioapic"); + qtest_irq_intercept_in(qts, "ioapic"); /* Dirty media so that CMD_FLUSH_CACHE will actually go to disk */ - make_dirty(0); + make_dirty(qts, 0); /* Delay the completion of the flush request until we explicitly do it */ - g_free(hmp("qemu-io ide0-hd0 \"break flush_to_os A\"")); + g_free(qtest_hmp(qts, "qemu-io ide0-hd0 \"break flush_to_os A\"")); /* FLUSH CACHE command on device 0*/ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -678,7 +707,7 @@ static void test_flush(void) assert_bit_clear(data, DF | ERR | DRQ); /* Complete the command */ - g_free(hmp("qemu-io ide0-hd0 \"resume A\"")); + g_free(qtest_hmp(qts, "qemu-io ide0-hd0 \"resume A\"")); /* Check registers */ data = qpci_io_readb(dev, ide_bar, reg_device); @@ -691,29 +720,30 @@ static void test_flush(void) assert_bit_set(data, DRDY); assert_bit_clear(data, BSY | DF | ERR | DRQ); - ide_test_quit(); + ide_test_quit(qts); free_pci_device(dev); } static void test_retry_flush(const char *machine) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t data; prepare_blkdebug_script(debug_path, "flush_to_disk"); - ide_test_start( + qts = ide_test_start( "-drive file=blkdebug:%s:%s,if=ide,cache=writeback,format=raw," "rerror=stop,werror=stop", debug_path, tmp_path); - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); - qtest_irq_intercept_in(global_qtest, "ioapic"); + qtest_irq_intercept_in(qts, "ioapic"); /* Dirty media so that CMD_FLUSH_CACHE will actually go to disk */ - make_dirty(0); + make_dirty(qts, 0); /* FLUSH CACHE command on device 0*/ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -724,10 +754,10 @@ static void test_retry_flush(const char *machine) assert_bit_set(data, BSY | DRDY); assert_bit_clear(data, DF | ERR | DRQ); - qmp_eventwait("STOP"); + qtest_qmp_eventwait(qts, "STOP"); /* Complete the command */ - qmp_discard_response("{'execute':'cont' }"); + qmp_discard_response(qts, "{'execute':'cont' }"); /* Check registers */ data = qpci_io_readb(dev, ide_bar, reg_device); @@ -740,18 +770,19 @@ static void test_retry_flush(const char *machine) assert_bit_set(data, DRDY); assert_bit_clear(data, BSY | DF | ERR | DRQ); - ide_test_quit(); + ide_test_quit(qts); free_pci_device(dev); } static void test_flush_nodev(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; - ide_test_start(""); + qts = ide_test_start(""); - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* FLUSH CACHE command on device 0*/ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -760,16 +791,17 @@ static void test_flush_nodev(void) /* Just testing that qemu doesn't crash... */ free_pci_device(dev); - ide_test_quit(); + ide_test_quit(qts); } static void test_flush_empty_drive(void) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; - ide_test_start("-device ide-cd,bus=ide.0"); - dev = get_pci_device(&bmdma_bar, &ide_bar); + qts = ide_test_start("-device ide-cd,bus=ide.0"); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* FLUSH CACHE command on device 0 */ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -778,7 +810,7 @@ static void test_flush_empty_drive(void) /* Just testing that qemu doesn't crash... */ free_pci_device(dev); - ide_test_quit(); + ide_test_quit(qts); } static void test_pci_retry_flush(void) @@ -823,21 +855,21 @@ static void send_scsi_cdb_read10(QPCIDevice *dev, QPCIBar ide_bar, } } -static void nsleep(int64_t nsecs) +static void nsleep(QTestState *qts, int64_t nsecs) { const struct timespec val = { .tv_nsec = nsecs }; nanosleep(&val, NULL); - clock_set(nsecs); + qtest_clock_set(qts, nsecs); } -static uint8_t ide_wait_clear(uint8_t flag) +static uint8_t ide_wait_clear(QTestState *qts, uint8_t flag) { QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; uint8_t data; time_t st; - dev = get_pci_device(&bmdma_bar, &ide_bar); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); /* Wait with a 5 second timeout */ time(&st); @@ -850,26 +882,26 @@ static uint8_t ide_wait_clear(uint8_t flag) if (difftime(time(NULL), st) > 5.0) { break; } - nsleep(400); + nsleep(qts, 400); } g_assert_not_reached(); } -static void ide_wait_intr(int irq) +static void ide_wait_intr(QTestState *qts, int irq) { time_t st; bool intr; time(&st); while (true) { - intr = get_irq(irq); + intr = qtest_get_irq(qts, irq); if (intr) { return; } if (difftime(time(NULL), st) > 5.0) { break; } - nsleep(400); + nsleep(qts, 400); } g_assert_not_reached(); @@ -877,6 +909,7 @@ static void ide_wait_intr(int irq) static void cdrom_pio_impl(int nblocks) { + QTestState *qts; QPCIDevice *dev; QPCIBar bmdma_bar, ide_bar; FILE *fh; @@ -897,10 +930,11 @@ static void cdrom_pio_impl(int nblocks) g_assert_cmpint(ret, ==, patt_blocks); fclose(fh); - ide_test_start("-drive if=none,file=%s,media=cdrom,format=raw,id=sr0,index=0 " - "-device ide-cd,drive=sr0,bus=ide.0", tmp_path); - dev = get_pci_device(&bmdma_bar, &ide_bar); - qtest_irq_intercept_in(global_qtest, "ioapic"); + qts = ide_test_start( + "-drive if=none,file=%s,media=cdrom,format=raw,id=sr0,index=0 " + "-device ide-cd,drive=sr0,bus=ide.0", tmp_path); + dev = get_pci_device(qts, &bmdma_bar, &ide_bar); + qtest_irq_intercept_in(qts, "ioapic"); /* PACKET command on device 0 */ qpci_io_writeb(dev, ide_bar, reg_device, 0); @@ -908,8 +942,8 @@ static void cdrom_pio_impl(int nblocks) qpci_io_writeb(dev, ide_bar, reg_lba_high, (BYTE_COUNT_LIMIT >> 8 & 0xFF)); qpci_io_writeb(dev, ide_bar, reg_command, CMD_PACKET); /* HP0: Check_Status_A State */ - nsleep(400); - data = ide_wait_clear(BSY); + nsleep(qts, 400); + data = ide_wait_clear(qts, BSY); /* HP1: Send_Packet State */ assert_bit_set(data, DRQ | DRDY); assert_bit_clear(data, ERR | DF | BSY); @@ -930,10 +964,10 @@ static void cdrom_pio_impl(int nblocks) size_t rem = (rxsize / 2) - offset; /* HP3: INTRQ_Wait */ - ide_wait_intr(IDE_PRIMARY_IRQ); + ide_wait_intr(qts, IDE_PRIMARY_IRQ); /* HP2: Check_Status_B (and clear IRQ) */ - data = ide_wait_clear(BSY); + data = ide_wait_clear(qts, BSY); assert_bit_set(data, DRQ | DRDY); assert_bit_clear(data, ERR | DF | BSY); @@ -945,17 +979,17 @@ static void cdrom_pio_impl(int nblocks) } /* Check for final completion IRQ */ - ide_wait_intr(IDE_PRIMARY_IRQ); + ide_wait_intr(qts, IDE_PRIMARY_IRQ); /* Sanity check final state */ - data = ide_wait_clear(DRQ); + data = ide_wait_clear(qts, DRQ); assert_bit_set(data, DRDY); assert_bit_clear(data, DRQ | ERR | DF | BSY); g_assert_cmpint(memcmp(pattern, rx, rxsize), ==, 0); g_free(pattern); g_free(rx); - test_bmdma_teardown(); + test_bmdma_teardown(qts); free_pci_device(dev); } @@ -973,6 +1007,7 @@ static void test_cdrom_pio_large(void) static void test_cdrom_dma(void) { + QTestState *qts; static const size_t len = ATAPI_BLOCK_SIZE; size_t ret; char *pattern = g_malloc(ATAPI_BLOCK_SIZE * 16); @@ -981,9 +1016,10 @@ static void test_cdrom_dma(void) PrdtEntry prdt[1]; FILE *fh; - ide_test_start("-drive if=none,file=%s,media=cdrom,format=raw,id=sr0,index=0 " - "-device ide-cd,drive=sr0,bus=ide.0", tmp_path); - qtest_irq_intercept_in(global_qtest, "ioapic"); + qts = ide_test_start( + "-drive if=none,file=%s,media=cdrom,format=raw,id=sr0,index=0 " + "-device ide-cd,drive=sr0,bus=ide.0", tmp_path); + qtest_irq_intercept_in(qts, "ioapic"); guest_buf = guest_alloc(&guest_malloc, len); prdt[0].addr = cpu_to_le32(guest_buf); @@ -995,15 +1031,15 @@ static void test_cdrom_dma(void) g_assert_cmpint(ret, ==, 16); fclose(fh); - send_dma_request(CMD_PACKET, 0, 1, prdt, 1, send_scsi_cdb_read10); + send_dma_request(qts, CMD_PACKET, 0, 1, prdt, 1, send_scsi_cdb_read10); /* Read back data from guest memory into local qtest memory */ - memread(guest_buf, rx, len); + qtest_memread(qts, guest_buf, rx, len); g_assert_cmpint(memcmp(pattern, rx, len), ==, 0); g_free(pattern); g_free(rx); - test_bmdma_teardown(); + test_bmdma_teardown(qts); } int main(int argc, char **argv) @@ -1028,7 +1064,6 @@ int main(int argc, char **argv) qtest_add_func("/ide/identify", test_identify); - qtest_add_func("/ide/bmdma/setup", test_bmdma_setup); qtest_add_func("/ide/bmdma/simple_rw", test_bmdma_simple_rw); qtest_add_func("/ide/bmdma/trim", test_bmdma_trim); qtest_add_func("/ide/bmdma/short_prdt", test_bmdma_short_prdt); @@ -1036,7 +1071,6 @@ int main(int argc, char **argv) test_bmdma_one_sector_short_prdt); qtest_add_func("/ide/bmdma/long_prdt", test_bmdma_long_prdt); qtest_add_func("/ide/bmdma/no_busmaster", test_bmdma_no_busmaster); - qtest_add_func("/ide/bmdma/teardown", test_bmdma_teardown); qtest_add_func("/ide/flush", test_flush); qtest_add_func("/ide/flush/nodev", test_flush_nodev);