From patchwork Wed Jun 6 18:50:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Bader X-Patchwork-Id: 926013 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 411Hmx3tTmz9s2t; Thu, 7 Jun 2018 04:50:41 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1fQdVv-0004RK-WF; Wed, 06 Jun 2018 18:50:32 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1fQdVt-0004RE-SO for kernel-team@lists.ubuntu.com; Wed, 06 Jun 2018 18:50:29 +0000 Received: from 50-201-118-110-static.hfc.comcastbusiness.net ([50.201.118.110] helo=[10.155.52.21]) by youngberry.canonical.com with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1fQdVt-0002v9-Bc for kernel-team@lists.ubuntu.com; Wed, 06 Jun 2018 18:50:29 +0000 Subject: ACK/Cmnt: [SRU][Bionic][PATCH 0/2] Fixes for LP:1773162 To: kernel-team@lists.ubuntu.com References: From: Stefan Bader Openpgp: preference=signencrypt Autocrypt: addr=stefan.bader@canonical.com; prefer-encrypt=mutual; keydata= xsFNBE5mmXEBEADoM0yd6ERIuH2sQjbCGtrt0SFCbpAuOgNy7LSDJw2vZHkZ1bLPtpojdQId 258o/4V+qLWaWLjbQdadzodnVUsvb+LUKJhFRB1kmzVYNxiu7AtxOnNmUn9dl1oS90IACo1B BpaMIunnKu1pp7s3sfzWapsNMwHbYVHXyJeaPFtMqOxd1V7bNEAC9uNjqJ3IG15f5/50+N+w LGkd5QJmp6Hs9RgCXQMDn989+qFnJga390C9JPWYye0sLjQeZTuUgdhebP0nvciOlKwaOC8v K3UwEIbjt+eL18kBq4VBgrqQiMupmTP9oQNYEgk2FiW3iAQ9BXE8VGiglUOF8KIe/2okVjdO nl3VgOHumV+emrE8XFOB2pgVmoklYNvOjaIV7UBesO5/16jbhGVDXskpZkrP/Ip+n9XD/EJM ismF8UcvcL4aPwZf9J03fZT4HARXuig/GXdK7nMgCRChKwsAARjw5f8lUx5iR1wZwSa7HhHP rAclUzjFNK2819/Ke5kM1UuT1X9aqL+uLYQEDB3QfJmdzVv5vHON3O7GOfaxBICo4Z5OdXSQ SRetiJ8YeUhKpWSqP59PSsbJg+nCKvWfkl/XUu5cFO4V/+NfivTttnoFwNhi/4lrBKZDhGVm 6Oo/VytPpGHXt29npHb8x0NsQOsfZeam9Z5ysmePwH/53Np8NQARAQABzTVTdGVmYW4gQmFk ZXIgKENhbm9uaWNhbCkgPHN0ZWZhbi5iYWRlckBjYW5vbmljYWwuY29tPsLBgAQTAQoAKgIb AwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgAIZAQUCWfsxzwUJDf6wvwAKCRDoZ13uy+7Oo8kH D/48NJMchyKB0Iu7kyAgctvPl6LlnJN7Ln2hWKQtMqZDhxGGQTsY3glF9anJ9u3X2J6hOsXR 3n/j56QAVFM1w1w+rLJWIibI6xqR1GOqrW3LQi+gS6LFLLPPZrlW2gCeP/WVoZvGEDHGou8I rnFkjMbKXicdzg4OMXU5ha+uoavO30IfFouiDnzQFdDtAMhqquWIQcPbFNlplu82CeMvSd+J wWUegRySiINLSsMnyrv/DZr/ayo20Hyi5WuHCKFymHIpghUfb0O/0oyVMdwFEu5/Pg9uZvgd X9UV+HPWD8K0+/BX/5TsNSmcUk1zWATcfhG5FcKtiV/AO8i28h3Ht4HmnB7QixY1wN+b3+tc H9wVe8DvPg7XVNPno80G4wzvSjW06EWa+rYWnbDyqgfyeI4jGb06Ak/jJKo7bHFY3Keq2ljj nutnYcuqVTNCs/uDV2ikEQsWUUCT7VZtHSEeBqMtzEQ3mxJcoVBJ98vYwSJ/cB/zeIqDT53s jwHeMQScu4T2EFCjYsuAiUNrDaN5Z89mcQgXjL9qhU+eVzENq1FvPeyaDvfr/B7tn588VAs+ Dw68j5Yqx1oEiY7VtxufcYlutJTqhikfuict6yjC4vh7t5ldTqGiiJ3g4HtC3cC4BeEW/uPw IGH41XIwvBDJoybmC1FFyDJM8n8PR19su8snIc7BTQROZplxARAAwpEX7ktXAMdNsk7JPYMg GqXEJ6W+hAWsuNAofyD6zBdohuBdAl+qbirm441W6i+oxCspLKj2+e1bvVgLn8uEZb9zsM2s pplpNNAkTglUrhFft24pAU5xf5flVQr3HDZaR7AAzC53GgE70jo9Ygl3opMTQJNiwN4PR/Ls +5UFIY54tOYsQWRgxm2sQejnZoefKvJP4qKERB8qn5XkoNc6bgcWBilboNnWly0r0CO8OfXm Dvy9WKS7btbDM6kcmHUlMgojXFwzvyqNttaNjX3akPShE9Ws/EE7AZ2Xk7I7JOFZ2MI3PWRG DeywE1q4c/L4CNnj/NJV8V5vZMfNTbm5zj8Z2ub4PQ4cWRI6PAPsxOHOW0Lkgidxk5zmpV7A M9C8JNR9ZxcIs1Kr5jyPHgKmRnmaCeNPbg3DYtga0fluzI18TzOZODNszIjXyLzQY3JQSxP5 u563MTSzpNc/ykIhVWUIbR16Dk1FpiDWfhNxiCU9g06BcVKGhFthnV9K46hHq21GqKOkgV+x 8ZowM7HjQ/SGrRk8YDfhISVIiFiuFDh9+N3qwex4GvfFnhM2U6u1tjb8J6jlQKthJZz4R6w/ fJ1iAWTzhLusYIsr1RX1yRpkQTEQUfvIQY319OuN5y6t8GDq2WzXz/HSVUGeBsSOji03MGDY In6qf0iCcxNbYJMAEQEAAcLBZQQYAQoADwIbDAUCWfsxtgUJDcNdPwAKCRDoZ13uy+7OoxwI D/9qrdQpoh+4FykI2CMnI3ad2BYy6xuo4gK2pWIcdgQzDAnj3DueMR2TTGNva+4GFRDEAyIO UX24DPtmsFUcuH2ughUEZtp9kY818Jm/R+nnHBXZ6iiYUaO5jDRbn0izKOmbLcUqv1yiY2xH 9R/MYFvYMju5CtuAavqYx8uKE2bjOV9+ypMYdlo63wU0mUlg5KSeynVpyiQIJeA6EzBz3Wmf W0v8jFz7ydnFSJsL02JOzSSK1wYa5l6BdhotkCmzzXbPovCLxD4/Y014K84epSKGPfdt5QT0 7T1itPDS3CnTrvAeWVQLhhaZ5WvFweOL2XSqNJVorQvdu//hTVwmX+nyhAZ7jJRiUya5+EYe 1v5x8APto0G8QSvwFVeOwuHwOv9ribia0BXinSoEUb5jcWP0xG82u/oKNBtCSS8t/CxApmb0 +jqA/4I+BEmNj9ZkoIbYofCjPRPxXqPQoOVG4wmrU/TIKQav+G2gccVjKrSPDwRGYhy2cASg FaizWurk1ikDL0abYS6cOjd+2559i2oZkxCi7LJnFOkkNo6Fv/1C4SwTUNx+0R+Y72N20wO2 5R47/A54JJH5BqndNfpkwYGvHFW9z4dEjohTBlhOcfZtDL63sM3n0KMPRgdX2phCzdyjTQ40 Dti/p8JIn8NSXV45VmPHnPB444ly1ZCBlDUoZQ== Message-ID: Date: Wed, 6 Jun 2018 11:50:19 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" On 25.05.2018 15:39, Joseph Salisbury wrote: > BugLink: http://bugs.launchpad.net/bugs/1773162 > > == SRU Justification == > IBM reports that 4.15.0-22-generic fails to boot on IBM S822LC (POWER8 > (raw), altivec supported). The system then gets stuck in a reboot > cycle. > > It was found that Bionic commit 06f7e3d39f2f was the cause of this > regression. IBM believes the backport of this commit for CVE-2018-3639 (powerpc) was > done incorrectly. > > I reverted the backport of commit 06f7e3d39f2f. I then performed a new > backport of mainline commit a048a07d7f45. I built a test kernel for IBM > who tested this kernel. It was reported this new backport resolves the > bug. > > == Fixes == > Revert "powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit" > a048a07d7f45 ("powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit") > > == Regression Potential == > Low. Fixes a regression and limited to powerpc. > > == Test Case == > A test kernel was built with the revert and second backport. IBM tested > this new patch and stated the test kernel resolved the bug. > > Joseph Salisbury (1): > Revert "powerpc/64s: Add support for a store forwarding barrier at > kernel entry/exit" > > Nicholas Piggin (1): > powerpc/64s: Add support for a store forwarding barrier at kernel > entry/exit > > arch/powerpc/include/asm/exception-64s.h | 6 +- > arch/powerpc/include/asm/security_features.h | 11 ++ > arch/powerpc/include/asm/setup.h | 12 +-- > arch/powerpc/kernel/security.c | 149 +++++++++++++++++++++++++++ > arch/powerpc/kernel/setup_64.c | 119 +-------------------- > arch/powerpc/lib/feature-fixups.c | 16 ++- > arch/powerpc/platforms/powernv/setup.c | 2 +- > 7 files changed, 183 insertions(+), 132 deletions(-) > Looking at the complete delta (revert + new patch applied) it rather feels like the patch we had was some older variant of the current one. But given this got successful testing: Acked-by: Stefan Bader diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index d89411a..48732b1 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h @@ -76,9 +76,9 @@ #define STF_ENTRY_BARRIER_SLOT \ STF_ENTRY_BARRIER_FIXUP_SECTION; \ - mflr r10; \ - bl stf_barrier_fallback; \ - mtlr r10 + nop; \ + nop; \ + nop #define STF_EXIT_BARRIER_SLOT \ STF_EXIT_BARRIER_FIXUP_SECTION; \ diff --git a/arch/powerpc/include/asm/security_features.h b/arch/powerpc/include/asm/security_features.h index 400a905..33c5d1f 100644 --- a/arch/powerpc/include/asm/security_features.h +++ b/arch/powerpc/include/asm/security_features.h @@ -12,6 +12,17 @@ extern unsigned long powerpc_security_features; extern bool rfi_flush; +/* These are bit flags */ +enum stf_barrier_type { + STF_BARRIER_NONE = 0x1, + STF_BARRIER_FALLBACK = 0x2, + STF_BARRIER_EIEIO = 0x4, + STF_BARRIER_SYNC_ORI = 0x8, +}; + +void setup_stf_barrier(void); +void do_stf_barrier_fixups(enum stf_barrier_type types); + static inline void security_ftr_set(unsigned long feature) { powerpc_security_features |= feature; diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h index 39baa94..bbcdf929 100644 --- a/arch/powerpc/include/asm/setup.h +++ b/arch/powerpc/include/asm/setup.h @@ -39,17 +39,9 @@ static inline void pseries_big_endian_exceptions(void) {} static inline void pseries_little_endian_exceptions(void) {} #endif /* CONFIG_PPC_PSERIES */ -/* These are bit flags */ -enum stf_barrier_type { - STF_BARRIER_NONE = 0x1, - STF_BARRIER_FALLBACK = 0x2, - STF_BARRIER_EIEIO = 0x4, - STF_BARRIER_SYNC_ORI = 0x8, -}; - -void setup_stf_barrier(void); -void do_stf_barrier_fixups(enum stf_barrier_type types); +void rfi_flush_enable(bool enable); +/* These are bit flags */ enum l1d_flush_type { L1D_FLUSH_NONE = 0x1, L1D_FLUSH_FALLBACK = 0x2, diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c index 2cee3dc..60402d7 100644 --- a/arch/powerpc/kernel/security.c +++ b/arch/powerpc/kernel/security.c @@ -8,6 +8,7 @@ #include #include +#include #include @@ -91,3 +92,151 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c return s.len; } + +/* + * Store-forwarding barrier support. + */ + +static enum stf_barrier_type stf_enabled_flush_types; +static bool no_stf_barrier; +bool stf_barrier; + +static int __init handle_no_stf_barrier(char *p) +{ + pr_info("stf-barrier: disabled on command line."); + no_stf_barrier = true; + return 0; +} + +early_param("no_stf_barrier", handle_no_stf_barrier); + +/* This is the generic flag used by other architectures */ +static int __init handle_ssbd(char *p) +{ + if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) { + /* Until firmware tells us, we have the barrier with auto */ + return 0; + } else if (strncmp(p, "off", 3) == 0) { + handle_no_stf_barrier(NULL); + return 0; + } else + return 1; + + return 0; +} +early_param("spec_store_bypass_disable", handle_ssbd); + +/* This is the generic flag used by other architectures */ +static int __init handle_no_ssbd(char *p) +{ + handle_no_stf_barrier(NULL); + return 0; +} +early_param("nospec_store_bypass_disable", handle_no_ssbd); + +static void stf_barrier_enable(bool enable) +{ + if (enable) + do_stf_barrier_fixups(stf_enabled_flush_types); + else + do_stf_barrier_fixups(STF_BARRIER_NONE); + + stf_barrier = enable; +} + +void setup_stf_barrier(void) +{ + enum stf_barrier_type type; + bool enable, hv; + + hv = cpu_has_feature(CPU_FTR_HVMODE); + + /* Default to fallback in case fw-features are not available */ + if (cpu_has_feature(CPU_FTR_ARCH_300)) + type = STF_BARRIER_EIEIO; + else if (cpu_has_feature(CPU_FTR_ARCH_207S)) + type = STF_BARRIER_SYNC_ORI; + else if (cpu_has_feature(CPU_FTR_ARCH_206)) + type = STF_BARRIER_FALLBACK; + else + type = STF_BARRIER_NONE; + + enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && + (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) || + (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv)); + + if (type == STF_BARRIER_FALLBACK) { + pr_info("stf-barrier: fallback barrier available\n"); + } else if (type == STF_BARRIER_SYNC_ORI) { + pr_info("stf-barrier: hwsync barrier available\n"); + } else if (type == STF_BARRIER_EIEIO) { + pr_info("stf-barrier: eieio barrier available\n"); + } + + stf_enabled_flush_types = type; + + if (!no_stf_barrier) + stf_barrier_enable(enable); +} + +ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf) +{ + if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) { + const char *type; + switch (stf_enabled_flush_types) { + case STF_BARRIER_EIEIO: + type = "eieio"; + break; + case STF_BARRIER_SYNC_ORI: + type = "hwsync"; + break; + case STF_BARRIER_FALLBACK: + type = "fallback"; + break; + default: + type = "unknown"; + } + return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type); + } + + if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && + !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)) + return sprintf(buf, "Not affected\n"); + + return sprintf(buf, "Vulnerable\n"); +} + +#ifdef CONFIG_DEBUG_FS +static int stf_barrier_set(void *data, u64 val) +{ + bool enable; + + if (val == 1) + enable = true; + else if (val == 0) + enable = false; + else + return -EINVAL; + + /* Only do anything if we're changing state */ + if (enable != stf_barrier) + stf_barrier_enable(enable); + + return 0; +} + +static int stf_barrier_get(void *data, u64 *val) +{ + *val = stf_barrier ? 1 : 0; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n"); + +static __init int stf_barrier_debugfs_init(void) +{ + debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier); + return 0; +} +device_initcall(stf_barrier_debugfs_init); +#endif /* CONFIG_DEBUG_FS */ diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 288389e..b8e2b5c 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -69,7 +69,6 @@ #include #include #include -#include #include "setup.h" @@ -805,48 +804,11 @@ static int __init disable_hardlockup_detector(void) early_initcall(disable_hardlockup_detector); #ifdef CONFIG_PPC_BOOK3S_64 -static enum stf_barrier_type stf_enabled_flush_types; -static bool no_stf_barrier; -bool stf_barrier; - -static enum l1d_flush_type rfi_enabled_flush_types; +static enum l1d_flush_type enabled_flush_types; static void *l1d_flush_fallback_area; static bool no_rfi_flush; bool rfi_flush; -static int __init handle_no_stf_barrier(char *p) -{ - pr_info("stf-barrier: disabled on command line."); - no_stf_barrier = true; - return 0; -} - -early_param("no_stf_barrier", handle_no_stf_barrier); - -/* This is the generic flag used by other architectures */ -static int __init handle_ssbd(char *p) -{ - if (!p || strncmp(p, "off", 3) == 0) { - handle_no_stf_barrier(NULL); - return 0; - } else if (strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) - /* Until firmware tells us, we have the barrier with auto */ - return 0; - else - return 1; - - return 0; -} -early_param("spec_store_bypass_disable", handle_ssbd); - -/* This is the generic flag used by other architectures */ -static int __init handle_no_ssbd(char *p) -{ - handle_no_stf_barrier(NULL); - return 0; -} -early_param("nospec_store_bypass_disable", handle_no_ssbd); - static int __init handle_no_rfi_flush(char *p) { pr_info("rfi-flush: disabled on command line."); @@ -875,21 +837,10 @@ static void do_nothing(void *unused) */ } -static void stf_barrier_enable(bool enable) -{ - if (enable) { - do_stf_barrier_fixups(stf_enabled_flush_types); - on_each_cpu(do_nothing, NULL, 1); - } else - do_stf_barrier_fixups(STF_BARRIER_NONE); - - stf_barrier = enable; -} - -static void rfi_flush_enable(bool enable) +void rfi_flush_enable(bool enable) { if (enable) { - do_rfi_flush_fixups(rfi_enabled_flush_types); + do_rfi_flush_fixups(enabled_flush_types); on_each_cpu(do_nothing, NULL, 1); } else do_rfi_flush_fixups(L1D_FLUSH_NONE); @@ -897,41 +848,6 @@ static void rfi_flush_enable(bool enable) rfi_flush = enable; } -void setup_stf_barrier(void) -{ - enum stf_barrier_type type; - bool enable, hv; - - hv = cpu_has_feature(CPU_FTR_HVMODE); - - /* Default to fallback in case fw-features are not available */ - if (cpu_has_feature(CPU_FTR_ARCH_300)) - type = STF_BARRIER_EIEIO; - else if (cpu_has_feature(CPU_FTR_ARCH_207S)) - type = STF_BARRIER_SYNC_ORI; - else if (cpu_has_feature(CPU_FTR_ARCH_206)) - type = STF_BARRIER_FALLBACK; - else - type = STF_BARRIER_NONE; - - enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && - (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) || - (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv)); - - if (type == STF_BARRIER_FALLBACK) { - pr_info("stf-barrier: fallback barrier available\n"); - } else if (type == STF_BARRIER_SYNC_ORI) { - pr_info("stf-barrier: hwsync barrier available\n"); - } else if (type == STF_BARRIER_EIEIO) { - pr_info("stf-barrier: eieio barrier available\n"); - } - - stf_enabled_flush_types = type; - - if (!no_stf_barrier) - stf_barrier_enable(enable); -} - static void init_fallback_flush(void) { u64 l1d_size, limit; @@ -982,39 +898,13 @@ void setup_rfi_flush(enum l1d_flush_type types, bool enable) if (types & L1D_FLUSH_MTTRIG) pr_info("rfi-flush: mttrig type flush available\n"); - rfi_enabled_flush_types = types; + enabled_flush_types = types; if (!no_rfi_flush) rfi_flush_enable(enable); } #ifdef CONFIG_DEBUG_FS -static int stf_barrier_set(void *data, u64 val) -{ - bool enable; - - if (val == 1) - enable = true; - else if (val == 0) - enable = false; - else - return -EINVAL; - - /* Only do anything if we're changing state */ - if (enable != stf_barrier) - stf_barrier_enable(enable); - - return 0; -} - -static int stf_barrier_get(void *data, u64 *val) -{ - *val = stf_barrier ? 1 : 0; - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n"); - static int rfi_flush_set(void *data, u64 val) { bool enable; @@ -1044,7 +934,6 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_rfi_flush, rfi_flush_get, rfi_flush_set, "%llu\n"); static __init int rfi_flush_debugfs_init(void) { debugfs_create_file("rfi_flush", 0600, powerpc_debugfs_root, NULL, &fops_rfi_flush); - debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier); return 0; } device_initcall(rfi_flush_debugfs_init); diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c index 47373c6..762a899 100644 --- a/arch/powerpc/lib/feature-fixups.c +++ b/arch/powerpc/lib/feature-fixups.c @@ -23,6 +23,7 @@ #include #include #include +#include #include struct fixup_entry { @@ -185,12 +186,21 @@ void do_stf_exit_barrier_fixups(enum stf_barrier_type types) i = 0; if (types & STF_BARRIER_FALLBACK || types & STF_BARRIER_SYNC_ORI) { - instrs[i++] = 0x7db243a6; /* mtsprg 2,r13 */ - instrs[i++] = 0x7db142a6; /* mfsprg r13,1 */ + if (cpu_has_feature(CPU_FTR_HVMODE)) { + instrs[i++] = 0x7db14ba6; /* mtspr 0x131, r13 (HSPRG1) */ + instrs[i++] = 0x7db04aa6; /* mfspr r13, 0x130 (HSPRG0) */ + } else { + instrs[i++] = 0x7db243a6; /* mtsprg 2,r13 */ + instrs[i++] = 0x7db142a6; /* mfsprg r13,1 */ + } instrs[i++] = 0x7c0004ac; /* hwsync */ instrs[i++] = 0xe9ad0000; /* ld r13,0(r13) */ instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ - instrs[i++] = 0x7db242a6; /* mfsprg r13,2 */ + if (cpu_has_feature(CPU_FTR_HVMODE)) { + instrs[i++] = 0x7db14aa6; /* mfspr r13, 0x131 (HSPRG1) */ + } else { + instrs[i++] = 0x7db242a6; /* mfsprg r13,2 */ + } } else if (types & STF_BARRIER_EIEIO) { instrs[i++] = 0x7e0006ac; /* eieio + bit 6 hint */ } diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index 62ecc66..fc0412d 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c @@ -130,8 +130,8 @@ static void __init pnv_setup_arch(void) { set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); - setup_stf_barrier(); pnv_setup_rfi_flush(); + setup_stf_barrier(); /* Initialize SMP */ pnv_smp_init();