From patchwork Sun Oct 11 18:28:19 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Gardner X-Patchwork-Id: 35717 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from chlorine.canonical.com (chlorine.canonical.com [91.189.94.204]) by ozlabs.org (Postfix) with ESMTP id 3C256B7B69 for ; Mon, 12 Oct 2009 05:32:21 +1100 (EST) Received: from localhost ([127.0.0.1] helo=chlorine.canonical.com) by chlorine.canonical.com with esmtp (Exim 4.60) (envelope-from ) id 1Mx3DF-0003FH-Co; Sun, 11 Oct 2009 19:32:09 +0100 Received: from mail.tpi.com ([70.99.223.143]) by chlorine.canonical.com with esmtp (Exim 4.60) (envelope-from ) id 1Mx39X-00026L-1i for kernel-team@lists.ubuntu.com; Sun, 11 Oct 2009 19:28:19 +0100 Received: from [10.0.2.5] (unknown [10.0.2.5]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mail.tpi.com (Postfix) with ESMTP id 576E71EDFB5; Sun, 11 Oct 2009 11:27:30 -0700 (PDT) Message-ID: <4AD223C3.3020607@canonical.com> Date: Sun, 11 Oct 2009 12:28:19 -0600 From: Tim Gardner User-Agent: Thunderbird 2.0.0.23 (X11/20090817) MIME-Version: 1.0 To: Andy Whitcroft , Stefan Bader Subject: [Fwd: Re: [PATCH] x86: Relegate CONFIG_PAT to EMBEDDED] X-Enigmail-Version: 0.95.7 Cc: Kernel team list X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.8 Precedence: list Reply-To: tim.gardner@canonical.com List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kernel-team-bounces@lists.ubuntu.com Errors-To: kernel-team-bounces@lists.ubuntu.com Andy, Stefan - Why _is_ it that we don't have PAT enabled? Wasn't it originally a prerequisite for KMS back in Jaunty days? There are some comments on LKML pointing out that we _should_ have PAT enabled, e.g., "[RFC Patch] use MTRR for write combining if PAT is not available" rtg diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 4427956..2fbc3c6 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1327,7 +1327,9 @@ config MATH_EMULATION kernel, it won't hurt. config MTRR - bool "MTRR (Memory Type Range Register) support" + bool + default y + prompt "MTRR (Memory Type Range Register) support" if EMBEDDED ---help--- On Intel P6 family processors (Pentium Pro, Pentium II and later) the Memory Type Range Registers (MTRRs) may be used to control @@ -1393,7 +1395,8 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT config X86_PAT bool - prompt "x86 PAT support" + default y + prompt "x86 PAT support" if EMBEDDED depends on MTRR ---help--- Use PAT attributes to setup page level cache control.