@@ -12,7 +12,6 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
-#include <linux/version.h>
#include "edac_module.h"
@@ -48,18 +47,6 @@
#define MLXBF_EDAC_MAX_DIMM_PER_MC 2
#define MLXBF_EDAC_ERROR_GRAIN 8
-#define MLNX_WRITE_REG_32 (0x82000009)
-#define MLNX_READ_REG_32 (0x8200000A)
-#define MLNX_WRITE_REG_64 (0x8200000B)
-#define MLNX_READ_REG_64 (0x8200000C)
-#define MLNX_SIP_SVC_UID (0x8200ff01)
-#define MLNX_SIP_SVC_VERSION (0x8200ff03)
-
-#define SMCCC_ACCESS_VIOLATION (-4)
-
-#define MLNX_EDAC_SVC_REQ_MAJOR 0
-#define MLNX_EDAC_SVC_MIN_MINOR 3
-
/*
* Request MLNX_SIP_GET_DIMM_INFO
*
@@ -85,12 +72,9 @@
#define MLXBF_DIMM_INFO__PACKAGE_X GENMASK_ULL(31, 24)
struct bluefield_edac_priv {
- struct device *dev;
int dimm_ranks[MLXBF_EDAC_MAX_DIMM_PER_MC];
void __iomem *emi_base;
int dimm_per_mc;
- bool svc_sreg_support;
- uint32_t sreg_tbl_edac;
};
static u64 smc_call1(u64 smc_op, u64 smc_arg)
@@ -102,73 +86,6 @@ static u64 smc_call1(u64 smc_op, u64 smc_arg)
return res.a0;
}
-static int secure_readl(void __iomem *addr, uint32_t *result, uint32_t sreg_tbl)
-{
- struct arm_smccc_res res;
- int status;
-
- arm_smccc_smc(MLNX_READ_REG_32, sreg_tbl, (uintptr_t) addr,
- 0, 0, 0, 0, 0, &res);
-
- status = res.a0;
-
- switch (status) {
- case SMCCC_RET_NOT_SUPPORTED:
- case SMCCC_ACCESS_VIOLATION:
- return -1;
- default:
- *result = (uint32_t)res.a1;
- return 0;
- }
-
-}
-
-static int secure_writel(void __iomem *addr, uint32_t data, uint32_t sreg_tbl)
-{
- struct arm_smccc_res res;
- int status;
-
- arm_smccc_smc(MLNX_WRITE_REG_32, sreg_tbl, data, (uintptr_t) addr,
- 0, 0, 0, 0, &res);
-
- status = res.a0;
-
- switch (status) {
- case SMCCC_RET_NOT_SUPPORTED:
- case SMCCC_ACCESS_VIOLATION:
- return -1;
- default:
- return 0;
- }
-
-}
-
-static int edac_readl(void __iomem *addr, uint32_t *result,
- bool sreg_support, uint32_t sreg_tbl)
-{
- int err = 0;
-
- if (sreg_support)
- err = secure_readl(addr, result, sreg_tbl);
- else
- *result = readl(addr);
-
- return err;
-}
-
-static int edac_writel(void __iomem *addr, uint32_t data,
- bool sreg_support, uint32_t sreg_tbl)
-{
- int err = 0;
-
- if (sreg_support)
- err = secure_writel(addr, data, sreg_tbl);
- else
- writel(data, addr);
-
- return err;
-}
-
/*
* Gather the ECC information from the External Memory Interface registers
* and report it to the edac handler.
@@ -182,7 +99,7 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci,
u32 ecc_latch_select, dram_syndrom, serr, derr, syndrom;
enum hw_event_mc_err_type ecc_type;
u64 ecc_dimm_addr;
- int ecc_dimm, err;
+ int ecc_dimm;
ecc_type = is_single_ecc ? HW_EVENT_ERR_CORRECTED :
HW_EVENT_ERR_UNCORRECTED;
@@ -192,22 +109,14 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci,
* registers with information about the last ECC error occurrence.
*/
ecc_latch_select = MLXBF_ECC_LATCH_SEL__START;
- err = edac_writel(priv->emi_base + MLXBF_ECC_LATCH_SEL,
- ecc_latch_select, priv->svc_sreg_support,
- priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "ECC latch select write failed.\n");
+ writel(ecc_latch_select, priv->emi_base + MLXBF_ECC_LATCH_SEL);
/*
* Verify that the ECC reported info in the registers is of the
* same type as the one asked to report. If not, just report the
* error without the detailed information.
*/
- err = edac_readl(priv->emi_base + MLXBF_SYNDROM, &dram_syndrom,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "DRAM syndrom read failed.\n");
-
+ dram_syndrom = readl(priv->emi_base + MLXBF_SYNDROM);
serr = FIELD_GET(MLXBF_SYNDROM__SERR, dram_syndrom);
derr = FIELD_GET(MLXBF_SYNDROM__DERR, dram_syndrom);
syndrom = FIELD_GET(MLXBF_SYNDROM__SYN, dram_syndrom);
@@ -218,24 +127,13 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci,
return;
}
- err = edac_readl(priv->emi_base + MLXBF_ADD_INFO, &dram_additional_info,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "DRAM additional info read failed.\n");
-
+ dram_additional_info = readl(priv->emi_base + MLXBF_ADD_INFO);
err_prank = FIELD_GET(MLXBF_ADD_INFO__ERR_PRANK, dram_additional_info);
ecc_dimm = (err_prank >= 2 && priv->dimm_ranks[0] <= 2) ? 1 : 0;
- err = edac_readl(priv->emi_base + MLXBF_ERR_ADDR_0, &edea0,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "Error addr 0 read failed.\n");
-
- err = edac_readl(priv->emi_base + MLXBF_ERR_ADDR_1, &edea1,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "Error addr 1 read failed.\n");
+ edea0 = readl(priv->emi_base + MLXBF_ERR_ADDR_0);
+ edea1 = readl(priv->emi_base + MLXBF_ERR_ADDR_1);
ecc_dimm_addr = ((u64)edea1 << 32) | edea0;
@@ -249,7 +147,6 @@ static void bluefield_edac_check(struct mem_ctl_info *mci)
{
struct bluefield_edac_priv *priv = mci->pvt_info;
u32 ecc_count, single_error_count, double_error_count, ecc_error = 0;
- int err;
/*
* The memory controller might not be initialized by the firmware
@@ -258,11 +155,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci)
if (mci->edac_cap == EDAC_FLAG_NONE)
return;
- err = edac_readl(priv->emi_base + MLXBF_ECC_CNT, &ecc_count,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "ECC count read failed.\n");
-
+ ecc_count = readl(priv->emi_base + MLXBF_ECC_CNT);
single_error_count = FIELD_GET(MLXBF_ECC_CNT__SERR_CNT, ecc_count);
double_error_count = FIELD_GET(MLXBF_ECC_CNT__DERR_CNT, ecc_count);
@@ -279,12 +172,8 @@ static void bluefield_edac_check(struct mem_ctl_info *mci)
}
/* Write to clear reported errors. */
- if (ecc_count) {
- err = edac_writel(priv->emi_base + MLXBF_ECC_ERR, ecc_error,
- priv->svc_sreg_support, priv->sreg_tbl_edac);
- if (err)
- dev_err(priv->dev, "ECC Error write failed.\n");
- }
+ if (ecc_count)
+ writel(ecc_error, priv->emi_base + MLXBF_ECC_ERR);
}
/* Initialize the DIMMs information for the given memory controller. */
@@ -355,7 +244,6 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev)
struct bluefield_edac_priv *priv;
struct device *dev = &pdev->dev;
struct edac_mc_layer layers[1];
- struct arm_smccc_res res;
struct mem_ctl_info *mci;
struct resource *emi_res;
unsigned int mc_idx, dimm_count;
@@ -392,40 +280,12 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev)
priv = mci->pvt_info;
- /*
- * ACPI indicates whether we use SMCs to access registers or not.
- * If sreg_tbl_perf is not present, just assume we're not using SMCs.
- */
- if (device_property_read_u32(dev,
- "sec_reg_block", &priv->sreg_tbl_edac)) {
- priv->svc_sreg_support = false;
- } else {
- /*
- * Check service version to see if we actually do support the
- * needed SMCs. If we have the calls we need, mark support for
- * them in the pmc struct.
- */
- arm_smccc_smc(MLNX_SIP_SVC_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
- if (res.a0 == MLNX_EDAC_SVC_REQ_MAJOR &&
- res.a1 >= MLNX_EDAC_SVC_MIN_MINOR)
- priv->svc_sreg_support = true;
- else {
- dev_err(dev, "Required SMCs are not supported.\n");
- ret = -EINVAL;
- goto err;
- }
- }
-
priv->dimm_per_mc = dimm_count;
- if (!priv->svc_sreg_support) {
- priv->emi_base = devm_ioremap_resource(dev, emi_res);
- if (IS_ERR(priv->emi_base)) {
- dev_err(dev, "failed to map EMI IO resource\n");
- ret = PTR_ERR(priv->emi_base);
- goto err;
- }
- } else {
- priv->emi_base = (void __iomem *) emi_res->start;
+ priv->emi_base = devm_ioremap_resource(dev, emi_res);
+ if (IS_ERR(priv->emi_base)) {
+ dev_err(dev, "failed to map EMI IO resource\n");
+ ret = PTR_ERR(priv->emi_base);
+ goto err;
}
mci->pdev = dev;
BugLink: https://bugs.launchpad.net/bugs/2085561 This reverts commit 030e2a51ac6050a5b02ec75d4a84c75235e5e1d9. Signed-off-by: David Thompson <davthompson@nvidia.com> --- drivers/edac/bluefield_edac.c | 168 +++------------------------------- 1 file changed, 14 insertions(+), 154 deletions(-)