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[80.71.140.73]) by smtp.gmail.com with ESMTPSA id h26-20020a1709062dda00b009a1fef32ce6sm599512eji.177.2023.08.31.03.24.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Aug 2023 03:24:25 -0700 (PDT) From: Emil Renner Berthing To: kernel-team@lists.ubuntu.com Subject: [SRU][M][PATCH 07/12] UBUNTU: [Config] Build in D1 clock drivers on riscv64 Date: Thu, 31 Aug 2023 12:24:15 +0200 Message-Id: <20230831102420.510624-8-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230831102420.510624-1-emil.renner.berthing@canonical.com> References: <20230831102420.510624-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1975592 These clock drivers are required to boot the Allwinner D1 RISC-V SoC. Signed-off-by: Emil Renner Berthing --- debian.master/config/annotations | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/debian.master/config/annotations b/debian.master/config/annotations index 1d95d01c97c5..f8bb9f39c05a 100644 --- a/debian.master/config/annotations +++ b/debian.master/config/annotations @@ -13060,8 +13060,8 @@ CONFIG_ST_THERMAL_MEMMAP policy<{'arm64': 'm'}> CONFIG_ST_UVIS25 policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm'}> CONFIG_ST_UVIS25_I2C policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm'}> CONFIG_ST_UVIS25_SPI policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm'}> -CONFIG_SUN20I_D1_CCU policy<{'riscv64': 'm'}> -CONFIG_SUN20I_D1_R_CCU policy<{'riscv64': 'm'}> +CONFIG_SUN20I_D1_CCU policy<{'riscv64': 'y'}> +CONFIG_SUN20I_D1_R_CCU policy<{'riscv64': 'y'}> CONFIG_SUN20I_PPU policy<{'arm64': 'y', 'riscv64': 'y'}> CONFIG_SUN4I_EMAC policy<{'arm64': 'n', 'armhf': '-', 'riscv64': 'm'}> CONFIG_SUN4I_GPADC policy<{'arm64': 'n', 'armhf': '-', 'riscv64': 'm'}> @@ -13094,7 +13094,7 @@ CONFIG_SUNRPC_DEBUG policy<{'amd64': 'y', 'arm64': ' CONFIG_SUNRPC_GSS policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': 'm'}> CONFIG_SUNRPC_SWAP policy<{'amd64': 'y', 'arm64': 'y', 'armhf': 'y', 'ppc64el': 'y', 'riscv64': 'y', 's390x': 'y'}> CONFIG_SUNRPC_XPRT_RDMA policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': 'm'}> -CONFIG_SUNXI_CCU policy<{'arm64': 'y', 'armhf': '-', 'riscv64': 'm'}> +CONFIG_SUNXI_CCU policy<{'arm64': 'y', 'armhf': '-', 'riscv64': 'y'}> CONFIG_SUNXI_MBUS policy<{'arm64': 'y'}> CONFIG_SUNXI_NMI_INTC policy<{'arm64': 'y'}> CONFIG_SUNXI_RSB policy<{'arm64': 'm', 'armhf': '-', 'riscv64': 'm'}>