| Message ID | 20210730080921.999677-2-acelan.kao@canonical.com |
|---|---|
| State | New |
| Headers | show |
| Series | Intel e1000e blocks the system to enter | expand |
This looks more like a backport to me. How about some explanation for the missing parts of the original commit ? pmc_core_send_ltr_ignore() also had some changes. pmc_core_ltr_ignore_write() is new, but likely unused. rtg On 7/30/21 2:09 AM, AceLan Kao wrote: > From: "David E. Box" <david.e.box@linux.intel.com> > > BugLink: https://bugs.launchpad.net/bugs/1919116 > > Due to a HW limitation, the Latency Tolerance Reporting (LTR) value > programmed in the Tiger Lake GBE controller is not large enough to allow > the platform to enter Package C10, which in turn prevents the platform from > achieving its low power target during suspend-to-idle. Ignore the GBE LTR > value on Tiger Lake. LTR ignore functionality is currently performed solely > by a debugfs write call. Split out the LTR code into its own function that > can be called by both the debugfs writer and by this work around. > > Signed-off-by: David E. Box <david.e.box@linux.intel.com> > Reviewed-by: Sasha Neftin <sasha.neftin@intel.com> > Cc: intel-wired-lan@lists.osuosl.org > Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> > Link: https://lore.kernel.org/r/20210319201844.3305399-2-david.e.box@linux.intel.com > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > (cherry picked from commit d1635448f1105e549b4041aab930dbc6945fc635) > Signed-off-by: Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> > --- > drivers/platform/x86/intel_pmc_core.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c > index 260d49dca1ad..765f15edfe24 100644 > --- a/drivers/platform/x86/intel_pmc_core.c > +++ b/drivers/platform/x86/intel_pmc_core.c > @@ -1277,6 +1277,15 @@ static int pmc_core_probe(struct platform_device *pdev) > pmc_core_send_ltr_ignore(3); > } > > + /* > + * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when > + * a cable is attached. Tell the PMC to ignore it. > + */ > + if (pmcdev->map == &tgl_reg_map) { > + dev_dbg(&pdev->dev, "ignoring GBE LTR\n"); > + pmc_core_send_ltr_ignore(3); > + } > + > pmc_core_dbgfs_register(pmcdev); > > device_initialized = true; >
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 260d49dca1ad..765f15edfe24 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -1277,6 +1277,15 @@ static int pmc_core_probe(struct platform_device *pdev) pmc_core_send_ltr_ignore(3); } + /* + * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when + * a cable is attached. Tell the PMC to ignore it. + */ + if (pmcdev->map == &tgl_reg_map) { + dev_dbg(&pdev->dev, "ignoring GBE LTR\n"); + pmc_core_send_ltr_ignore(3); + } + pmc_core_dbgfs_register(pmcdev); device_initialized = true;