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[1/1] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10

Message ID 20210707071000.681162-2-aaron.ma@canonical.com
State New
Headers show
Series Fix HDMI output issue on Intel TGL GPU | expand

Commit Message

Aaron Ma July 7, 2021, 7:10 a.m. UTC 
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

BugLink: https://bugs.launchpad.net/bugs/1934864

Legacy LSPCON chip from MCA and Parade is only used for platforms
between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210208055554.24357-1-ankit.k.nautiyal@intel.com
Signed-off-by: Aaron Ma <aaron.ma@canonical.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Krzysztof Kozlowski July 7, 2021, 9:20 a.m. UTC | #1 
On 07/07/2021 09:10, Aaron Ma wrote:
> From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> 
> BugLink: https://bugs.launchpad.net/bugs/1934864
> 
> Legacy LSPCON chip from MCA and Parade is only used for platforms
> between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210208055554.24357-1-ankit.k.nautiyal@intel.com

Missing cherry-pick from commit 81637a6ede89b95b6ea7b2f8c594676881110890

This could be fixed when applying.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 799084b2374a..2daf59df1da7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1738,7 +1738,7 @@  tgl_revids_get(struct drm_i915_private *dev_priv)
 
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
 
-#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
+#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)