@@ -27,7 +27,6 @@ select:
items:
- enum:
- sifive,fu540-c000-ccache
- - sifive,fu740-c000-ccache
required:
- compatible
@@ -35,9 +34,7 @@ select:
properties:
compatible:
items:
- - enum:
- - sifive,fu540-c000-ccache
- - sifive,fu740-c000-ccache
+ - const: sifive,fu540-c000-ccache
- const: cache
cache-block-size:
@@ -56,15 +53,9 @@ properties:
interrupts:
description: |
- Must contain 3 entries for FU540 (DirError, DataError and DataFail) or 4
- entries for other chips (DirError, DirFail, DataError, DataFail signals)
+ Must contain entries for DirError, DataError and DataFail signals.
minItems: 3
- maxItems: 4
- items:
- - description: DirError interrupt
- - description: DirFail interrupt
- - description: DataError interrupt
- - description: DataFail interrupt
+ maxItems: 3
reg:
maxItems: 1
@@ -76,26 +67,6 @@ properties:
The reference to the reserved-memory for the L2 Loosely Integrated Memory region.
The reserved memory node should be defined as per the bindings in reserved-memory.txt.
-if:
- properties:
- compatible:
- contains:
- const: sifive,fu540-c000-ccache
-
-then:
- properties:
- interrupts:
- description: |
- Must contain entries for DirError, DataError and DataFail signals.
- maxItems: 3
-
-else:
- properties:
- interrupts:
- description: |
- Must contain entries for DirError, DirFail, DataError, DataFail signals.
- minItems: 4
-
additionalProperties: false
required:
This reverts commit e8a04dd6d642cf1d2f7c6de0589c69305fa32deb. Signed-off-by: Dimitri John Ledkov <xnox@ubuntu.com> --- .../bindings/riscv/sifive-l2-cache.yaml | 35 ++----------------- 1 file changed, 3 insertions(+), 32 deletions(-)