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[61.220.137.37]) by smtp.gmail.com with ESMTPSA id 85sm2033759pfa.89.2020.11.17.22.25.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Nov 2020 22:25:14 -0800 (PST) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 08/10][SRU][OEM-5.6] pinctrl: intel: Introduce common flags for GPIO mapping scheme Date: Wed, 18 Nov 2020 14:24:47 +0800 Message-Id: <20201118062451.360192-9-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201118062451.360192-1-acelan.kao@canonical.com> References: <20201118062451.360192-1-acelan.kao@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.216.66; envelope-from=acelan@gmail.com; helo=mail-pj1-f66.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Andy Shevchenko BugLink: https://bugs.launchpad.net/bugs/1904521 Few drivers are using the same flag to tell Intel pin control core how to interpret GPIO base. Provide a generic flags so all drivers can use. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg (cherry picked from commit e5a4ab6a55e2308aad546b594c0d8e5b71d21be9) Signed-off-by: AceLan Kao --- drivers/pinctrl/intel/pinctrl-intel.c | 19 +++++++++++++------ drivers/pinctrl/intel/pinctrl-intel.h | 14 ++++++++++++-- 2 files changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 74fdfd2b9ff5..a1b286dc7008 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -798,7 +798,7 @@ static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned int offset, for (j = 0; j < comm->ngpps; j++) { const struct intel_padgroup *pgrp = &comm->gpps[j]; - if (pgrp->gpio_base < 0) + if (pgrp->gpio_base == INTEL_GPIO_BASE_NOMAP) continue; if (offset >= pgrp->gpio_base && @@ -1138,7 +1138,7 @@ static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl, for (i = 0; i < community->ngpps; i++) { const struct intel_padgroup *gpp = &community->gpps[i]; - if (gpp->gpio_base < 0) + if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP) continue; ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), @@ -1180,7 +1180,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl) for (j = 0; j < community->ngpps; j++) { const struct intel_padgroup *gpp = &community->gpps[j]; - if (gpp->gpio_base < 0) + if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP) continue; if (gpp->gpio_base + gpp->size > ngpio) @@ -1276,8 +1276,15 @@ static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl, if (gpps[i].size > 32) return -EINVAL; - if (!gpps[i].gpio_base) - gpps[i].gpio_base = gpps[i].base; + /* Special treatment for GPIO base */ + switch (gpps[i].gpio_base) { + case INTEL_GPIO_BASE_MATCH: + gpps[i].gpio_base = gpps[i].base; + break; + case INTEL_GPIO_BASE_NOMAP: + default: + break; + } gpps[i].padown_num = padown_num; @@ -1596,7 +1603,7 @@ static void intel_restore_hostown(struct intel_pinctrl *pctrl, unsigned int c, struct device *dev = pctrl->dev; u32 requested; - if (padgrp->gpio_base < 0) + if (padgrp->gpio_base == INTEL_GPIO_BASE_NOMAP) return; requested = intel_gpio_is_requested(&pctrl->chip, padgrp->gpio_base, padgrp->size); diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index c6f066f6d3fb..89f38fae6da7 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -53,8 +53,7 @@ struct intel_function { * @reg_num: GPI_IS register number * @base: Starting pin of this group * @size: Size of this group (maximum is 32). - * @gpio_base: Starting GPIO base of this group (%0 if matches with @base, - * and %-1 if no GPIO mapping should be created) + * @gpio_base: Starting GPIO base of this group * @padown_num: PAD_OWN register number (assigned by the core driver) * * If pad groups of a community are not the same size, use this structure @@ -68,6 +67,17 @@ struct intel_padgroup { unsigned int padown_num; }; +/** + * enum - Special treatment for GPIO base in pad group + * + * @INTEL_GPIO_BASE_NOMAP: no GPIO mapping should be created + * @INTEL_GPIO_BASE_MATCH: matches with starting pin number + */ +enum { + INTEL_GPIO_BASE_NOMAP = -1, + INTEL_GPIO_BASE_MATCH = 0, +}; + /** * struct intel_community - Intel pin community description * @barno: MMIO BAR number where registers for this community reside